/**@brief Function for executing and switching state.
*
*/
static void switch_state(void)
{
switch (m_spi_master_ex_state)
{
#ifdef SPI_MASTER_0_ENABLE
case TEST_STATE_SPI0_LSB:
spi_master_init(SPI_MASTER_0, spi_master_0_event_handler, true);
spi_send_recv(SPI_MASTER_0, m_tx_data_spi, m_rx_data_spi, TX_RX_MSG_LENGTH);
m_spi_master_ex_state = TEST_STATE_SPI0_MSB;
break;
case TEST_STATE_SPI0_MSB:
spi_master_init(SPI_MASTER_0, spi_master_0_event_handler, false);
spi_send_recv(SPI_MASTER_0, m_tx_data_spi, m_rx_data_spi, TX_RX_MSG_LENGTH);
#ifdef SPI_MASTER_1_ENABLE
m_spi_master_ex_state = TEST_STATE_SPI1_LSB;
#else
m_spi_master_ex_state = TEST_STATE_SPI0_LSB;
#endif /* SPI_MASTER_1_ENABLE */
break;
#endif /* SPI_MASTER_0_ENABLE */
#ifdef SPI_MASTER_1_ENABLE
case TEST_STATE_SPI1_LSB:
spi_master_init(SPI_MASTER_1, spi_master_1_event_handler, true);
spi_send_recv(SPI_MASTER_1, m_tx_data_spi, m_rx_data_spi, TX_RX_MSG_LENGTH);
m_spi_master_ex_state = TEST_STATE_SPI1_MSB;
break;
case TEST_STATE_SPI1_MSB:
spi_master_init(SPI_MASTER_1, spi_master_1_event_handler, false);
spi_send_recv(SPI_MASTER_1, m_tx_data_spi, m_rx_data_spi, TX_RX_MSG_LENGTH);
#ifdef SPI_MASTER_0_ENABLE
m_spi_master_ex_state = TEST_STATE_SPI0_LSB;
#else
m_spi_master_ex_state = TEST_STATE_SPI1_LSB;
#endif /* SPI_MASTER_0_ENABLE */
break;
#endif /* SPI_MASTER_1_ENABLE */
default:
break;
}
nrf_delay_ms(DELAY_MS);
}
uint8_t rom_status() {
uint8_t status;
spi_select_slave(SPI_SLAVE_ROM);
spi_send_recv(ROM_COMMAND_READ_STATUS);
status = spi_send_recv(0xFF);
spi_select_slave(SPI_SLAVE_NONE);
return status;
}
void rom_read(uint32_t address, uint8_t *buffer, uint32_t size) {
while(rom_status() & 0x1);
spi_select_slave(SPI_SLAVE_ROM);
spi_send_recv(ROM_COMMAND_READ_DATA);
spi_send_recv((address >> 16) & 0xFF);
spi_send_recv((address >> 8) & 0xFF);
spi_send_recv(address & 0xFF);
while(size--)
*buffer++ = spi_send_recv(0xFF);
spi_select_slave(SPI_SLAVE_NONE);
}
void rom_erase() {
rom_write_enable();
while(rom_status() & 0x1);
spi_select_slave(SPI_SLAVE_ROM);
spi_send_recv(ROM_COMMAND_ERASE_CHIP);
spi_select_slave(SPI_SLAVE_NONE);
}
static uint8_t
oj6sh_read(struct spi_handle *spi, uint8_t reg)
{
uint8_t ret = 0;
spi_send_recv(spi, 1, ®, 1, &ret);
DPRINTF(4,("%s: 0x%02x = 0x%02x\n", __func__, reg, ret));
return ret;
}
/**@brief Function for executing and switching state.
*
*/
static void switch_state(void)
{
nrf_drv_spi_t const * p_instance;
p_instance = &m_spi_master_0;
// check output of each function
spi_master_init(p_instance, false); // false - MSB first
spi_send_recv(p_instance, m_tx_data_spi, m_rx_data_spi , TX_MSG_LENGTH, RX_MSG_LENGTH);
}
//
// function for sending a strobe command to the CC1101
//
void SpiStrobe(uint8_t Strobe)
{
nrf_gpio_pin_clear(SPIM0_SS_PIN); //set SS low
while(nrf_gpio_pin_read(SPIM0_MISO_PIN)); //wait until SO goes low(0)
m_tx_data[0] = Strobe; //send SRES command strobe
m_tx_data[1] = 0x00; //send empty byte
while(nrf_gpio_pin_read(SPIM0_MISO_PIN)); //wait until SO goes low(0)
spi_send_recv(m_tx_data, m_rx_data, 2u);
nrf_gpio_pin_set(SPIM0_SS_PIN);
}
//
//function for a write single byte command
//
void CC1101_WriteSingle(uint8_t address, uint8_t data)
{
m_tx_data[0] = address; //set address
m_tx_data[1] = data;
nrf_gpio_pin_clear(SPIM0_SS_PIN); //set SS low
while(nrf_gpio_pin_read(SPIM0_MISO_PIN)); //wait until SO goes low(0)
spi_send_recv(m_tx_data, m_rx_data, 2u);
while(nrf_gpio_pin_read(SPIM0_MISO_PIN)); //wait for SS to low
nrf_gpio_pin_set(SPIM0_SS_PIN); //set SS high
}
///////////////////////////////////////////////////////////////////////////////
//
// Function: char siByteTransfer (*dataout, *datain, bytes)
//
// Description:
// Transfers the number of bytes specificied by bytes from memory specified
// by the dataout pointer simultaneously transfering the same number of bytes
// from the serial device to the memory specified by datain. A source or
// destination of NUL indicates that the source or destination is not
// required speeding up the transfer.
//
// Arguments:
// dataout pointer to bytes of data to send
// datain pointer to memory area to save incomming bytes
// bytes ushort number of bytes to send
//
// Returns:
// siResult - non zero success
// - zero for failure
//
// Assumptions:
//
void siByteTransfer(uchar *dataout, uchar *datain, ushort bytes)
{
#if defined(SPI_MASTER_0_ENABLE)
spi_send_recv(SPI_MASTER_0, dataout, datain, bytes);
while(!spi_transfer_completed());
#elif defined(SPI_MASTER_1_ENABLE)
spi_send_recv(SPI_MASTER_1, dataout, datain, bytes);
// stabilization time
// uint32_t test = getTickCount();
// do{
// if(getTickCount() > test + 15)
// {
// break;
// }
//
// }
while(!spi_transfer_completed());
#else
uint32_t i;
if (datain == NULL)
{
for( i=0; i<bytes; i++)
{
SPI_XferSpi(*dataout); // write byte pointed at by *BufferPtr to dataflash buffer 2 location
dataout++;
}
}
else if (dataout == NULL)
{
for( i=0; i<bytes; i++)
{
*(datain) = SPI_XferSpi(0x00); // read byte and put it in buffer pointed to by *BufferPtr
datain++; // point to next element in buffer
}
}
#endif
return;
}
//
//function for a read single byte
//
uint8_t CC1101_ReadSingle(uint8_t address)
{
uint8_t value[2];
uint8_t readAddress;
readAddress = (address | 0x80); //set R/w=1 and B=0
m_tx_data[0] = readAddress; //set address
m_tx_data[1] = 0x00; //send empty byte
nrf_gpio_pin_clear(SPIM0_SS_PIN); //set SS low
while(nrf_gpio_pin_read(SPIM0_MISO_PIN)); //wait until SO goes low(0)
spi_send_recv(m_tx_data, value, 2u);
nrf_gpio_pin_set(SPIM0_SS_PIN); //set SS high
return value[0];
}
//
//function for a write burst command to the CC1101
//
void CC1101_WriteBurst(uint8_t address, uint8_t * data, uint16_t len)
{
uint8_t burstAddress;
int i;
burstAddress = (address | 0x40);//set R/W=0 and B=1
m_tx_data[0] = burstAddress; //set address
//for loop to fill our TX BUFFER with the data passed in to the write burst function
for(i=1;i<=len+1;i++){
m_tx_data[i] = data[i-1];
}
nrf_gpio_pin_clear(SPIM0_SS_PIN); //set SS low
while(nrf_gpio_pin_read(SPIM0_MISO_PIN)); //wait until SO goes low(0)
spi_send_recv(m_tx_data, m_rx_data, len);
while(nrf_gpio_pin_read(SPIM0_MISO_PIN)); //wait for SS to low
nrf_gpio_pin_set(SPIM0_SS_PIN); //set SS high
}
/**@brief Function for application main entry. Does not return. */
int main(void)
{
// Setup bsp module.
bsp_configuration();
nrf_drv_spi_config_t const config =
{
#if (SPI0_ENABLED == 1)
.sck_pin = SPIM0_SCK_PIN,
.mosi_pin = SPIM0_MOSI_PIN,
.miso_pin = SPIM0_MISO_PIN,
.ss_pin = SPIM0_SS_PIN,
#elif (SPI1_ENABLED == 1)
.sck_pin = SPIM1_SCK_PIN,
.mosi_pin = SPIM1_MOSI_PIN,
.miso_pin = SPIM1_MISO_PIN,
.ss_pin = SPIM1_SS_PIN,
#elif (SPI2_ENABLED == 1)
.sck_pin = SPIM2_SCK_PIN,
.mosi_pin = SPIM2_MOSI_PIN,
.miso_pin = SPIM2_MISO_PIN,
.ss_pin = SPIM2_SS_PIN,
#endif
.irq_priority = APP_IRQ_PRIORITY_LOW,
.orc = 0xCC,
.frequency = NRF_DRV_SPI_FREQ_1M,
.mode = NRF_DRV_SPI_MODE_0,
.bit_order = NRF_DRV_SPI_BIT_ORDER_LSB_FIRST,
};
ret_code_t err_code = nrf_drv_spi_init(&m_spi_master, &config, spi_master_event_handler);
APP_ERROR_CHECK(err_code);
for (;;)
{
if (m_transfer_completed)
{
m_transfer_completed = false;
// Set buffers and start data transfer.
spi_send_recv(m_tx_data, m_rx_data, TX_RX_BUF_LENGTH);
}
}
}
//
// function for read burst command
//
void SpiReadBurstReg(uint8_t address,uint8_t size)
{
uint8_t burstAddress;
int i;
burstAddress = (address | 0xC0);//set R/W=1 and B=1
//clear out tx data
for(i = 0;i<64;i++)
{
m_tx_data[i] = 0x00;
}
//set burst address
m_tx_data[0] = burstAddress;
nrf_gpio_pin_clear(SPIM0_SS_PIN);
//only read 10 characters for now, willuse size input later
spi_send_recv(m_tx_data, m_rx_data, 10u);
nrf_gpio_pin_set(SPIM0_SS_PIN);
}
void SPIWriteReg(uint8_t addr, uint8_t value)
{
uint8_t temp[2];
uint8_t temp_rec[2]={0};
temp[0] = addr & WRITE_MODE;
temp[1] = value;
nrf_drv_gpiote_out_clear(30);
spi_send_recv(temp, temp_rec, 2);
if (m_transfer_completed){
m_transfer_completed=false;
nrf_delay_ms(1);
nrf_drv_gpiote_out_set(30);
}
nrf_delay_ms(1);
}
/**@brief Function for application main entry. Does not return. */
int main(void)
{
// Setup bsp module.
bsp_configuration();
uint32_t err_code = spi_master_init();
APP_ERROR_CHECK(err_code);
// Register SPI master event handler.
spi_master_evt_handler_reg(SPI_MASTER_HW, spi_master_event_handler);
for (;;)
{
if (m_transfer_completed)
{
m_transfer_completed = false;
// Set buffers and start data transfer.
spi_send_recv(m_tx_data, m_rx_data, TX_RX_BUF_LENGTH);
}
}
}
uint8_t SPIReadReg(uint8_t addr)
{
uint8_t temp[2];
uint8_t temp_rec[2]={0};
temp[0] = addr | READ_MODE ;
temp[1] = 0;
nrf_drv_gpiote_out_clear(30);
spi_send_recv(temp, temp_rec, 2);
if (m_transfer_completed){
m_transfer_completed=false;
nrf_delay_ms(1);
nrf_drv_gpiote_out_set(30);
}
nrf_delay_ms(1);
return temp_rec[1];
}
void rom_write(uint32_t address, const uint8_t *buffer, uint32_t size) {
int i;
while(size >= 256) {
rom_write_enable();
while(rom_status() & 0x1);
spi_select_slave(SPI_SLAVE_ROM);
spi_send_recv(ROM_COMMAND_PAGE_PROGRAM);
spi_send_recv((address >> 16) & 0xFF);
spi_send_recv((address >> 8) & 0xFF);
spi_send_recv(address & 0xFF);
for(i = 0; i < 256; i++)
spi_send_recv(*buffer++);
spi_select_slave(SPI_SLAVE_NONE);
size -= 256;
address += 256;
}
if(size) {
rom_write_enable();
while(rom_status() & 0x1);
spi_select_slave(SPI_SLAVE_ROM);
spi_send_recv(ROM_COMMAND_PAGE_PROGRAM);
spi_send_recv((address >> 16) & 0xFF);
spi_send_recv((address >> 8) & 0xFF);
spi_send_recv(address & 0xFF);
for(i = 0; i < size; i++)
spi_send_recv(*buffer++);
spi_select_slave(SPI_SLAVE_NONE);
}
}
void rom_write_enable() {
while(rom_status() & 0x1);
spi_select_slave(SPI_SLAVE_ROM);
spi_send_recv(ROM_COMMAND_WRITE_ENABLE);
spi_select_slave(SPI_SLAVE_NONE);
}
static void
m25p_attach(device_t parent, device_t self, void *aux)
{
struct m25p_softc *sc = device_private(self);
struct spi_attach_args *sa = aux;
const struct m25p_info *info;
uint8_t buf[4];
uint8_t cmd;
uint8_t mfgid;
uint8_t sig;
uint16_t devid;
sc->sc_sh = sa->sa_handle;
/* first we try JEDEC ID read */
cmd = SPIFLASH_CMD_RDJI;
if (spi_send_recv(sa->sa_handle, 1, &cmd, 3, buf)) {
aprint_error(": failed to get JEDEC identification\n");
return;
}
mfgid = buf[0];
devid = ((uint16_t)buf[1] << 8) | buf[2];
if ((mfgid == 0xff) || (mfgid == 0)) {
cmd = SPIFLASH_CMD_RDID;
if (spi_send_recv(sa->sa_handle, 1, &cmd, 4, buf)) {
aprint_error(": failed to get legacy signature\n");
return;
}
sig = buf[3];
} else {
sig = 0;
}
/* okay did it match */
for (info = m25p_infos; info->name; info++) {
if ((info->mfgid == mfgid) && (info->devid == devid))
break;
if (sig == info->sig)
break;
}
if (info->name == NULL) {
aprint_error(": unknown or unsupported device\n");
return;
}
sc->sc_name = info->name;
sc->sc_sh = sa->sa_handle;
sc->sc_sizes[SPIFLASH_SIZE_DEVICE] = info->size * 1024;
sc->sc_sizes[SPIFLASH_SIZE_ERASE] = info->sector * 1024;
sc->sc_sizes[SPIFLASH_SIZE_WRITE] = 256;
sc->sc_sizes[SPIFLASH_SIZE_READ] = -1;
sc->sc_flags = SPIFLASH_FLAG_FAST_READ;
aprint_normal("\n");
spiflash_attach_mi(&m25p_hw_if, sc, self);
}
