/**
* \brief Initialize SPI as slave.
*/
static void spi_slave_initialize(void)
{
uint32_t i;
/* Reset status */
gs_spi_status.ul_total_block_number = 0;
gs_spi_status.ul_total_command_number = 0;
for (i = 0; i < NB_STATUS_CMD; i++) {
gs_spi_status.ul_cmd_list[i] = 0;
}
gs_ul_spi_state = SLAVE_STATE_IDLE;
gs_ul_spi_cmd = RC_SYN;
puts("-I- Initialize SPI as slave \r");
/* Configure an SPI peripheral. */
spi_enable_clock(SPI_SLAVE_BASE);
spi_disable(SPI_SLAVE_BASE);
spi_reset(SPI_SLAVE_BASE);
spi_set_slave_mode(SPI_SLAVE_BASE);
spi_disable_mode_fault_detect(SPI_SLAVE_BASE);
spi_set_peripheral_chip_select_value(SPI_SLAVE_BASE, SPI_CHIP_SEL);
spi_set_clock_polarity(SPI_SLAVE_BASE, SPI_CHIP_SEL, SPI_CLK_POLARITY);
spi_set_clock_phase(SPI_SLAVE_BASE, SPI_CHIP_SEL, SPI_CLK_PHASE);
spi_set_bits_per_transfer(SPI_SLAVE_BASE, SPI_CHIP_SEL, SPI_CSR_BITS_8_BIT);
spi_enable_interrupt(SPI_SLAVE_BASE, SPI_IER_RDRF);
spi_enable(SPI_SLAVE_BASE);
/* Start waiting command. */
spi_slave_transfer(&gs_ul_spi_cmd, sizeof(gs_ul_spi_cmd));
}
/**
* \brief Initialize SPI as slave.
*/
static void spi_slave_initialize(void)
{
g_uc_role = SLAVE_MODE;
puts("-I- Initialize SPI as slave \r");
/* Configure an SPI peripheral. */
spi_enable_clock(SPI_SLAVE_BASE);
spi_disable(SPI_SLAVE_BASE);
spi_reset(SPI_SLAVE_BASE);
spi_set_slave_mode(SPI_SLAVE_BASE);
spi_disable_mode_fault_detect(SPI_SLAVE_BASE);
spi_set_peripheral_chip_select_value(SPI_SLAVE_BASE, SPI_CHIP_PCS);
spi_set_clock_polarity(SPI_SLAVE_BASE, SPI_CHIP_SEL, SPI_CLK_POLARITY);
spi_set_clock_phase(SPI_SLAVE_BASE, SPI_CHIP_SEL, SPI_CLK_PHASE);
spi_set_bits_per_transfer(SPI_SLAVE_BASE, SPI_CHIP_SEL, SPI_CSR_BITS_8_BIT);
spi_enable(SPI_SLAVE_BASE);
}
/*
* Initialise the SPI interface as a SLAVE
*
*/
void spi_slave_initialize(void)
{
NVIC_DisableIRQ(SPI_IRQn);
NVIC_ClearPendingIRQ(SPI_IRQn);
NVIC_SetPriority(SPI_IRQn, 0);
NVIC_EnableIRQ(SPI_IRQn);
/* Configure an SPI peripheral. */
spi_enable_clock(SPI_SLAVE_BASE);
spi_disable(SPI_SLAVE_BASE);
spi_reset(SPI_SLAVE_BASE);
spi_set_slave_mode(SPI_SLAVE_BASE);
spi_disable_mode_fault_detect(SPI_SLAVE_BASE);
spi_set_peripheral_chip_select_value(SPI_SLAVE_BASE, SPI_CHIP_PCS);
spi_set_clock_polarity(SPI_SLAVE_BASE, SPI_CHIP_SEL, SPI_CLK_POLARITY);
spi_set_clock_phase(SPI_SLAVE_BASE, SPI_CHIP_SEL, SPI_CLK_PHASE);
spi_set_bits_per_transfer(SPI_SLAVE_BASE, SPI_CHIP_SEL, SPI_CSR_BITS_8_BIT);
spi_enable_interrupt(SPI_SLAVE_BASE, SPI_IER_RDRF);
spi_enable(SPI_SLAVE_BASE);
}
/**
* \brief Initialize SPI as slave.
*/
static void spi_slave_initialize(void)
{
uint32_t i;
/* Get pointer to SPI slave PDC register base */
g_p_spis_pdc = spi_get_pdc_base(SPI_MASTER_BASE);
puts("-I- Initialize SPI as slave \r");
for (i = 0; i < COMM_BUFFER_SIZE; i++) {
gs_uc_spi_s_tbuffer[i] = i;
}
#if (SAMG55)
/* Enable the peripheral and set SPI mode. */
flexcom_enable(BOARD_FLEXCOM_SPI);
flexcom_set_opmode(BOARD_FLEXCOM_SPI, FLEXCOM_SPI);
#else
/* Configure an SPI peripheral. */
pmc_enable_periph_clk(SPI_ID);
#endif
spi_disable(SPI_SLAVE_BASE);
spi_reset(SPI_SLAVE_BASE);
spi_set_slave_mode(SPI_SLAVE_BASE);
spi_disable_mode_fault_detect(SPI_SLAVE_BASE);
spi_set_peripheral_chip_select_value(SPI_SLAVE_BASE, SPI_CHIP_SEL);
spi_set_clock_polarity(SPI_SLAVE_BASE, SPI_CHIP_SEL, SPI_CLK_POLARITY);
spi_set_clock_phase(SPI_SLAVE_BASE, SPI_CHIP_SEL, SPI_CLK_PHASE);
spi_set_bits_per_transfer(SPI_SLAVE_BASE, SPI_CHIP_SEL,
SPI_CSR_BITS_8_BIT);
spi_enable(SPI_SLAVE_BASE);
pdc_disable_transfer(g_p_spis_pdc, PERIPH_PTCR_RXTDIS |
PERIPH_PTCR_TXTDIS);
spi_slave_transfer(gs_uc_spi_s_tbuffer, COMM_BUFFER_SIZE,
gs_uc_spi_s_rbuffer, COMM_BUFFER_SIZE);
}
