void sc_pwr_rtc_sleep(int timeout_sec)
{
EXTChannelConfig cfg;
EXTConfig extcfg;
DEBUG_TOGGLE(1, true);
// Allow RTC write
RTC->WPR = 0xCA;
RTC->WPR = 0x53;
while (!(RTC->ISR & RTC_ISR_WUTWF)){
RTC->CR &= ~RTC_CR_WUTE;
}
DEBUG_TOGGLE(2, true);
RTC->CR &= (~7); // Clear WUCKSEL
RTC->CR |= 4; // Wakeup clock = ck_spre (1Hz)
RTC->WUTR = timeout_sec;
DEBUG_TOGGLE(3, true);
// Start the wakeup timer
PWR->CR |= PWR_CR_CWUF;
RTC->ISR &= ~RTC_ISR_WUTF;
RTC->CR |= RTC_CR_WUTE | RTC_CR_WUTIE;
DEBUG_TOGGLE(4, true);
bzero(&cfg, sizeof(cfg));
bzero(&extcfg, sizeof(extcfg));
cfg.mode = EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART;
cfg.cb = _empty_cb;
extStart(&EXTD1, &extcfg);
extSetChannelMode(&EXTD1, 22, &cfg);
DEBUG_TOGGLE(5, true);
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
PWR->CR |= (PWR_CR_LPDS/* | PWR_CR_FPDS*/ | PWR_CR_CSBF | PWR_CR_CWUF);
PWR->CR &= ~PWR_CR_PDDS;
__WFI();
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
stm32_clock_init();
DEBUG_TOGGLE(6, true);
extChannelDisable(&EXTD1, 22);
extStop(&EXTD1);
RTC->CR &= ~RTC_CR_WUTE;
RTC->ISR &= ~RTC_ISR_WUTF;
RTC->WPR = 0; // Relock registers
}
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
#ifndef STM32F100_MCUCONF
stm32_gpio_init();
#endif
stm32_clock_init();
#if defined(HAL_DISABLE_DCACHE)
SCB_DisableDCache();
#endif
}
/*
* Initialize the timer systems of the STM32
*/
void __init stm32_timer_init(void)
{
/*
* Configure the STM32 clocks, and get the reference clock value
*/
stm32_clock_init();
tick_tmr_clk = stm32_clock_get(TICK_TIM_CLOCK);
src_tmr_clk = stm32_clock_get(CLOCK_HCLK) / 8;
/*
* Init clockevents (sys timer)
*/
tick_tmr_init();
/*
* Init clocksource
*/
src_tmr_init();
}
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
void sc_pwr_rtc_sleep(int timeout_sec)
{
chSysLock();
// Allow RTC write
RTC->WPR = 0xCA;
RTC->WPR = 0x53;
DEBUG_TOGGLE(1, true);
while (!(RTC->ISR & RTC_ISR_WUTWF))
RTC->CR &= ~RTC_CR_WUTE;
DEBUG_TOGGLE(2, true);
RTC->CR &= (~7); // Clear WUCKSEL
RTC->CR |= 4; // Wakeup clock = ck_spre (1Hz)
RTC->WUTR = timeout_sec;
// Start the wakeup timer
PWR->CR |= PWR_CR_CWUF;
RTC->ISR &= ~RTC_ISR_WUTF;
RTC->CR |= RTC_CR_WUTE | RTC_CR_WUTIE;
DEBUG_TOGGLE(3, true);
// Enable EXTI0 and EXTI22 rising edge events
EXTI->EMR = EXTI->IMR = EXTI->RTSR = 0;
EXTI->PR = 0x7FFFFF;
DEBUG_TOGGLE(4, true);
// Event mask register
EXTI->EMR |= EXTI_EMR_MR22;
// Rising trigger selection register
EXTI->RTSR |= EXTI_RTSR_TR22;
// Pending register
EXTI->PR |= EXTI_PR_PR22;
DEBUG_TOGGLE(5, true);
// Go to sleep
PWR->CR |= PWR_CR_LPDS;
PWR->CR &= ~PWR_CR_PDDS;
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
asm("dsb");
asm("wfe");
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
DEBUG_TOGGLE(6, true);
// Switch back to HSI oscillator
stm32_clock_init();
DEBUG_TOGGLE(7, true);
// Re-enable access to backup domain
PWR->CR |= PWR_CR_DBP;
RTC->CR &= ~RTC_CR_WUTE;
RTC->ISR &= ~RTC_ISR_WUTF;
RTC->WPR = 0; // Relock registers
chSysUnlock();
DEBUG_TOGGLE(8, true);
}
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
enter_bootloader_mode_if_requested();
stm32_clock_init();
}