void stm32_timer_request(EXO* exo, IPC* ipc)
{
TIMER_NUM num = (TIMER_NUM)ipc->param1;
if (num >= TIMERS_COUNT)
{
kerror(ERROR_INVALID_PARAMS);
return;
}
switch (HAL_ITEM(ipc->cmd))
{
case IPC_OPEN:
stm32_timer_open(exo, num, ipc->param2);
break;
case IPC_CLOSE:
stm32_timer_close(exo, num);
break;
case TIMER_START:
stm32_timer_start(exo, num, (TIMER_VALUE_TYPE)ipc->param2, ipc->param3);
break;
case TIMER_STOP:
stm32_timer_stop(num);
break;
#if (TIMER_IO)
case TIMER_SETUP_CHANNEL:
stm32_timer_setup_channel(num, TIMER_CHANNEL_VALUE(ipc->param2), TIMER_CHANNEL_TYPE_VALUE(ipc->param2), ipc->param3);
break;
#endif //TIMER_IO
default:
kerror(ERROR_NOT_SUPPORTED);
break;
}
}
void stm32_timer_pm_event(EXO* exo)
{
exo->timer.hpet_uspsc = stm32_timer_get_clock(exo, HPET_TIMER) / 1000000;
#if !(STM32_RTC_DRIVER)
stm32_timer_stop(SECOND_PULSE_TIMER);
stm32_timer_start(exo, SECOND_PULSE_TIMER, TIMER_VALUE_HZ, 1);
#endif //STM32_RTC_DRIVER
}
void stm32_timer_pm_event(CORE* core)
{
core->timer.hpet_uspsc = stm32_timer_get_clock(core, HPET_TIMER) / 1000000;
#if !(STM32_RTC_DRIVER)
stm32_timer_stop(SECOND_PULSE_TIMER);
stm32_timer_start(core, SECOND_PULSE_TIMER, TIMER_VALUE_HZ, 1);
#endif //STM32_RTC_DRIVER
}
void stm32_timer_init(EXO* exo)
{
#if defined(STM32F1) || defined(STM32F2) || defined(STM32F4)
exo->timer.shared1 = exo->timer.shared8 = 0;
#endif
//setup HPET
kirq_register(KERNEL_HANDLE, TIMER_VECTORS[HPET_TIMER], hpet_isr, (void*)exo);
exo->timer.hpet_uspsc = stm32_timer_get_clock(exo, HPET_TIMER) / 1000000;
stm32_timer_open(exo, HPET_TIMER, TIMER_ONE_PULSE | TIMER_IRQ_ENABLE | (13 << TIMER_IRQ_PRIORITY_POS));
CB_SVC_TIMER cb_svc_timer;
cb_svc_timer.start = hpet_start;
cb_svc_timer.stop = hpet_stop;
cb_svc_timer.elapsed = hpet_elapsed;
ksystime_hpet_setup(&cb_svc_timer, exo);
#if !(STM32_RTC_DRIVER)
kirq_register(KERNEL_HANDLE, TIMER_VECTORS[SECOND_PULSE_TIMER], second_pulse_isr, (void*)exo);
stm32_timer_open(exo, SECOND_PULSE_TIMER, TIMER_IRQ_ENABLE | (13 << TIMER_IRQ_PRIORITY_POS));
stm32_timer_start(exo, SECOND_PULSE_TIMER, TIMER_VALUE_HZ, 1);
#endif //STM32_RTC_DRIVER
}
void stm32_timer_init(CORE *core)
{
#if defined(STM32F1) || defined(STM32F2) || defined(STM32F4)
core->timer.shared1 = core->timer.shared8 = 0;
#endif
//setup HPET
irq_register(TIMER_VECTORS[HPET_TIMER], hpet_isr, (void*)core);
core->timer.hpet_uspsc = stm32_timer_get_clock(core, HPET_TIMER) / 1000000;
stm32_timer_open(core, HPET_TIMER, TIMER_ONE_PULSE | TIMER_IRQ_ENABLE | (13 << TIMER_IRQ_PRIORITY_POS));
CB_SVC_TIMER cb_svc_timer;
cb_svc_timer.start = hpet_start;
cb_svc_timer.stop = hpet_stop;
cb_svc_timer.elapsed = hpet_elapsed;
systime_hpet_setup(&cb_svc_timer, core);
#if !(STM32_RTC_DRIVER)
irq_register(TIMER_VECTORS[SECOND_PULSE_TIMER], second_pulse_isr, (void*)core);
stm32_timer_open(core, SECOND_PULSE_TIMER, TIMER_IRQ_ENABLE | (13 << TIMER_IRQ_PRIORITY_POS));
stm32_timer_start(core, SECOND_PULSE_TIMER, TIMER_VALUE_HZ, 1);
#endif //STM32_RTC_DRIVER
}
static ssize_t stm32_tt_store_frequency(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t len)
{
struct iio_trigger *trig = to_iio_trigger(dev);
struct stm32_timer_trigger *priv = iio_trigger_get_drvdata(trig);
unsigned int freq;
int ret;
ret = kstrtouint(buf, 10, &freq);
if (ret)
return ret;
if (freq == 0) {
stm32_timer_stop(priv);
} else {
ret = stm32_timer_start(priv, trig, freq);
if (ret)
return ret;
}
return len;
}
void hpet_start(unsigned int value, void* param)
{
EXO* exo = (EXO*)param;
//find near prescaller
stm32_timer_start(exo, HPET_TIMER, TIMER_VALUE_CLK, value * exo->timer.hpet_uspsc);
}
void hpet_start(unsigned int value, void* param)
{
CORE* core = (CORE*)param;
//find near prescaller
stm32_timer_start(core, HPET_TIMER, TIMER_VALUE_CLK, value * core->timer.hpet_uspsc);
}
