static CORE_ADDR
m68k_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
struct value **args, CORE_ADDR sp, int struct_return,
CORE_ADDR struct_addr)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[4];
int i;
/* Push arguments in reverse order. */
for (i = nargs - 1; i >= 0; i--)
{
struct type *value_type = value_enclosing_type (args[i]);
int len = TYPE_LENGTH (value_type);
int container_len = (len + 3) & ~3;
int offset;
/* Non-scalars bigger than 4 bytes are left aligned, others are
right aligned. */
if ((TYPE_CODE (value_type) == TYPE_CODE_STRUCT
|| TYPE_CODE (value_type) == TYPE_CODE_UNION
|| TYPE_CODE (value_type) == TYPE_CODE_ARRAY)
&& len > 4)
offset = 0;
else
offset = container_len - len;
sp -= container_len;
write_memory (sp + offset, value_contents_all (args[i]), len);
}
/* Store struct value address. */
if (struct_return)
{
store_unsigned_integer (buf, 4, byte_order, struct_addr);
regcache_cooked_write (regcache, tdep->struct_value_regnum, buf);
}
/* Store return address. */
sp -= 4;
store_unsigned_integer (buf, 4, byte_order, bp_addr);
write_memory (sp, buf, 4);
/* Finally, update the stack pointer... */
store_unsigned_integer (buf, 4, byte_order, sp);
regcache_cooked_write (regcache, M68K_SP_REGNUM, buf);
/* ...and fake a frame pointer. */
regcache_cooked_write (regcache, M68K_FP_REGNUM, buf);
/* DWARF2/GCC uses the stack address *before* the function call as a
frame's CFA. */
return sp + 8;
}
static CORE_ADDR
vax_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
struct value **args, CORE_ADDR sp,
function_call_return_method return_method,
CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR fp = sp;
gdb_byte buf[4];
/* Set up the function arguments. */
sp = vax_store_arguments (regcache, nargs, args, sp);
/* Store return value address. */
if (return_method == return_method_struct)
regcache_cooked_write_unsigned (regcache, VAX_R1_REGNUM, struct_addr);
/* Store return address in the PC slot. */
sp -= 4;
store_unsigned_integer (buf, 4, byte_order, bp_addr);
write_memory (sp, buf, 4);
/* Store the (fake) frame pointer in the FP slot. */
sp -= 4;
store_unsigned_integer (buf, 4, byte_order, fp);
write_memory (sp, buf, 4);
/* Skip the AP slot. */
sp -= 4;
/* Store register save mask and control bits. */
sp -= 4;
store_unsigned_integer (buf, 4, byte_order, 0);
write_memory (sp, buf, 4);
/* Store condition handler. */
sp -= 4;
store_unsigned_integer (buf, 4, byte_order, 0);
write_memory (sp, buf, 4);
/* Update the stack pointer and frame pointer. */
store_unsigned_integer (buf, 4, byte_order, sp);
regcache->cooked_write (VAX_SP_REGNUM, buf);
regcache->cooked_write (VAX_FP_REGNUM, buf);
/* Return the saved (fake) frame pointer. */
return fp;
}
static inline void
supply_unsigned_int_64 (int regnum, unsigned long long val)
{
char buf[8] = { 0 };
store_unsigned_integer (buf, 8, val);
supply_register (regnum, buf);
}
static inline void
supply_uint64 (int regnum, uint64_t val)
{
gdb_byte buf[sizeof(val)];
store_unsigned_integer (buf, sizeof(val), val);
regcache_raw_supply (current_regcache, regnum, buf);
}
static void
lm32_extract_return_value (struct type *type, struct regcache *regcache,
gdb_byte *valbuf)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int offset;
ULONGEST l;
CORE_ADDR return_buffer;
if (TYPE_CODE (type) != TYPE_CODE_STRUCT
&& TYPE_CODE (type) != TYPE_CODE_UNION
&& TYPE_CODE (type) != TYPE_CODE_ARRAY && TYPE_LENGTH (type) <= 4)
{
/* Return value is returned in a single register. */
regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, l);
}
else if ((TYPE_CODE (type) == TYPE_CODE_INT) && (TYPE_LENGTH (type) == 8))
{
/* 64-bit values are returned in a register pair. */
regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
memcpy (valbuf, &l, 4);
regcache_cooked_read_unsigned (regcache, SIM_LM32_R2_REGNUM, &l);
memcpy (valbuf + 4, &l, 4);
}
else
{
/* Aggregate types greater than a single register are returned in memory.
FIXME: Unless they are only 2 regs?. */
regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
return_buffer = l;
read_memory (return_buffer, valbuf, TYPE_LENGTH (type));
}
}
/* Store VALUE at ADDR in the inferior as a LEN-byte unsigned integer: */
void
write_memory_unsigned_integer(CORE_ADDR addr, int len, ULONGEST value)
{
char *buf = (char *)alloca(len);
store_unsigned_integer((gdb_byte *)buf, len, value);
write_memory(addr, (const bfd_byte *)buf, len);
}
static void
m88k_frame_prev_register (struct frame_info *next_frame, void **this_cache,
int regnum, int *optimizedp,
enum lval_type *lvalp, CORE_ADDR *addrp,
int *realnump, gdb_byte *valuep)
{
struct m88k_frame_cache *cache = m88k_frame_cache (next_frame, this_cache);
if (regnum == M88K_SNIP_REGNUM || regnum == M88K_SFIP_REGNUM)
{
if (valuep)
{
CORE_ADDR pc;
trad_frame_get_prev_register (next_frame, cache->saved_regs,
M88K_SXIP_REGNUM, optimizedp,
lvalp, addrp, realnump, valuep);
pc = extract_unsigned_integer (valuep, 4);
if (regnum == M88K_SFIP_REGNUM)
pc += 4;
store_unsigned_integer (valuep, 4, pc + 4);
}
/* It's a computed value. */
*optimizedp = 0;
*lvalp = not_lval;
*addrp = 0;
*realnump = -1;
return;
}
trad_frame_get_prev_register (next_frame, cache->saved_regs, regnum,
optimizedp, lvalp, addrp, realnump, valuep);
}
static void
hppa_hpux_fetch_register (struct regcache *regcache, int regnum)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR addr;
size_t size;
PTRACE_TYPE_RET *buf;
pid_t pid;
int i;
pid = ptid_get_pid (inferior_ptid);
/* This isn't really an address, but ptrace thinks of it as one. */
addr = hppa_hpux_save_state_offset (regcache, regnum);
size = register_size (gdbarch, regnum);
gdb_assert (size == 4 || size == 8);
buf = alloca (size);
#ifdef HAVE_TTRACE
{
lwpid_t lwp = ptid_get_lwp (inferior_ptid);
if (ttrace (TT_LWP_RUREGS, pid, lwp, addr, size, (uintptr_t)buf) == -1)
error (_("Couldn't read register %s (#%d): %s"),
gdbarch_register_name (gdbarch, regnum),
regnum, safe_strerror (errno));
}
#else
{
int i;
/* Read the register contents from the inferior a chuck at the time. */
for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
{
errno = 0;
buf[i] = ptrace (PT_RUREGS, pid, (PTRACE_TYPE_ARG3) addr, 0, 0);
if (errno != 0)
error (_("Couldn't read register %s (#%d): %s"),
gdbarch_register_name (gdbarch, regnum),
regnum, safe_strerror (errno));
addr += sizeof (PTRACE_TYPE_RET);
}
}
#endif
/* Take care with the "flags" register. It's stored as an `int' in
`struct save_state', even for 64-bit code. */
if (regnum == HPPA_FLAGS_REGNUM && size == 8)
{
ULONGEST flags;
flags = extract_unsigned_integer ((gdb_byte *)buf, 4, byte_order);
store_unsigned_integer ((gdb_byte *)buf, 8, byte_order, flags);
}
regcache_raw_supply (regcache, regnum, buf);
}
static void
d10v_address_to_pointer (struct type *type, void *buf, CORE_ADDR addr)
{
/* Is it a code address? */
if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
|| TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD)
{
store_unsigned_integer (buf, TYPE_LENGTH (type),
d10v_convert_iaddr_to_raw (addr));
}
else
{
/* Strip off any upper segment bits. */
store_unsigned_integer (buf, TYPE_LENGTH (type),
d10v_convert_daddr_to_raw (addr));
}
}
static CORE_ADDR
mn10300_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
{
unsigned char buf[4];
store_unsigned_integer (buf, 4, CALL_DUMMY_ADDRESS ());
write_memory (sp - 4, buf, 4);
return sp - 4;
}
static void
iq2000_address_to_pointer (struct type *type, void *buf, CORE_ADDR addr)
{
enum type_code target = TYPE_CODE (TYPE_TARGET_TYPE (type));
if (target == TYPE_CODE_FUNC || target == TYPE_CODE_METHOD)
addr = insn_ptr_from_addr (addr);
store_unsigned_integer (buf, TYPE_LENGTH (type), addr);
}
static void
sparc32obsd_supply_uthread (struct regcache *regcache,
int regnum, CORE_ADDR addr)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR fp, fp_addr = addr + SPARC32OBSD_UTHREAD_FP_OFFSET;
gdb_byte buf[4];
gdb_assert (regnum >= -1);
fp = read_memory_unsigned_integer (fp_addr, 4, byte_order);
if (regnum == SPARC_SP_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 4, byte_order, fp);
regcache_raw_supply (regcache, SPARC_SP_REGNUM, buf);
if (regnum == SPARC_SP_REGNUM)
return;
}
if (regnum == SPARC32_PC_REGNUM || regnum == SPARC32_NPC_REGNUM
|| regnum == -1)
{
CORE_ADDR i7, i7_addr = addr + SPARC32OBSD_UTHREAD_PC_OFFSET;
i7 = read_memory_unsigned_integer (i7_addr, 4, byte_order);
if (regnum == SPARC32_PC_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 4, byte_order, i7 + 8);
regcache_raw_supply (regcache, SPARC32_PC_REGNUM, buf);
}
if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 4, byte_order, i7 + 12);
regcache_raw_supply (regcache, SPARC32_NPC_REGNUM, buf);
}
if (regnum == SPARC32_PC_REGNUM || regnum == SPARC32_NPC_REGNUM)
return;
}
sparc_supply_rwindow (regcache, fp, regnum);
}
void
sparc_supply_rwindow (struct regcache *regcache, CORE_ADDR sp, int regnum)
{
int offset = 0;
char buf[8];
int i;
if (sp & 1)
{
/* Registers are 64-bit. */
sp += BIAS;
for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
{
if (regnum == i || regnum == -1)
{
target_read_memory (sp + ((i - SPARC_L0_REGNUM) * 8), buf, 8);
regcache_raw_supply (regcache, i, buf);
}
}
}
else
{
/* Registers are 32-bit. Toss any sign-extension of the stack
pointer. */
sp &= 0xffffffffUL;
/* Clear out the top half of the temporary buffer, and put the
register value in the bottom half if we're in 64-bit mode. */
if (gdbarch_ptr_bit (current_gdbarch) == 64)
{
memset (buf, 0, 4);
offset = 4;
}
for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
{
if (regnum == i || regnum == -1)
{
target_read_memory (sp + ((i - SPARC_L0_REGNUM) * 4),
buf + offset, 4);
/* Handle StackGhost. */
if (i == SPARC_I7_REGNUM)
{
ULONGEST wcookie = sparc_fetch_wcookie ();
ULONGEST i7 = extract_unsigned_integer (buf + offset, 4);
store_unsigned_integer (buf + offset, 4, i7 ^ wcookie);
}
regcache_raw_supply (regcache, i, buf);
}
}
}
}
static CORE_ADDR
amd64_windows_push_dummy_call
(struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args,
CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[8];
/* Pass arguments. */
sp = amd64_windows_push_arguments (regcache, nargs, args, sp,
struct_return);
/* Pass "hidden" argument". */
if (struct_return)
{
/* The "hidden" argument is passed throught the first argument
register. */
const int arg_regnum = amd64_windows_dummy_call_integer_regs[0];
store_unsigned_integer (buf, 8, byte_order, struct_addr);
regcache_cooked_write (regcache, arg_regnum, buf);
}
/* Reserve some memory on the stack for the integer-parameter
registers, as required by the ABI. */
sp -= ARRAY_SIZE (amd64_windows_dummy_call_integer_regs) * 8;
/* Store return address. */
sp -= 8;
store_unsigned_integer (buf, 8, byte_order, bp_addr);
write_memory (sp, buf, 8);
/* Update the stack pointer... */
store_unsigned_integer (buf, 8, byte_order, sp);
regcache_cooked_write (regcache, AMD64_RSP_REGNUM, buf);
/* ...and fake a frame pointer. */
regcache_cooked_write (regcache, AMD64_RBP_REGNUM, buf);
return sp + 16;
}
static void
sparc64obsd_supply_uthread (struct regcache *regcache,
int regnum, CORE_ADDR addr)
{
CORE_ADDR fp, fp_addr = addr + SPARC64OBSD_UTHREAD_FP_OFFSET;
gdb_byte buf[8];
gdb_assert (regnum >= -1);
fp = read_memory_unsigned_integer (fp_addr, 8);
if (regnum == SPARC_SP_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 8, fp);
regcache_raw_supply (regcache, SPARC_SP_REGNUM, buf);
if (regnum == SPARC_SP_REGNUM)
return;
}
if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM
|| regnum == -1)
{
CORE_ADDR i7, i7_addr = addr + SPARC64OBSD_UTHREAD_PC_OFFSET;
i7 = read_memory_unsigned_integer (i7_addr, 8);
if (regnum == SPARC64_PC_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 8, i7 + 8);
regcache_raw_supply (regcache, SPARC64_PC_REGNUM, buf);
}
if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 8, i7 + 12);
regcache_raw_supply (regcache, SPARC64_NPC_REGNUM, buf);
}
if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM)
return;
}
sparc_supply_rwindow (regcache, fp, regnum);
}
static void
hppa_hpux_store_register (int regnum)
{
CORE_ADDR addr;
size_t size;
PTRACE_TYPE_RET *buf;
pid_t pid;
pid = ptid_get_pid (inferior_ptid);
/* This isn't really an address, but ptrace thinks of it as one. */
addr = hppa_hpux_save_state_offset(current_regcache, regnum);
size = register_size (current_gdbarch, regnum);
gdb_assert (size == 4 || size == 8);
buf = alloca (size);
regcache_raw_collect (current_regcache, regnum, buf);
/* Take care with the "flags" register. It's stored as an `int' in
`struct save_state', even for 64-bit code. */
if (regnum == HPPA_FLAGS_REGNUM && size == 8)
{
ULONGEST flags = extract_unsigned_integer ((gdb_byte *)buf, 8);
store_unsigned_integer ((gdb_byte *)buf, 4, flags);
size = 4;
}
#ifdef HAVE_TTRACE
{
lwpid_t lwp = ptid_get_lwp (inferior_ptid);
if (ttrace (TT_LWP_WUREGS, pid, lwp, addr, size, (uintptr_t)buf) == -1)
error (_("Couldn't write register %s (#%d): %s"),
REGISTER_NAME (regnum), regnum, safe_strerror (errno));
}
#else
{
int i;
/* Write the register contents into the inferior a chunk at the time. */
for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
{
errno = 0;
ptrace (PT_WUREGS, pid, (PTRACE_TYPE_ARG3) addr, buf[i], 0);
if (errno != 0)
error (_("Couldn't write register %s (#%d): %s"),
REGISTER_NAME (regnum), regnum, safe_strerror (errno));
addr += sizeof (PTRACE_TYPE_RET);
}
}
#endif
}
static void
iq2000_address_to_pointer (struct gdbarch *gdbarch,
struct type *type, gdb_byte *buf, CORE_ADDR addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
enum type_code target = TYPE_CODE (TYPE_TARGET_TYPE (type));
if (target == TYPE_CODE_FUNC || target == TYPE_CODE_METHOD)
addr = insn_ptr_from_addr (addr);
store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, addr);
}
void
sparc_collect_rwindow (const struct regcache *regcache,
CORE_ADDR sp, int regnum)
{
int offset = 0;
char buf[8];
int i;
if (sp & 1)
{
/* Registers are 64-bit. */
sp += BIAS;
for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
{
if (regnum == -1 || regnum == SPARC_SP_REGNUM || regnum == i)
{
regcache_raw_collect (regcache, i, buf);
target_write_memory (sp + ((i - SPARC_L0_REGNUM) * 8), buf, 8);
}
}
}
else
{
/* Registers are 32-bit. Toss any sign-extension of the stack
pointer. */
sp &= 0xffffffffUL;
/* Only use the bottom half if we're in 64-bit mode. */
if (gdbarch_ptr_bit (current_gdbarch) == 64)
offset = 4;
for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
{
if (regnum == -1 || regnum == SPARC_SP_REGNUM || regnum == i)
{
regcache_raw_collect (regcache, i, buf);
/* Handle StackGhost. */
if (i == SPARC_I7_REGNUM)
{
ULONGEST wcookie = sparc_fetch_wcookie ();
ULONGEST i7 = extract_unsigned_integer (buf + offset, 4);
store_unsigned_integer (buf + offset, 4, i7 ^ wcookie);
}
target_write_memory (sp + ((i - SPARC_L0_REGNUM) * 4),
buf + offset, 4);
}
}
}
}
static void
moxie_extract_return_value (struct type *type, struct regcache *regcache,
void *dst)
{
bfd_byte *valbuf = dst;
int len = TYPE_LENGTH (type);
ULONGEST tmp;
/* By using store_unsigned_integer we avoid having to do
anything special for small big-endian values. */
regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp);
store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), tmp);
/* Ignore return values more than 8 bytes in size because the moxie
returns anything more than 8 bytes in the stack. */
if (len > 4)
{
regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp);
store_unsigned_integer (valbuf + len - 4, 4, tmp);
}
}
static void
som_solib_create_inferior_hook (int from_tty)
{
enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch);
struct minimal_symbol *msymbol;
unsigned int dld_flags, status, have_endo;
asection *shlib_info;
char buf[4];
CORE_ADDR anaddr;
/* First, remove all the solib event breakpoints. Their addresses
may have changed since the last time we ran the program. */
remove_solib_event_breakpoints ();
if (symfile_objfile == NULL)
return;
/* First see if the objfile was dynamically linked. */
shlib_info = bfd_get_section_by_name (symfile_objfile->obfd, "$SHLIB_INFO$");
if (!shlib_info)
return;
/* It's got a $SHLIB_INFO$ section, make sure it's not empty. */
if (bfd_section_size (symfile_objfile->obfd, shlib_info) == 0)
return;
/* Read the DL header. */
bfd_get_section_contents (symfile_objfile->obfd, shlib_info,
(char *) &dl_header, 0, sizeof (dl_header));
have_endo = 0;
/* Slam the pid of the process into __d_pid.
We used to warn when this failed, but that warning is only useful
on very old HP systems (hpux9 and older). The warnings are an
annoyance to users of modern systems and foul up the testsuite as
well. As a result, the warnings have been disabled. */
msymbol = lookup_minimal_symbol ("__d_pid", NULL, symfile_objfile);
if (msymbol == NULL)
goto keep_going;
anaddr = SYMBOL_VALUE_ADDRESS (msymbol);
store_unsigned_integer (buf, 4, byte_order, PIDGET (inferior_ptid));
status = target_write_memory (anaddr, buf, 4);
if (status != 0)
{
warning (_("\
Unable to write __d_pid.\n\
Suggest linking with /opt/langtools/lib/end.o.\n\
GDB will be unable to track shl_load/shl_unload calls"));
goto keep_going;
}
static void
sparclite_serial_start (bfd_vma entry)
{
char buffer[5];
int i;
buffer[0] = 0x03;
store_unsigned_integer (buffer + 1, 4, entry);
debug_serial_write (remote_desc, buffer, 1 + 4);
i = readchar (remote_desc, remote_timeout);
if (i != 0x55)
error ("Can't start SparcLite. Error code %d\n", i);
}
static void
ft32_extract_return_value (struct type *type, struct regcache *regcache,
gdb_byte *dst)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
bfd_byte *valbuf = dst;
int len = TYPE_LENGTH (type);
ULONGEST tmp;
/* By using store_unsigned_integer we avoid having to do
anything special for small big-endian values. */
regcache_cooked_read_unsigned (regcache, FT32_R0_REGNUM, &tmp);
store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), byte_order, tmp);
/* Ignore return values more than 8 bytes in size because the ft32
returns anything more than 8 bytes in the stack. */
if (len > 4)
{
regcache_cooked_read_unsigned (regcache, FT32_R1_REGNUM, &tmp);
store_unsigned_integer (valbuf + len - 4, 4, byte_order, tmp);
}
}
static void
amd64obsd_supply_uthread (struct regcache *regcache,
int regnum, CORE_ADDR addr)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR sp_addr = addr + AMD64OBSD_UTHREAD_RSP_OFFSET;
CORE_ADDR sp = 0;
gdb_byte buf[8];
int i;
gdb_assert (regnum >= -1);
if (regnum == -1 || regnum == AMD64_RSP_REGNUM)
{
int offset;
/* Fetch stack pointer from thread structure. */
sp = read_memory_unsigned_integer (sp_addr, 8, byte_order);
/* Adjust the stack pointer such that it looks as if we just
returned from _thread_machdep_switch. */
offset = amd64obsd_uthread_reg_offset[AMD64_RIP_REGNUM] + 8;
store_unsigned_integer (buf, 8, byte_order, sp + offset);
regcache_raw_supply (regcache, AMD64_RSP_REGNUM, buf);
}
for (i = 0; i < ARRAY_SIZE (amd64obsd_uthread_reg_offset); i++)
{
if (amd64obsd_uthread_reg_offset[i] != -1
&& (regnum == -1 || regnum == i))
{
/* Fetch stack pointer from thread structure (if we didn't
do so already). */
if (sp == 0)
sp = read_memory_unsigned_integer (sp_addr, 8, byte_order);
/* Read the saved register from the stack frame. */
read_memory (sp + amd64obsd_uthread_reg_offset[i], buf, 8);
regcache_raw_supply (regcache, i, buf);
}
}
}
static void
add_to_spuid_list (bfd *abfd, asection *asect, void *list_p)
{
struct spuid_list *list = list_p;
enum bfd_endian byte_order
= bfd_big_endian (abfd) ? BFD_ENDIAN_BIG : BFD_ENDIAN_LITTLE;
int fd, pos = 0;
sscanf (bfd_section_name (abfd, asect), "SPU/%d/regs%n", &fd, &pos);
if (pos == 0)
return;
if (list->pos >= list->offset && list->pos + 4 <= list->offset + list->len)
{
store_unsigned_integer (list->buf + list->pos - list->offset,
4, byte_order, fd);
list->written += 4;
}
list->pos += 4;
}
/* Parse a string of hex digits starting at HEX, supply them as the
value of register REGNO, skip any whitespace, and return a pointer
to the next character.
There is a function in monitor.c, monitor_supply_register, which is
supposed to do this job. However, there is some rather odd stuff
in there (whitespace characters don't terminate numbers, for
example) that is incorrect for ROM68k. It's basically impossible
to safely tweak monitor_supply_register --- it's used by a zillion
other monitors; who knows what behaviors they're depending on. So
instead, we'll just use our own function, which can behave exactly
the way we want it to. */
static char *
rom68k_supply_one_register (int regno, unsigned char *hex)
{
ULONGEST value;
unsigned char regbuf[MAX_REGISTER_SIZE];
value = 0;
while (*hex != '\0')
if (is_hex_digit (*hex))
value = (value * 16) + hex_digit_value (*hex++);
else
break;
/* Skip any whitespace. */
while (is_whitespace (*hex))
hex++;
store_unsigned_integer (regbuf, DEPRECATED_REGISTER_RAW_SIZE (regno), value);
supply_register (regno, regbuf);
return hex;
}
void
default_guess_tracepoint_registers (struct gdbarch *gdbarch,
struct regcache *regcache,
CORE_ADDR addr)
{
int pc_regno = gdbarch_pc_regnum (gdbarch);
gdb_byte *regs;
/* This guessing code below only works if the PC register isn't
a pseudo-register. The value of a pseudo-register isn't stored
in the (non-readonly) regcache -- instead it's recomputed
(probably from some other cached raw register) whenever the
register is read. In this case, a custom method implementation
should be used by the architecture. */
if (pc_regno < 0 || pc_regno >= gdbarch_num_regs (gdbarch))
return;
regs = (gdb_byte *) alloca (register_size (gdbarch, pc_regno));
store_unsigned_integer (regs, register_size (gdbarch, pc_regno),
gdbarch_byte_order (gdbarch), addr);
regcache_raw_supply (regcache, pc_regno, regs);
}
static CORE_ADDR
sparc32_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
CORE_ADDR funcaddr, int using_gcc,
struct value **args, int nargs,
struct type *value_type,
CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
{
*bp_addr = sp - 4;
*real_pc = funcaddr;
if (using_struct_return (value_type, using_gcc))
{
gdb_byte buf[4];
/* This is an UNIMP instruction. */
store_unsigned_integer (buf, 4, TYPE_LENGTH (value_type) & 0x1fff);
write_memory (sp - 8, buf, 4);
return sp - 8;
}
return sp - 4;
}
void
arm_linux_supply_gregset (const struct regset *regset,
struct regcache *regcache,
int regnum, const void *gregs_buf, size_t len)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
const gdb_byte *gregs = gregs_buf;
int regno;
CORE_ADDR reg_pc;
gdb_byte pc_buf[INT_REGISTER_SIZE];
for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
if (regnum == -1 || regnum == regno)
regcache_raw_supply (regcache, regno,
gregs + INT_REGISTER_SIZE * regno);
if (regnum == ARM_PS_REGNUM || regnum == -1)
{
if (arm_apcs_32)
regcache_raw_supply (regcache, ARM_PS_REGNUM,
gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
else
regcache_raw_supply (regcache, ARM_PS_REGNUM,
gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
}
if (regnum == ARM_PC_REGNUM || regnum == -1)
{
reg_pc = extract_unsigned_integer (gregs
+ INT_REGISTER_SIZE * ARM_PC_REGNUM,
INT_REGISTER_SIZE, byte_order);
reg_pc = gdbarch_addr_bits_remove (gdbarch, reg_pc);
store_unsigned_integer (pc_buf, INT_REGISTER_SIZE, byte_order, reg_pc);
regcache_raw_supply (regcache, ARM_PC_REGNUM, pc_buf);
}
}
static enum register_status
msp430_pseudo_register_read (struct gdbarch *gdbarch,
struct regcache *regcache,
int regnum, gdb_byte *buffer)
{
enum register_status status = REG_UNKNOWN;
if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
{
ULONGEST val;
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int regsize = register_size (gdbarch, regnum);
int raw_regnum = regnum - MSP430_NUM_REGS;
status = regcache_raw_read_unsigned (regcache, raw_regnum, &val);
if (status == REG_VALID)
store_unsigned_integer (buffer, regsize, byte_order, val);
}
else
gdb_assert_not_reached ("invalid pseudo register number");
return status;
}
static void
sparc32_frame_prev_register (struct frame_info *next_frame, void **this_cache,
int regnum, int *optimizedp,
enum lval_type *lvalp, CORE_ADDR *addrp,
int *realnump, gdb_byte *valuep)
{
struct sparc_frame_cache *cache =
sparc32_frame_cache (next_frame, this_cache);
if (regnum == SPARC32_PC_REGNUM || regnum == SPARC32_NPC_REGNUM)
{
*optimizedp = 0;
*lvalp = not_lval;
*addrp = 0;
*realnump = -1;
if (valuep)
{
CORE_ADDR pc = (regnum == SPARC32_NPC_REGNUM) ? 4 : 0;
/* If this functions has a Structure, Union or
Quad-Precision return value, we have to skip the UNIMP
instruction that encodes the size of the structure. */
if (cache->struct_return_p)
pc += 4;
regnum = cache->frameless_p ? SPARC_O7_REGNUM : SPARC_I7_REGNUM;
pc += frame_unwind_register_unsigned (next_frame, regnum) + 8;
store_unsigned_integer (valuep, 4, pc);
}
return;
}
/* Handle StackGhost. */
{
ULONGEST wcookie = sparc_fetch_wcookie ();
if (wcookie != 0 && !cache->frameless_p && regnum == SPARC_I7_REGNUM)
{
*optimizedp = 0;
*lvalp = not_lval;
*addrp = 0;
*realnump = -1;
if (valuep)
{
CORE_ADDR addr = cache->base + (regnum - SPARC_L0_REGNUM) * 4;
ULONGEST i7;
/* Read the value in from memory. */
i7 = get_frame_memory_unsigned (next_frame, addr, 4);
store_unsigned_integer (valuep, 4, i7 ^ wcookie);
}
return;
}
}
/* The previous frame's `local' and `in' registers have been saved
in the register save area. */
if (!cache->frameless_p
&& regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM)
{
*optimizedp = 0;
*lvalp = lval_memory;
*addrp = cache->base + (regnum - SPARC_L0_REGNUM) * 4;
*realnump = -1;
if (valuep)
{
struct gdbarch *gdbarch = get_frame_arch (next_frame);
/* Read the value in from memory. */
read_memory (*addrp, valuep, register_size (gdbarch, regnum));
}
return;
}
/* The previous frame's `out' registers are accessable as the
current frame's `in' registers. */
if (!cache->frameless_p
&& regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM);
*optimizedp = 0;
*lvalp = lval_register;
*addrp = 0;
*realnump = regnum;
if (valuep)
frame_unwind_register (next_frame, (*realnump), valuep);
}