static void svga_set_framebuffer_state(struct pipe_context *pipe,
const struct pipe_framebuffer_state *fb)
{
struct svga_context *svga = svga_context(pipe);
struct pipe_framebuffer_state *dst = &svga->curr.framebuffer;
boolean propagate = FALSE;
int i;
dst->width = fb->width;
dst->height = fb->height;
dst->nr_cbufs = fb->nr_cbufs;
/* check if we need to propaget any of the target surfaces */
for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
if (dst->cbufs[i] && dst->cbufs[i] != fb->cbufs[i])
if (svga_surface_needs_propagation(dst->cbufs[i]))
propagate = TRUE;
}
if (propagate) {
/* make sure that drawing calls comes before propagation calls */
svga_hwtnl_flush_retry( svga );
for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++)
if (dst->cbufs[i] && dst->cbufs[i] != fb->cbufs[i])
svga_propagate_surface(pipe, dst->cbufs[i]);
}
/* XXX: Actually the virtual hardware may support rendertargets with
* different size, depending on the host API and driver, but since we cannot
* know that make no such assumption here. */
for(i = 0; i < fb->nr_cbufs; ++i) {
if (fb->zsbuf && fb->cbufs[i]) {
assert(fb->zsbuf->width == fb->cbufs[i]->width);
assert(fb->zsbuf->height == fb->cbufs[i]->height);
}
}
for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++)
pipe_surface_reference(&dst->cbufs[i], fb->cbufs[i]);
pipe_surface_reference(&dst->zsbuf, fb->zsbuf);
if (svga->curr.framebuffer.zsbuf)
{
switch (svga->curr.framebuffer.zsbuf->format) {
case PIPE_FORMAT_Z16_UNORM:
svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D16;
break;
case PIPE_FORMAT_S8Z24_UNORM:
case PIPE_FORMAT_X8Z24_UNORM:
case PIPE_FORMAT_Z24S8_UNORM:
case PIPE_FORMAT_Z24X8_UNORM:
svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D24S8;
break;
case PIPE_FORMAT_Z32_UNORM:
svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D32;
break;
case PIPE_FORMAT_Z32_FLOAT:
svga->curr.depthscale = 1.0f / ((float)(1<<23));
break;
default:
svga->curr.depthscale = 0.0f;
break;
}
}
else {
svga->curr.depthscale = 0.0f;
}
svga->dirty |= SVGA_NEW_FRAME_BUFFER;
}
static void svga_set_framebuffer_state(struct pipe_context *pipe,
const struct pipe_framebuffer_state *fb)
{
struct svga_context *svga = svga_context(pipe);
struct pipe_framebuffer_state *dst = &svga->curr.framebuffer;
boolean propagate = FALSE;
unsigned i;
/* make sure any pending drawing calls are flushed before changing
* the framebuffer state
*/
svga_hwtnl_flush_retry(svga);
dst->width = fb->width;
dst->height = fb->height;
dst->nr_cbufs = fb->nr_cbufs;
/* check if we need to propagate any of the target surfaces */
for (i = 0; i < dst->nr_cbufs; i++) {
struct pipe_surface *s = i < fb->nr_cbufs ? fb->cbufs[i] : NULL;
if (dst->cbufs[i] && dst->cbufs[i] != s) {
if (svga_surface_needs_propagation(dst->cbufs[i])) {
propagate = TRUE;
break;
}
}
}
if (propagate) {
for (i = 0; i < dst->nr_cbufs; i++) {
struct pipe_surface *s = i < fb->nr_cbufs ? fb->cbufs[i] : NULL;
if (dst->cbufs[i] && dst->cbufs[i] != s)
svga_propagate_surface(svga, dst->cbufs[i]);
}
}
/* Check that all surfaces are the same size.
* Actually, the virtual hardware may support rendertargets with
* different size, depending on the host API and driver,
*/
{
int width = 0, height = 0;
if (fb->zsbuf) {
width = fb->zsbuf->width;
height = fb->zsbuf->height;
}
for (i = 0; i < fb->nr_cbufs; ++i) {
if (fb->cbufs[i]) {
if (width && height) {
if (fb->cbufs[i]->width != width ||
fb->cbufs[i]->height != height) {
debug_warning("Mixed-size color and depth/stencil surfaces "
"may not work properly");
}
}
else {
width = fb->cbufs[i]->width;
height = fb->cbufs[i]->height;
}
}
}
}
util_copy_framebuffer_state(dst, fb);
/* Set the rendered-to flags */
for (i = 0; i < dst->nr_cbufs; i++) {
struct pipe_surface *s = dst->cbufs[i];
if (s) {
struct svga_texture *t = svga_texture(s->texture);
svga_set_texture_rendered_to(t, s->u.tex.first_layer, s->u.tex.level);
}
}
if (svga->curr.framebuffer.zsbuf)
{
switch (svga->curr.framebuffer.zsbuf->format) {
case PIPE_FORMAT_Z16_UNORM:
svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D16;
break;
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
case PIPE_FORMAT_Z24X8_UNORM:
case PIPE_FORMAT_S8_UINT_Z24_UNORM:
case PIPE_FORMAT_X8Z24_UNORM:
svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D24S8;
break;
case PIPE_FORMAT_Z32_UNORM:
svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D32;
break;
case PIPE_FORMAT_Z32_FLOAT:
svga->curr.depthscale = 1.0f / ((float)(1<<23));
break;
default:
svga->curr.depthscale = 0.0f;
break;
}
/* Set rendered-to flag */
{
struct pipe_surface *s = dst->zsbuf;
struct svga_texture *t = svga_texture(s->texture);
svga_set_texture_rendered_to(t, s->u.tex.first_layer, s->u.tex.level);
}
}
else {
svga->curr.depthscale = 0.0f;
}
svga->dirty |= SVGA_NEW_FRAME_BUFFER;
}
static void svga_set_framebuffer_state(struct pipe_context *pipe,
const struct pipe_framebuffer_state *fb)
{
struct svga_context *svga = svga_context(pipe);
struct pipe_framebuffer_state *dst = &svga->curr.framebuffer;
boolean propagate = FALSE;
unsigned i;
dst->width = fb->width;
dst->height = fb->height;
dst->nr_cbufs = fb->nr_cbufs;
/* check if we need to propagate any of the target surfaces */
for (i = 0; i < dst->nr_cbufs; i++) {
struct pipe_surface *s = i < fb->nr_cbufs ? fb->cbufs[i] : NULL;
if (dst->cbufs[i] && dst->cbufs[i] != s) {
if (svga_surface_needs_propagation(dst->cbufs[i])) {
propagate = TRUE;
break;
}
}
}
if (propagate) {
/* make sure that drawing calls comes before propagation calls */
svga_hwtnl_flush_retry( svga );
for (i = 0; i < dst->nr_cbufs; i++) {
struct pipe_surface *s = i < fb->nr_cbufs ? fb->cbufs[i] : NULL;
if (dst->cbufs[i] && dst->cbufs[i] != s)
svga_propagate_surface(svga, dst->cbufs[i]);
}
}
/* XXX: Actually the virtual hardware may support rendertargets with
* different size, depending on the host API and driver, but since we cannot
* know that make no such assumption here. */
for(i = 0; i < fb->nr_cbufs; ++i) {
if (fb->zsbuf && fb->cbufs[i]) {
assert(fb->zsbuf->width == fb->cbufs[i]->width);
assert(fb->zsbuf->height == fb->cbufs[i]->height);
}
}
util_copy_framebuffer_state(dst, fb);
/* Set the rendered-to flags */
for (i = 0; i < dst->nr_cbufs; i++) {
struct pipe_surface *s = dst->cbufs[i];
if (s) {
struct svga_texture *t = svga_texture(s->texture);
svga_set_texture_rendered_to(t, s->u.tex.first_layer, s->u.tex.level);
}
}
if (svga->curr.framebuffer.zsbuf)
{
switch (svga->curr.framebuffer.zsbuf->format) {
case PIPE_FORMAT_Z16_UNORM:
svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D16;
break;
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
case PIPE_FORMAT_Z24X8_UNORM:
case PIPE_FORMAT_S8_UINT_Z24_UNORM:
case PIPE_FORMAT_X8Z24_UNORM:
svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D24S8;
break;
case PIPE_FORMAT_Z32_UNORM:
svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D32;
break;
case PIPE_FORMAT_Z32_FLOAT:
svga->curr.depthscale = 1.0f / ((float)(1<<23));
break;
default:
svga->curr.depthscale = 0.0f;
break;
}
/* Set rendered-to flag */
{
struct pipe_surface *s = dst->zsbuf;
struct svga_texture *t = svga_texture(s->texture);
svga_set_texture_rendered_to(t, s->u.tex.first_layer, s->u.tex.level);
}
}
else {
svga->curr.depthscale = 0.0f;
}
svga->dirty |= SVGA_NEW_FRAME_BUFFER;
}
