int do_hw_test(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
char *cmd;
if (argc != 2) {
printf("Usage:\n%s\n", cmdtp->usage);
return 1;
}
cmd = argv[1];
switch (cmd[0]) {
case 'a': /* all */
test_pld();
test_led();
test_dipsw();
test_sm107();
test_net();
test_sata();
test_pci();
break;
case 'p': /* pld or pci */
if (cmd[1] == 'l')
test_pld();
else
test_pci();
break;
case 'l': /* led */
test_led();
break;
case 'd': /* dipsw */
test_dipsw();
break;
case 's': /* sm107 or sata */
if (cmd[1] == 'm')
test_sm107();
else
test_sata();
break;
case 'n': /* net */
test_net();
break;
default:
printf("Usage:\n%s\n", cmdtp->usage);
return 1;
}
return 0;
}
/*******************************************************************************
* MAIN FUNCTION *
*******************************************************************************/
int main(void)
{
unsigned char test_no = 0;
// Clear all ports.
LATA = 0;
LATB = 0;
LATC = 0;
LATD = 0;
LATF = 0;
// Initialize I/O directions.
TRISA = 0; // dsPIC30F4013 & 3014 have PORTA
TRISAbits.TRISA11 = 1; // SW1 is connected at RA11
TRISB = 0;
TRISC = 0;
TRISD = 0;
TRISDbits.TRISD8 = 1; // SW2 is connected at RD8
TRISF = 0;
// Wait 1ms before we start the loop.
beep(2);
delay_ms(200);
lcd_initialize(); // initialize LCD
lcd_clear();
lcd_putstr(" Cytron\n Technologies"); //Buzzer and LED share same output pin
delay_ms(1500);
lcd_clear();
lcd_putstr(" SKds40A\n dsPIC30F4013");
delay_ms(1500);
LED1 = 0;
LED2 = 0;
test_switch(); //need to ensure switches is working before other test
test_no = 1;
// Testing LEDs, UARTs (1, 2 and Alternative)
while(1){
lcd_2ndline_msg("1-> +, 2->Test"); //display the message for test menu navigation
switch (test_no) //start the switch case to check which test mode to execute
{
case 1:
lcd_1stline_msg("1. Test All"); //mode 1 is to run all test sequentially
if (SW2 == 0) // if SW2 is press, to select the mode and run
{ while (SW2 == 0); // waiting for SW3 to be let go
test_led(); // Test LEDs
test_uart1(); // Test UART1
test_uart2(); // Test UART2
test_uart1a(); // Test UART1 Alternative
}
break;
case 2: // mode 2, test LEDs on SKds40A
lcd_1stline_msg("2: Test LEDs");
if (SW2 == 0)
{
while (SW2 == 0);
test_led(); // Test LEDs
}
break;
case 3: // mode 3, test UART1, ensure jumper at Tx and RX Selector is connected to TX1 and RX1 respectively
lcd_1stline_msg("3: Test UART1");
if (SW2 == 0)
{
while (SW2 == 0);
test_uart1(); // Test UART1
}
break;
case 4: // mode 4, test UART2, ensure jumper at Tx and RX Selector is connected to TX2 and RX2 respectively
lcd_1stline_msg("4: Test UART2");
if (SW2 == 0)
{
while (SW2 == 0);
test_uart2(); // Test UART2
}
break;
case 5: // mode 5, test UART1A, ensure jumper at Tx and RX Selector is connected to TX1A and RX1A respectively
lcd_1stline_msg("5: Test UART1A");
if (SW2 == 0)
{
while (SW2 == 0);
test_uart1a(); // Test UART1A
}
break;
}//switch (test_no)
// If SW1 is pressed...
if (SW1 == 0)
{
if (++test_no > 5) // if SW1 is press increase the test number until it is max and loop back
{
test_no = 1;
}
while (SW1 == 0); //wait for SW1 to be released
beep(1);
}
} // while (1)
}
int board_early_init_f (void)
{
#if defined(CONFIG_W7OLMG)
/*
* Setup GPIO pins - reset devices.
*/
out32 (IBM405GP_GPIO0_ODR, 0x10000000); /* one open drain pin */
out32 (IBM405GP_GPIO0_OR, 0x3E000000); /* set output pins to default */
out32 (IBM405GP_GPIO0_TCR, 0x7f800000); /* setup for output */
/*
* IRQ 0-15 405GP internally generated; active high; level sensitive
* IRQ 16 405GP internally generated; active low; level sensitive
* IRQ 17-24 RESERVED
* IRQ 25 (EXT IRQ 0) XILINX; active low; level sensitive
* IRQ 26 (EXT IRQ 1) PCI INT A; active low; level sensitive
* IRQ 27 (EXT IRQ 2) PCI INT B; active low; level sensitive
* IRQ 28 (EXT IRQ 3) SAM 2; active low; level sensitive
* IRQ 29 (EXT IRQ 4) Battery Bad; active low; level sensitive
* IRQ 30 (EXT IRQ 5) Level One PHY; active low; level sensitive
* IRQ 31 (EXT IRQ 6) SAM 1; active high; level sensitive
*/
mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
mtdcr (uicer, 0x00000000); /* disable all ints */
mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */
mtdcr (uictr, 0x10000000); /* set int trigger levels */
mtdcr (uicvcr, 0x00000001); /* set vect base=0,
INT0 highest priority */
mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
#elif defined(CONFIG_W7OLMC)
/*
* Setup GPIO pins
*/
out32 (IBM405GP_GPIO0_ODR, 0x01800000); /* XCV Done Open Drain */
out32 (IBM405GP_GPIO0_OR, 0x03800000); /* set out pins to default */
out32 (IBM405GP_GPIO0_TCR, 0x66C00000); /* setup for output */
/*
* IRQ 0-15 405GP internally generated; active high; level sensitive
* IRQ 16 405GP internally generated; active low; level sensitive
* IRQ 17-24 RESERVED
* IRQ 25 (EXT IRQ 0) DBE 0; active low; level sensitive
* IRQ 26 (EXT IRQ 1) DBE 1; active low; level sensitive
* IRQ 27 (EXT IRQ 2) DBE 2; active low; level sensitive
* IRQ 28 (EXT IRQ 3) DBE Common; active low; level sensitive
* IRQ 29 (EXT IRQ 4) PCI; active low; level sensitive
* IRQ 30 (EXT IRQ 5) RCMM Reset; active low; level sensitive
* IRQ 31 (EXT IRQ 6) PHY; active high; level sensitive
*/
mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
mtdcr (uicer, 0x00000000); /* disable all ints */
mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */
mtdcr (uictr, 0x10000000); /* set int trigger levels */
mtdcr (uicvcr, 0x00000001); /* set vect base=0,
INT0 highest priority */
mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
#else /* Unknown */
# error "Unknown W7O board configuration"
#endif
WATCHDOG_RESET (); /* Reset the watchdog */
temp_uart_init (); /* init the uart for debug */
WATCHDOG_RESET (); /* Reset the watchdog */
test_led (); /* test the LEDs */
test_sdram (get_dram_size ()); /* test the dram */
log_stat (ERR_POST1); /* log status,post1 complete */
return 0;
}
/*
* Write a buffer from memory to flash:
* 0. Assumption: Caller has already erased the appropriate sectors.
* 1. call page programming for every 256 bytes
*/
int
write_buff(flash_info_t *info, uchar *source, ulong addr, ulong len)
{
int total = 0, len_this_lp, bytes_this_page;
ulong dst;
uchar *src;
#if (defined(CONFIG_WNDR3700U_LED) || defined(CONFIG_WNDR3700V1H2_LED) || defined(CONFIG_HW29763654P16P128)) && defined(CFG_NMRP)
int n_alive=2,send_alive=0;
Nmrp_active_start=get_timer(0);
#endif
#if (defined(CONFIG_WNDR3700U_LED) || defined(CONFIG_WNDR3700V1H2_LED) || defined(CONFIG_HW29763654P16P128)) && defined(FIRMWARE_RECOVER_FROM_TFTP_SERVER)
NetSetTimeout (CFG_HZ/10,Update_LedSet);
#endif
printf ("write addr: %x\n", addr);
addr = addr - CFG_FLASH_BASE;
while(total < len) {
src = source + total;
dst = addr + total;
bytes_this_page = AR7100_SPI_PAGE_SIZE - (addr % AR7100_SPI_PAGE_SIZE);
len_this_lp = ((len - total) > bytes_this_page) ? bytes_this_page
: (len - total);
#if (defined(CONFIG_WNDR3700U_LED) || defined(CONFIG_WNDR3700V1H2_LED) || defined(CONFIG_HW29763654P16P128)) && defined(FIRMWARE_RECOVER_FROM_TFTP_SERVER)
if (timeHandler && ((get_timer(0) - timeStart) > timeDelta)) {
thand_f *x;
x = timeHandler;
timeHandler = (thand_f *)0;
(*x)();
}
#endif
#if (defined(CONFIG_WNDR3700U_LED) || defined(CONFIG_WNDR3700V1H2_LED) || defined(CONFIG_HW29763654P16P128)) && defined(CFG_NMRP)
/*
* send Keep Alive Req every 15s, I find the timer is not
* accurate if the time is more than 10s, so I record the time
* every 5s
*/
if(NmrpState !=0 && ((get_timer(0) - Nmrp_active_start) > (5* CFG_HZ) ) )
{
n_alive++;
send_alive=1;
Nmrp_active_start=get_timer(0);
}
if (send_alive && n_alive%3==0)
{
NmrpState = STATE_KEEP_ALIVE;
NmrpSend();
send_alive=0;
}
#endif
ar7100_spi_write_page(dst, src, len_this_lp);
total += len_this_lp;
}
#if defined(CONFIG_WNDR3700U_LED) && defined(FIRMWARE_RECOVER_FROM_TFTP_SERVER)
/*write finished , test led on*/
test_led(0);
#endif
#if (defined(CONFIG_WNDR3700V1H2_LED) || defined(CONFIG_HW29763654P16P128)) && defined(FIRMWARE_RECOVER_FROM_TFTP_SERVER)
/*write finished , test led on*/
board_test_led(0);
#endif
#if (defined(CONFIG_WNDR3700U_LED) || defined(CONFIG_WNDR3700V1H2_LED) || defined(CONFIG_HW29763654P16P128)) && defined(CFG_NMRP)
if(NmrpState !=0)
NmrpState=STATE_CLOSING;
#endif
ar7100_spi_done();
return 0;
}
