static struct sparc_frame_cache *
sparc64fbsd_trapframe_cache (struct frame_info *this_frame, void **this_cache)
{
struct sparc_frame_cache *cache;
CORE_ADDR fp, sp, trapframe_addr;
int regnum;
if (*this_cache)
return (struct sparc_frame_cache *)*this_cache;
cache = sparc_frame_cache (this_frame, this_cache);
gdb_assert (cache == *this_cache);
fp = get_frame_register_unsigned (this_frame, SPARC_FP_REGNUM);
trapframe_addr = fp + BIAS - TRAPFRAME_SIZE;
sp = get_frame_register_unsigned (this_frame, SPARC_SP_REGNUM);
cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
cache->saved_regs[SPARC_SP_REGNUM].addr = trapframe_addr + OFF_TF_SP;
#ifdef notyet
cache->saved_regs[SPARC64_STATE_REGNUM].addr = trapframe_addr + OFF_TF_TSTATE;
#endif
cache->saved_regs[SPARC64_PC_REGNUM].addr = trapframe_addr + OFF_TF_TPC;
cache->saved_regs[SPARC64_NPC_REGNUM].addr = trapframe_addr + OFF_TF_TNPC;
for (regnum = SPARC_O0_REGNUM; regnum <= SPARC_O7_REGNUM; regnum++)
cache->saved_regs[regnum].addr =
trapframe_addr + OFF_TF_OUT + (regnum - SPARC_O0_REGNUM) * 8;
for (regnum = SPARC_L0_REGNUM; regnum <= SPARC_I7_REGNUM; regnum++)
cache->saved_regs[regnum].addr =
sp + BIAS + (regnum - SPARC_L0_REGNUM) * 8;
return cache;
}
static struct tilegx_frame_cache *
tilegx_frame_cache (struct frame_info *this_frame, void **this_cache)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct tilegx_frame_cache *cache;
CORE_ADDR current_pc;
if (*this_cache)
return (struct tilegx_frame_cache *) *this_cache;
cache = FRAME_OBSTACK_ZALLOC (struct tilegx_frame_cache);
*this_cache = cache;
cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
cache->base = 0;
cache->start_pc = get_frame_func (this_frame);
current_pc = get_frame_pc (this_frame);
cache->base = get_frame_register_unsigned (this_frame, TILEGX_SP_REGNUM);
trad_frame_set_value (cache->saved_regs, TILEGX_SP_REGNUM, cache->base);
if (cache->start_pc)
tilegx_analyze_prologue (gdbarch, cache->start_pc, current_pc,
cache, this_frame);
cache->saved_regs[TILEGX_PC_REGNUM] = cache->saved_regs[TILEGX_LR_REGNUM];
return cache;
}
static struct sparc_frame_cache *
sparc64obsd_trapframe_cache (struct frame_info *this_frame, void **this_cache)
{
struct sparc_frame_cache *cache;
CORE_ADDR sp, trapframe_addr;
int regnum;
if (*this_cache)
return (struct sparc_frame_cache *) *this_cache;
cache = sparc_frame_cache (this_frame, this_cache);
gdb_assert (cache == *this_cache);
sp = get_frame_register_unsigned (this_frame, SPARC_SP_REGNUM);
trapframe_addr = sp + BIAS + 176;
cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
cache->saved_regs[SPARC64_STATE_REGNUM].addr = trapframe_addr;
cache->saved_regs[SPARC64_PC_REGNUM].addr = trapframe_addr + 8;
cache->saved_regs[SPARC64_NPC_REGNUM].addr = trapframe_addr + 16;
for (regnum = SPARC_G0_REGNUM; regnum <= SPARC_I7_REGNUM; regnum++)
cache->saved_regs[regnum].addr =
trapframe_addr + 48 + (regnum - SPARC_G0_REGNUM) * 8;
return cache;
}
struct m88k_frame_cache *
m88k_frame_cache (struct frame_info *next_frame, void **this_cache)
{
struct m88k_frame_cache *cache;
CORE_ADDR frame_sp;
if (*this_cache)
return *this_cache;
cache = FRAME_OBSTACK_ZALLOC (struct m88k_frame_cache);
cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
cache->fp_offset = -1;
cache->pc = frame_func_unwind (next_frame);
if (cache->pc != 0)
{
CORE_ADDR addr_in_block = frame_unwind_address_in_block (next_frame);
m88k_analyze_prologue (cache->pc, addr_in_block, cache);
}
/* Calculate the stack pointer used in the prologue. */
if (cache->fp_offset != -1)
{
CORE_ADDR fp;
fp = frame_unwind_register_unsigned (next_frame, M88K_R30_REGNUM);
frame_sp = fp - cache->fp_offset;
}
else
{
/* If we know where the return address is saved, we can take a
solid guess at what the frame pointer should be. */
if (cache->saved_regs[M88K_R1_REGNUM].addr != -1)
cache->fp_offset = cache->saved_regs[M88K_R1_REGNUM].addr - 4;
frame_sp = frame_unwind_register_unsigned (next_frame, M88K_R31_REGNUM);
}
/* Now that we know the stack pointer, adjust the location of the
saved registers. */
{
int regnum;
for (regnum = M88K_R0_REGNUM; regnum < M88K_R31_REGNUM; regnum ++)
if (cache->saved_regs[regnum].addr != -1)
cache->saved_regs[regnum].addr += frame_sp;
}
/* Calculate the frame's base. */
cache->base = frame_sp - cache->sp_offset;
trad_frame_set_value (cache->saved_regs, M88K_R31_REGNUM, cache->base);
/* Identify SXIP with the return address in R1. */
cache->saved_regs[M88K_SXIP_REGNUM] = cache->saved_regs[M88K_R1_REGNUM];
*this_cache = cache;
return cache;
}
static struct sparc_frame_cache *
sparc64_sol2_sigtramp_frame_cache (struct frame_info *this_frame,
void **this_cache)
{
struct sparc_frame_cache *cache;
CORE_ADDR mcontext_addr, addr;
int regnum;
if (*this_cache)
return *this_cache;
cache = sparc_frame_cache (this_frame, this_cache);
gdb_assert (cache == *this_cache);
cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
/* The third argument is a pointer to an instance of `ucontext_t',
which has a member `uc_mcontext' that contains the saved
registers. */
regnum =
(cache->copied_regs_mask & 0x04) ? SPARC_I2_REGNUM : SPARC_O2_REGNUM;
mcontext_addr = get_frame_register_unsigned (this_frame, regnum) + 64;
cache->saved_regs[SPARC64_CCR_REGNUM].addr = mcontext_addr + 0 * 8;
cache->saved_regs[SPARC64_PC_REGNUM].addr = mcontext_addr + 1 * 8;
cache->saved_regs[SPARC64_NPC_REGNUM].addr = mcontext_addr + 2 * 8;
cache->saved_regs[SPARC64_Y_REGNUM].addr = mcontext_addr + 3 * 8;
cache->saved_regs[SPARC64_ASI_REGNUM].addr = mcontext_addr + 19 * 8;
cache->saved_regs[SPARC64_FPRS_REGNUM].addr = mcontext_addr + 20 * 8;
/* Since %g0 is always zero, keep the identity encoding. */
for (regnum = SPARC_G1_REGNUM, addr = mcontext_addr + 4 * 8;
regnum <= SPARC_O7_REGNUM; regnum++, addr += 8)
cache->saved_regs[regnum].addr = addr;
if (get_frame_memory_unsigned (this_frame, mcontext_addr + 21 * 8, 8))
{
/* The register windows haven't been flushed. */
for (regnum = SPARC_L0_REGNUM; regnum <= SPARC_I7_REGNUM; regnum++)
trad_frame_set_unknown (cache->saved_regs, regnum);
}
else
{
CORE_ADDR sp;
addr = cache->saved_regs[SPARC_SP_REGNUM].addr;
sp = get_frame_memory_unsigned (this_frame, addr, 8);
for (regnum = SPARC_L0_REGNUM, addr = sp + BIAS;
regnum <= SPARC_I7_REGNUM; regnum++, addr += 8)
cache->saved_regs[regnum].addr = addr;
}
return cache;
}
static struct lm32_frame_cache *
lm32_frame_cache (struct frame_info *this_frame, void **this_prologue_cache)
{
CORE_ADDR prologue_pc;
CORE_ADDR current_pc;
ULONGEST prev_sp;
ULONGEST this_base;
struct lm32_frame_cache *info;
int prefixed;
unsigned long instruction;
int op;
int offsets[32];
int i;
long immediate;
if ((*this_prologue_cache))
return (*this_prologue_cache);
info = FRAME_OBSTACK_ZALLOC (struct lm32_frame_cache);
(*this_prologue_cache) = info;
info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
info->pc = get_frame_func (this_frame);
current_pc = get_frame_pc (this_frame);
lm32_analyze_prologue (get_frame_arch (this_frame),
info->pc, current_pc, info);
/* Compute the frame's base, and the previous frame's SP. */
this_base = get_frame_register_unsigned (this_frame, SIM_LM32_SP_REGNUM);
prev_sp = this_base + info->size;
info->base = this_base;
/* Convert callee save offsets into addresses. */
for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++)
{
if (trad_frame_addr_p (info->saved_regs, i))
info->saved_regs[i].addr = this_base + info->saved_regs[i].addr;
}
/* The call instruction moves the caller's PC in the callee's RA register.
Since this is an unwind, do the reverse. Copy the location of RA register
into PC (the address / regnum) so that a request for PC will be
converted into a request for the RA register. */
info->saved_regs[SIM_LM32_PC_REGNUM] = info->saved_regs[SIM_LM32_RA_REGNUM];
/* The previous frame's SP needed to be computed. Save the computed
value. */
trad_frame_set_value (info->saved_regs, SIM_LM32_SP_REGNUM, prev_sp);
return info;
}
static struct sparc_frame_cache *
sparc32_sol2_sigtramp_frame_cache (struct frame_info *next_frame,
void **this_cache)
{
struct sparc_frame_cache *cache;
CORE_ADDR mcontext_addr, addr;
int regnum;
if (*this_cache)
return *this_cache;
cache = sparc_frame_cache (next_frame, this_cache);
gdb_assert (cache == *this_cache);
cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
/* The third argument is a pointer to an instance of `ucontext_t',
which has a member `uc_mcontext' that contains the saved
registers. */
regnum = (cache->frameless_p ? SPARC_O2_REGNUM : SPARC_I2_REGNUM);
mcontext_addr = frame_unwind_register_unsigned (next_frame, regnum) + 40;
cache->saved_regs[SPARC32_PSR_REGNUM].addr = mcontext_addr + 0 * 4;
cache->saved_regs[SPARC32_PC_REGNUM].addr = mcontext_addr + 1 * 4;
cache->saved_regs[SPARC32_NPC_REGNUM].addr = mcontext_addr + 2 * 4;
cache->saved_regs[SPARC32_Y_REGNUM].addr = mcontext_addr + 3 * 4;
/* Since %g0 is always zero, keep the identity encoding. */
for (regnum = SPARC_G1_REGNUM, addr = mcontext_addr + 4 * 4;
regnum <= SPARC_O7_REGNUM; regnum++, addr += 4)
cache->saved_regs[regnum].addr = addr;
if (get_frame_memory_unsigned (next_frame, mcontext_addr + 19 * 4, 4))
{
/* The register windows haven't been flushed. */
for (regnum = SPARC_L0_REGNUM; regnum <= SPARC_I7_REGNUM; regnum++)
trad_frame_set_unknown (cache->saved_regs, regnum);
}
else
{
addr = cache->saved_regs[SPARC_SP_REGNUM].addr;
addr = get_frame_memory_unsigned (next_frame, addr, 4);
for (regnum = SPARC_L0_REGNUM;
regnum <= SPARC_I7_REGNUM; regnum++, addr += 4)
cache->saved_regs[regnum].addr = addr;
}
return cache;
}
struct trad_frame_saved_reg *
sparc64nbsd_sigcontext_saved_regs (CORE_ADDR sigcontext_addr,
struct frame_info *next_frame)
{
struct trad_frame_saved_reg *saved_regs;
CORE_ADDR addr, sp;
int regnum, delta;
saved_regs = trad_frame_alloc_saved_regs (next_frame);
/* The registers are saved in bits and pieces scattered all over the
place. The code below records their location on the assumption
that the part of the signal trampoline that saves the state has
been executed. */
saved_regs[SPARC_SP_REGNUM].addr = sigcontext_addr + 8;
saved_regs[SPARC64_PC_REGNUM].addr = sigcontext_addr + 16;
saved_regs[SPARC64_NPC_REGNUM].addr = sigcontext_addr + 24;
saved_regs[SPARC64_STATE_REGNUM].addr = sigcontext_addr + 32;
saved_regs[SPARC_G1_REGNUM].addr = sigcontext_addr + 40;
saved_regs[SPARC_O0_REGNUM].addr = sigcontext_addr + 48;
/* The remaining `global' registers and %y are saved in the `local'
registers. */
delta = SPARC_L0_REGNUM - SPARC_G0_REGNUM;
for (regnum = SPARC_G2_REGNUM; regnum <= SPARC_G7_REGNUM; regnum++)
saved_regs[regnum].realreg = regnum + delta;
saved_regs[SPARC64_Y_REGNUM].realreg = SPARC_L1_REGNUM;
/* The remaining `out' registers can be found in the current frame's
`in' registers. */
delta = SPARC_I0_REGNUM - SPARC_O0_REGNUM;
for (regnum = SPARC_O1_REGNUM; regnum <= SPARC_O5_REGNUM; regnum++)
saved_regs[regnum].realreg = regnum + delta;
saved_regs[SPARC_O7_REGNUM].realreg = SPARC_I7_REGNUM;
/* The `local' and `in' registers have been saved in the register
save area. */
addr = saved_regs[SPARC_SP_REGNUM].addr;
sp = get_frame_memory_unsigned (next_frame, addr, 8);
for (regnum = SPARC_L0_REGNUM, addr = sp + BIAS;
regnum <= SPARC_I7_REGNUM; regnum++, addr += 8)
saved_regs[regnum].addr = addr;
/* TODO: Handle the floating-point registers. */
return saved_regs;
}
struct trad_frame_saved_reg *
sparc32nbsd_sigcontext_saved_regs (struct frame_info *this_frame)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct trad_frame_saved_reg *saved_regs;
CORE_ADDR addr, sigcontext_addr;
int regnum, delta;
ULONGEST psr;
saved_regs = trad_frame_alloc_saved_regs (this_frame);
/* We find the appropriate instance of `struct sigcontext' at a
fixed offset in the signal frame. */
addr = get_frame_register_unsigned (this_frame, SPARC_FP_REGNUM);
sigcontext_addr = addr + 64 + 16;
/* The registers are saved in bits and pieces scattered all over the
place. The code below records their location on the assumption
that the part of the signal trampoline that saves the state has
been executed. */
saved_regs[SPARC_SP_REGNUM].addr = sigcontext_addr + 8;
saved_regs[SPARC32_PC_REGNUM].addr = sigcontext_addr + 12;
saved_regs[SPARC32_NPC_REGNUM].addr = sigcontext_addr + 16;
saved_regs[SPARC32_PSR_REGNUM].addr = sigcontext_addr + 20;
saved_regs[SPARC_G1_REGNUM].addr = sigcontext_addr + 24;
saved_regs[SPARC_O0_REGNUM].addr = sigcontext_addr + 28;
/* The remaining `global' registers and %y are saved in the `local'
registers. */
delta = SPARC_L0_REGNUM - SPARC_G0_REGNUM;
for (regnum = SPARC_G2_REGNUM; regnum <= SPARC_G7_REGNUM; regnum++)
saved_regs[regnum].realreg = regnum + delta;
saved_regs[SPARC32_Y_REGNUM].realreg = SPARC_L1_REGNUM;
/* The remaining `out' registers can be found in the current frame's
`in' registers. */
delta = SPARC_I0_REGNUM - SPARC_O0_REGNUM;
for (regnum = SPARC_O1_REGNUM; regnum <= SPARC_O5_REGNUM; regnum++)
saved_regs[regnum].realreg = regnum + delta;
saved_regs[SPARC_O7_REGNUM].realreg = SPARC_I7_REGNUM;
/* The `local' and `in' registers have been saved in the register
save area. */
addr = saved_regs[SPARC_SP_REGNUM].addr;
addr = get_frame_memory_unsigned (this_frame, addr, 4);
for (regnum = SPARC_L0_REGNUM;
regnum <= SPARC_I7_REGNUM; regnum++, addr += 4)
saved_regs[regnum].addr = addr;
/* Handle StackGhost. */
{
ULONGEST wcookie = sparc_fetch_wcookie (gdbarch);
if (wcookie != 0)
{
ULONGEST i7;
addr = saved_regs[SPARC_I7_REGNUM].addr;
i7 = get_frame_memory_unsigned (this_frame, addr, 4);
trad_frame_set_value (saved_regs, SPARC_I7_REGNUM, i7 ^ wcookie);
}
}
/* The floating-point registers are only saved if the EF bit in %prs
has been set. */
#define PSR_EF 0x00001000
addr = saved_regs[SPARC32_PSR_REGNUM].addr;
psr = get_frame_memory_unsigned (this_frame, addr, 4);
if (psr & PSR_EF)
{
CORE_ADDR sp;
sp = get_frame_register_unsigned (this_frame, SPARC_SP_REGNUM);
saved_regs[SPARC32_FSR_REGNUM].addr = sp + 96;
for (regnum = SPARC_F0_REGNUM, addr = sp + 96 + 8;
regnum <= SPARC_F31_REGNUM; regnum++, addr += 4)
saved_regs[regnum].addr = addr;
}
return saved_regs;
}
static struct sparc_frame_cache *
sparc64fbsd_sigtramp_frame_cache(struct frame_info *next_frame,
void **this_cache)
{
struct sparc_frame_cache *cache;
CORE_ADDR addr, mcontext_addr, sp;
LONGEST fprs;
int regnum;
if (*this_cache)
return (struct sparc_frame_cache *)*this_cache;
cache = sparc_frame_cache (next_frame, this_cache);
gdb_assert (cache == *this_cache);
cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
/* The third argument is a pointer to an instance of `ucontext_t',
which has a member `uc_mcontext' that contains the saved
registers. */
addr = frame_unwind_register_unsigned (next_frame, SPARC_O2_REGNUM);
mcontext_addr = addr + 64;
/* The following registers travel in the `mc_local' slots of
`mcontext_t'. */
addr = mcontext_addr + 16 * 8;
cache->saved_regs[SPARC64_FPRS_REGNUM].addr = addr + 0 * 8;
cache->saved_regs[SPARC64_FSR_REGNUM].addr = addr + 1 * 8;
/* The following registers travel in the `mc_in' slots of
`mcontext_t'. */
addr = mcontext_addr + 24 * 8;
cache->saved_regs[SPARC64_NPC_REGNUM].addr = addr + 0 * 8;
cache->saved_regs[SPARC64_PC_REGNUM].addr = addr + 1 * 8;
cache->saved_regs[SPARC64_STATE_REGNUM].addr = addr + 2 * 8;
cache->saved_regs[SPARC64_Y_REGNUM].addr = addr + 4 * 8;
/* The `global' and `out' registers travel in the `mc_global' and
`mc_out' slots of `mcontext_t', except for %g0. Since %g0 is
always zero, keep the identity encoding. */
for (regnum = SPARC_G1_REGNUM, addr = mcontext_addr + 8;
regnum <= SPARC_O7_REGNUM; regnum++, addr += 8)
cache->saved_regs[regnum].addr = addr;
/* The `local' and `in' registers have been saved in the register
save area. */
addr = cache->saved_regs[SPARC_SP_REGNUM].addr;
sp = get_frame_memory_unsigned (next_frame, addr, 8);
for (regnum = SPARC_L0_REGNUM, addr = sp + BIAS;
regnum <= SPARC_I7_REGNUM; regnum++, addr += 8)
cache->saved_regs[regnum].addr = addr;
/* The floating-point registers are only saved if the FEF bit in
%fprs has been set. */
#define FPRS_FEF (1 << 2)
addr = cache->saved_regs[SPARC64_FPRS_REGNUM].addr;
fprs = get_frame_memory_unsigned (next_frame, addr, 8);
if (fprs & FPRS_FEF)
{
for (regnum = SPARC_F0_REGNUM, addr = mcontext_addr + 32 * 8;
regnum <= SPARC_F31_REGNUM; regnum++, addr += 4)
cache->saved_regs[regnum].addr = addr;
for (regnum = SPARC64_F32_REGNUM;
regnum <= SPARC64_F62_REGNUM; regnum++, addr += 8)
cache->saved_regs[regnum].addr = addr;
}
return cache;
}
