uint32_t us_ticker_read() {
if (!us_ticker_inited)
us_ticker_init();
// Return SCT3 count value
return LPC_SCT3->COUNT;
}
//******************************************************************************
uint32_t us_ticker_read(void)
{
uint64_t current_cnt1, current_cnt2;
uint32_t term_cnt, tmr_cnt;
uint32_t intfl1, intfl2;
if (!us_ticker_inited)
us_ticker_init();
// Ensure coherency between current_cnt and US_TIMER->count32
do {
current_cnt1 = current_cnt;
intfl1 = US_TIMER->intfl;
term_cnt = US_TIMER->term_cnt32;
tmr_cnt = US_TIMER->count32;
intfl2 = US_TIMER->intfl;
current_cnt2 = current_cnt;
} while ((current_cnt1 != current_cnt2) || (intfl1 != intfl2));
// Account for an unserviced interrupt
if (intfl1) {
current_cnt1 += term_cnt;
}
current_cnt1 += tmr_cnt;
return (current_cnt1 / ticks_per_us);
}
void us_ticker_set_interrupt(timestamp_t timestamp)
{
if (!us_ticker_inited) {
us_ticker_init();
}
if (us_ticker_appTimerID == TIMER_NULL) {
if (app_timer_create(&us_ticker_appTimerID, APP_TIMER_MODE_SINGLE_SHOT, us_ticker_app_timer_callback) != NRF_SUCCESS) {
/* placeholder to do something to recover from error */
return;
}
}
if (us_ticker_appTimerRunning) {
return;
}
timestamp_t currentCounter64;
app_timer_cnt_get(¤tCounter64);
uint32_t currentCounter = currentCounter64 & MAX_RTC_COUNTER_VAL;
uint32_t targetCounter = ((uint32_t)((timestamp * (uint64_t)APP_TIMER_CLOCK_FREQ) / 1000000) + 1) & MAX_RTC_COUNTER_VAL;
uint32_t ticksToCount = (targetCounter >= currentCounter) ?
(targetCounter - currentCounter) : (MAX_RTC_COUNTER_VAL + 1) - (currentCounter - targetCounter);
if (ticksToCount > 0) {
uint32_t rc;
rc = app_timer_start(us_ticker_appTimerID, ticksToCount, NULL /*p_context*/);
if (rc != NRF_SUCCESS) {
/* placeholder to do something to recover from error */
return;
}
us_ticker_appTimerRunning = true;
}
}
uint32_t us_ticker_read() {
if (!us_ticker_inited)
us_ticker_init();
// The PIT is a countdown timer
return ~(PIT->CHANNEL[1].CVAL);
}
uint32_t us_ticker_read() {
if (!us_ticker_inited) {
us_ticker_init();
}
return (us_tick_count + U32_LOWER_U16( u32REG_TimerRead(US_COUNTER_TIMER, REG_TMR_CTR)));
}
uint32_t us_ticker_read() {
uint32_t return_value = 0;
if (!us_ticker_inited)
us_ticker_init();
return_value = ((~US_TICKER_TIMER2->TimerValue)/25);
return return_value;
}
uint32_t us_ticker_read()
{
if (!us_ticker_inited)
us_ticker_init();
return tc_get_count_value(&us_ticker_module);
}
uint32_t us_ticker_read()
{
if (!us_ticker_inited) {
us_ticker_init();
}
return ~(PIT_GetCurrentTimerCount(PIT, kPIT_Chnl_1));
}
uint32_t us_ticker_read()
{
if (!us_ticker_inited) {
us_ticker_init();
}
return US_TICKER_TIMER->CNT;
}
uint32_t us_ticker_read()
{
if (!us_ticker_inited) {
us_ticker_init();
}
return TMR1_UNITS_TO_MICROSECONDS(tmr1_getCounter64());
}
/**
* Setup the us_ticker callback interrupt to go at the given timestamp.
*
* @Note: Only one callback is pending at any time.
*
* @Note: If a callback is pending, and this function is called again, the new
* callback-time overrides the existing callback setting. It is the caller's
* responsibility to ensure that this function is called to setup a callback for
* the earliest timeout.
*
* @Note: If this function is used to setup an interrupt which is immediately
* pending--such as for 'now' or a time in the past,--then the callback is
* invoked a few ticks later.
*/
void us_ticker_set_interrupt(timestamp_t timestamp)
{
if (!us_ticker_inited) {
us_ticker_init();
}
/*
* The argument to this function is a 32-bit microsecond timestamp for when
* a callback should be invoked. On the nRF51, we use an RTC timer running
* at 32kHz to implement a low-power us-ticker. This results in a problem
* based on the fact that 1000000 is not a multiple of 32768.
*
* Going from a micro-second based timestamp to a 32kHz based RTC-time is a
* linear mapping; but this mapping doesn't preserve wraparounds--i.e. when
* the 32-bit micro-second timestamp wraps around unfortunately the
* underlying RTC counter doesn't. The result is that timestamp expiry
* checks on micro-second timestamps don't yield the same result when
* applied on the corresponding RTC timestamp values.
*
* One solution is to translate the incoming 32-bit timestamp into a virtual
* 64-bit timestamp based on the knowledge of system-uptime, and then use
* this wraparound-free 64-bit value to do a linear mapping to RTC time.
* System uptime on an nRF is maintained using the 24-bit RTC counter. We
* track the overflow count to extend the 24-bit hardware counter by an
* additional 32 bits. RTC_UNITS_TO_MICROSECONDS() converts this into
* microsecond units (in 64-bits).
*/
/*
const uint64_t currentTime64 = TMR1_UNITS_TO_MICROSECONDS(tmr1_getCounter64());
uint64_t timestamp64 = (currentTime64 & ~(uint64_t)0xFFFFFFFFULL) + timestamp;
if (((uint32_t)currentTime64 > 0x80000000) && (timestamp < 0x80000000)) {
timestamp64 += (uint64_t)0x100000000ULL;
}
uint32_t newCallbackTime = MICROSECONDS_TO_TMR1_UNITS(timestamp64);
*/
uint32_t newCallbackTime = timestamp;
/* Check for repeat setup of an existing callback. This is actually not
* important; the following code should work even without this check. */
if (us_ticker_callbackPending && (newCallbackTime == us_ticker_callbackTimestamp)) {
return;
}
/* Check for callbacks which are immediately (or will *very* shortly become) pending.
* Even if they are immediately pending, they are scheduled to trigger a few
* ticks later. This keeps things simple by invoking the callback from an
* independent interrupt context. */
if ((int)(newCallbackTime - tmr1_getCounter()) <= (int)FUZZY_TMR1_TICKS) {
newCallbackTime = tmr1_getCounter() + FUZZY_TMR1_TICKS;
}
us_ticker_callbackTimestamp = newCallbackTime;
us_ticker_callbackPending = true;
NRF_TIMER1->CC[0] = newCallbackTime & MAX_TMR1_COUNTER_VAL;
//tmr1_enableCompareInterrupt();
}
uint32_t us_ticker_read() {
if (!us_ticker_inited)
us_ticker_init();
uint64_t temp;
temp = LPC_RIT->COUNTER | ((uint64_t)LPC_RIT->COUNTER_H << 32);
temp /= (SystemCoreClock/1000000);
return (uint32_t)temp;
}
void lp_ticker_init(void)
{
if(lp_ticker_inited)
return;
if (!us_ticker_inited)
us_ticker_init();
sysclk_enable_peripheral_clock(TICKER_COUNTER_CLK2);
tc_init(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, TC_CMR_TCCLKS_TIMER_CLOCK4);
lp_ticker_inited = 1;
}
//TIMER0 is used for us ticker and timers (Timer, wait(), wait_us() etc)
uint32_t us_ticker_read() {
if (!us_ticker_inited)
us_ticker_init();
// Generate ticker value
// MRT source clock is SystemCoreClock (30MHz) and MRT is a 31-bit countdown timer
// Calculate expected value using number of expired times to mimic a 32bit timer @ 1 MHz
return (0x7FFFFFFFUL - LPC_MRT->TIMER0)/MRT_Clock_MHz + ticker_expired_count_us;
}
HRESULT LLOS_SYSTEM_TIMER_Enable(LLOS_SYSTEM_TIMER_Callback callback)
{
s_TimerCallback = callback;
us_ticker_init();
ticker_set_handler(s_pTickerData, MbedInterruptHandler);
return S_OK;
}
uint32_t us_ticker_read()
{
if (! ticker_inited) {
us_ticker_init();
}
TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
return (TIMER_GetCounter(timer_base) / NU_TMRCLK_PER_TICK);
}
uint32_t us_ticker_read()
{
if (!us_ticker_inited) {
us_ticker_init();
}
/* Return a pseudo microsecond counter value. This is only as precise as the
* 32khz low-freq clock source, but could be adequate.*/
return RTC_UNITS_TO_MICROSECONDS(rtc1_getCounter64());
}
uint32_t us_ticker_read()
{
if (!us_ticker_inited) {
us_ticker_init();
}
timestamp_t value;
app_timer_cnt_get(&value); /* This returns the RTC counter (which is fed by the 32khz crystal clock source) */
return (uint32_t)((value * 1000000) / APP_TIMER_CLOCK_FREQ); /* Return a pseudo microsecond counter value.
* This is only as precise as the 32khz low-freq
* clock source, but could be adequate.*/
}
uint32_t us_ticker_read()
{
uint32_t tick_cnt;
uint64_t us_tick;
//1 Our G-timer resolution is ~31 us (1/32K), and is a countdown timer
if (!us_ticker_inited)
us_ticker_init();
tick_cnt = HalTimerOp.HalTimerReadCount(SYS_TIM_ID);
us_tick = TIMER_TICK_US*(0xffffffff - tick_cnt);
// TODO: handle overflow
return ((uint32_t)us_tick);
}
uint32_t us_ticker_read()
{
if (!us_ticker_inited) {
us_ticker_init();
}
uint16_t bufferedOverFlow = overflow;
US_TICKER_TIMER->TASKS_CAPTURE[2] = 1;
if (overflow!=bufferedOverFlow) {
bufferedOverFlow = overflow;
US_TICKER_TIMER->TASKS_CAPTURE[2] = 1;
}
return (((uint32_t)bufferedOverFlow << 16) | US_TICKER_TIMER->CC[2]);
}
void us_ticker_set_interrupt(unsigned int timestamp)
{
if (!us_ticker_inited) {
us_ticker_init();
}
US_TICKER_TIMER->TASKS_CAPTURE[0] = 1;
uint16_t tsUpper16 = (uint16_t)((timestamp - us_ticker_read()) >> 16);
if (tsUpper16>0) {
if ((timeStamp ==0) || (timeStamp> tsUpper16)) {
timeStamp = tsUpper16;
}
} else {
US_TICKER_TIMER->INTENSET |= TIMER_INTENSET_COMPARE0_Set << TIMER_INTENSET_COMPARE0_Pos;
US_TICKER_TIMER->CC[0] += timestamp - us_ticker_read();
}
}
static uint64_t ticker_read_counter64(void) {
uint32_t cnt_val;
uint64_t cnt_val64;
if (!us_ticker_inited)
us_ticker_init();
/* read counter */
cnt_val = OSTM1CNT;
if (last_read > cnt_val) {
wrap_arround++;
}
last_read = cnt_val;
cnt_val64 = ((uint64_t)wrap_arround << 32) + cnt_val;
return cnt_val64;
}
uint32_t us_ticker_read() {
if (!us_ticker_inited)
us_ticker_init();
uint32_t retval;
__disable_irq();
retval = (timer_ldval - PIT_TIMER.CVAL) / clk_mhz; //Hardware bits
retval |= msb_counter << __CLZ(clk_mhz); //Software bits
if (PIT_TIMER.TFLG == 1) { //If overflow bit is set, force it to be handled
timer_isr(); //Handle IRQ, read again to make sure software/hardware bits are synced
NVIC_ClearPendingIRQ(PIT_TIMER_IRQ);
return us_ticker_read();
}
__enable_irq();
return retval;
}
void us_ticker_set_interrupt(timestamp_t timestamp) {
uint32_t timer_value = 0;
int delta = 0;
if (!us_ticker_inited)
us_ticker_init();
delta = (int)(timestamp - us_ticker_read());
if (delta <= 0) {
// This event was in the past:
us_ticker_irq_handler();
return;
}
timer_value = (delta)*25;
// enable interrupt
US_TICKER_TIMER1->TimerControl = 0x0; // disable timer
US_TICKER_TIMER1->TimerControl = 0x62; // enable interrupt and set to 32 bit counter and set to periodic mode
US_TICKER_TIMER1->TimerLoad = (delta)*25; //initialise the timer value
US_TICKER_TIMER1->TimerControl |= 0x80; //enable timer
}
uint32_t us_ticker_read() {
uint32_t val;
uint64_t val64;
if (!us_ticker_inited)
us_ticker_init();
/* read counter */
val = OSTM1CNT;
if ( last_read > val ) {
wrap_arround++;
}
last_read = val;
val64 = ((uint64_t)wrap_arround << 32) + val;
/* clock to us */
val = (uint32_t)(val64 / count_clock);
return val;
}
uint32_t us_ticker_read() {
uint32_t counter, counter2;
if (!us_ticker_inited) us_ticker_init();
// A situation might appear when Master overflows right after Slave is read and before the
// new (overflowed) value of Master is read. Which would make the code below consider the
// previous (incorrect) value of Slave and the new value of Master, which would return a
// value in the past. Avoid this by computing consecutive values of the timer until they
// are properly ordered.
counter = (uint32_t)(SlaveCounter << 16);
counter += TIM_MST->CNT;
while (1) {
counter2 = (uint32_t)(SlaveCounter << 16);
counter2 += TIM_MST->CNT;
if (counter2 > counter) {
break;
}
counter = counter2;
}
return counter2;
}
//TIMER0 is used for us ticker and timers (Timer, wait(), wait_us() etc)
uint32_t us_ticker_read() {
if (!us_ticker_inited)
us_ticker_init();
// Generate ticker value
// MRT source clock is SystemCoreClock (30MHz) and MRT is a 31-bit countdown timer
// Calculate expected value using current count and number of expired times to mimic a 32bit timer @ 1 MHz
//
// ticker_expired_count_us
// The variable ticker_expired_count_us keeps track of the number of 31bits overflows (counted by TIMER0) and
// corrects that back to us counts.
//
// (0x7FFFFFFFUL - LPC_MRT->TIMER0)/MRT_Clock_MHz
// The counter is a 31bit downcounter from 7FFFFFFF so correct to actual count-up value and correct
// for 30 counts per us.
//
// Added up these 2 parts result in current us time returned as 32 bits.
return (0x7FFFFFFFUL - LPC_MRT->TIMER0)/MRT_Clock_MHz + ticker_expired_count_us;
}
void us_ticker_set_interrupt(timestamp_t timestamp)
{
int32_t dev = 0;
if (!us_ticker_inited)
{
us_ticker_init();
}
dev = (int32_t)(timestamp - us_ticker_read());
dev = dev * ((GetSystemClock() / 1000000) / 16);
if(dev <= 0)
{
us_ticker_irq_handler();
return;
}
DUALTIMER_ClockEnable(TIMER_0);
DUALTIMER_Stop(TIMER_0);
TimerHandler.TimerControl_Mode = DUALTIMER_TimerControl_Periodic;
TimerHandler.TimerControl_OneShot = DUALTIMER_TimerControl_OneShot;
TimerHandler.TimerControl_Pre = DUALTIMER_TimerControl_Pre_16;
TimerHandler.TimerControl_Size = DUALTIMER_TimerControl_Size_32;
TimerHandler.TimerLoad = (uint32_t)dev;
DUALTIMER_Init(TIMER_0, &TimerHandler);
DUALTIMER_IntConfig(TIMER_0, ENABLE);
NVIC_EnableIRQ(TIMER_IRQn);
DUALTIMER_Start(TIMER_0);
}
uint32_t us_ticker_read()
{
if (! us_ticker_inited) {
us_ticker_init();
}
TIMER_T * timer0_base = (TIMER_T *) NU_MODBASE(timer0hires_modinit.modname);
do {
uint32_t major_minor_us;
uint32_t minor_us;
// NOTE: As TIMER_CNT = TIMER_CMP and counter_major has increased by one, TIMER_CNT doesn't change to 0 for one tick time.
// NOTE: As TIMER_CNT = TIMER_CMP or TIMER_CNT = 0, counter_major (ISR) may not sync with TIMER_CNT. So skip and fetch stable one at the cost of 1 clock delay on this read.
do {
core_util_critical_section_enter();
// NOTE: Order of reading minor_us/carry here is significant.
minor_us = TIMER_GetCounter(timer0_base) * US_PER_TMR0HIRES_CLK;
uint32_t carry = (timer0_base->INTSTS & TIMER_INTSTS_TIF_Msk) ? 1 : 0;
// When TIMER_CNT approaches TIMER_CMP and will wrap soon, we may get carry but TIMER_CNT not wrapped. Hanlde carefully carry == 1 && TIMER_CNT is near TIMER_CMP.
if (carry && minor_us > (US_PER_TMR0HIRES_INT / 2)) {
major_minor_us = (counter_major + 1) * US_PER_TMR0HIRES_INT;
}
else {
major_minor_us = (counter_major + carry) * US_PER_TMR0HIRES_INT + minor_us;
}
core_util_critical_section_exit();
}
while (minor_us == 0 || minor_us == US_PER_TMR0HIRES_INT);
return (major_minor_us / US_PER_TICK);
}
while (0);
}
uint32_t us_ticker_read()
{
if (!us_ticker_inited) us_ticker_init();
return TIM_MST->CNT;
}
