void ep_config(U8 ep_num, U8 type, U8 dir, U8 size)
{
// init the direction the fifo
usb_buf_init(ep_num, dir);
// select the endpoint and reset it
ep_select(ep_num);
UECONX &= ~(1 << EPEN);
UECONX |= (1 << EPEN);
// set the type, direction, and size
UECFG0X |= (type & 0x3) << EPTYPE0;
UECFG0X |= dir;
UECFG1X |= (size & 0x7) << EPSIZE0;
// we're only using single banks for now. double banks can be used on certain EPs only.
UECFG1X |= (SINGLE & 0x3) << EPBK0;
// alloc memory for the endpoint
UECFG1X |= (1 << ALLOC);
// spin here until the config is okay
while (!(UESTA0X & (1<<CFGOK)));
UERST |= (1<<ep_num);
UERST &= ~(1<<ep_num);
if (ep_num == EP_CTRL)
{
RX_SETUP_INT_ENB();
RX_OUT_INT_ENB();
}
else if (dir == DIR_OUT)
{
RX_OUT_INT_ENB();
}
}
void ep_config(U8 ep_num, U8 type, U8 dir, U8 size)
{
// init the direction the fifo
usb_buf_init(ep_num, dir);
// select the endpoint and reset it
// FIXME
if( ep_num > 0 )
{
if( dir == DIR_OUT )
{
switch( type )
{
case XFER_ISOCHRONOUS:
SI32_USBEP_A_enable_out_isochronous_mode( usb_ep[ ep_num - 1 ] );
break;
case XFER_BULK:
case XFER_INTP:
SI32_USBEP_A_enable_out_bulk_interrupt_mode( usb_ep[ ep_num - 1 ] );
break;
case XFER_CONTROL:
// only for EP0
break;
default:
break;
}
SI32_USBEP_A_set_endpoint_direction_out( usb_ep[ ep_num - 1 ] );
SI32_USBEP_A_clear_out_data_overrun( usb_ep[ ep_num - 1 ] );
SI32_USBEP_A_stop_out_stall( usb_ep[ ep_num - 1 ] );
SI32_USBEP_A_reset_out_data_toggle( usb_ep[ ep_num - 1 ] );
SI32_USBEP_A_set_out_max_packet_size(usb_ep[ ep_num - 1 ], (1 << size) );
}
else
{
SI32_USBEP_A_set_endpoint_direction_in( usb_ep[ ep_num - 1 ] );
SI32_USBEP_A_clear_in_data_underrun( usb_ep[ ep_num - 1 ] );
switch( type )
{
case XFER_ISOCHRONOUS:
SI32_USBEP_A_select_in_isochronous_mode( usb_ep[ ep_num - 1 ] );
break;
case XFER_BULK:
case XFER_INTP:
SI32_USBEP_A_select_in_bulk_interrupt_mode( usb_ep[ ep_num - 1 ] );
SI32_USBEP_A_stop_in_stall( usb_ep[ ep_num - 1 ] );
SI32_USBEP_A_reset_in_data_toggle( usb_ep[ ep_num - 1 ] );
break;
case XFER_CONTROL:
// only for EP0
break;
default:
break;
}
SI32_USBEP_A_set_in_max_packet_size(usb_ep[ ep_num - 1 ], (1 << size) );
}
}
// Enable endpoints
switch ( ep_num )
{
case 1:
SI32_USB_A_enable_ep1( SI32_USB_0 );
break;
case 2:
SI32_USB_A_enable_ep2( SI32_USB_0 );
break;
case 3:
SI32_USB_A_enable_ep3( SI32_USB_0 );
break;
case 4:
SI32_USB_A_enable_ep4( SI32_USB_0 );
}
//SI32_USB_A_reset_module (SI32_USB_0);
/* if (ep_num == EP_CTRL)
{
RX_SETUP_INT_ENB();
RX_OUT_INT_ENB();
}
else if (dir == DIR_OUT)
{
RX_OUT_INT_ENB();
}*/
}
