void device_ptx_mode_esb(void)
{
while(true)
{
// Wait til the packet is sent
do {
radio_irq ();
} while((radio_get_status ()) == RF_BUSY);
// Blink LED2 if ACK is recieved, LED3 if not
if (((radio_get_status ()) == RF_TX_DS))
{
LED2_BLINK();
}
else
{
LED3_BLINK();
}
// Sleep 100ms
start_timer(100);
wait_for_timer();
// Set up the payload according to the input button 1
pload_esb[0] = 0;
if(B1_PRESSED())
{
pload_esb[0] = 1;
}
//Send the packet
radio_send_packet(pload_esb, RF_PAYLOAD_LENGTH);
}
}
void ui_thread()
{
write_to(LCD);
lcd_clear();
lcd_cursor = 0;
puts(" BANEL " BUILD_DATE "\n SDCC " SDCC_VERSION);
wait_for_timer(T_UI, 0, 5, 0);
send_message8(0, 1, 2, 3, 4, 5, 6, 7, 8);
}
/* more precise timer than AmigaDOS Delay() */
LONG time_delay( struct timeval *tv, LONG unit )
{
struct timerequest *tr;
/* get a pointer to an initialized timer request block */
tr = create_timer( unit );
/* any nonzero return says timedelay routine didn't work. */
if (tr == NULL )
return( -1L );
wait_for_timer( tr, tv );
/* deallocate temporary structures */
delete_timer( tr );
return( 0L );
}
void radio_sb_init (const uint8_t *address, hal_nrf_operation_mode_t operational_mode)
{
hal_nrf_close_pipe(HAL_NRF_ALL); // First close all radio pipes
// Pipe 0 and 1 open by default
hal_nrf_open_pipe(HAL_NRF_PIPE0, false); // Open pipe0, without/autoack
hal_nrf_set_crc_mode(HAL_NRF_CRC_16BIT); // Operates in 16bits CRC mode
hal_nrf_set_auto_retr(0, RF_RETRANS_DELAY); // Disables auto retransmit
hal_nrf_set_address_width(HAL_NRF_AW_5BYTES); // 5 bytes address width
hal_nrf_set_address(HAL_NRF_TX, address); // Set device's addresses
hal_nrf_set_address(HAL_NRF_PIPE0, address); // Sets recieving address on
// pipe0
if(operational_mode == HAL_NRF_PTX) // Mode depentant settings
{
hal_nrf_set_operation_mode(HAL_NRF_PTX); // Enter TX mode
}
else
{
hal_nrf_set_operation_mode(HAL_NRF_PRX); // Enter RX mode
hal_nrf_set_rx_pload_width((uint8_t)HAL_NRF_PIPE0, RF_PAYLOAD_LENGTH);
// Pipe0 expect
// PAYLOAD_LENGTH byte payload
// PAYLOAD_LENGTH in radio.h
}
hal_nrf_set_rf_channel(RF_CHANNEL); // Operating on static channel
// Defined in radio.h.
// Frequenzy =
// 2400 + RF_CHANNEL
hal_nrf_set_power_mode(HAL_NRF_PWR_UP); // Power up device
//hal_nrf_set_datarate(HAL_NRF_1MBPS); // Uncomment this line for
// compatibility with nRF2401
// and nRF24E1
start_timer(RF_POWER_UP_DELAY); // Wait for the radio to
wait_for_timer(); // power up
radio_set_status (RF_IDLE); // Radio now ready
}
/* more precise timer than AmigaDOS Delay() */
void
usleep(unsigned int tim)
{
struct timeval tv;
struct timerequest *tr;
tv.tv_secs = tim / 1000000;
tv.tv_micro = tim % 1000000;
/* get a pointer to an initialized timer request block */
tr = create_timer(UNIT_VBLANK);
/* any nonzero return says usleep routine didn't work. */
if (tr == NULL) {
return;
}
wait_for_timer(tr, &tv);
/* deallocate temporary structures */
delete_timer(tr);
return;
}
void delay_100ms(void)
{
start_timer(100);
wait_for_timer();
}
void radio_pl_init (const uint8_t *address, hal_nrf_operation_mode_t operational_mode)
{
hal_nrf_close_pipe(HAL_NRF_ALL); // First close all radio pipes
// Pipe 0 and 1 open by default
hal_nrf_open_pipe(HAL_NRF_PIPE0, true); // Then open pipe0, w/autoack
hal_nrf_set_crc_mode(HAL_NRF_CRC_16BIT); // Operates in 16bits CRC mode
hal_nrf_set_auto_retr(RF_RETRANSMITS, RF_RETRANS_DELAY);
// Enables auto retransmit.
// 3 retrans with 250ms delay
hal_nrf_set_address_width(HAL_NRF_AW_5BYTES); // 5 bytes address width
hal_nrf_set_address(HAL_NRF_TX, address); // Set device's addresses
hal_nrf_set_address(HAL_NRF_PIPE0, address); // Sets recieving address on
// pipe0
/*****************************************************************************
* Changed from esb/radio_esb.c *
* Enables: *
* - ACK payload *
* - Dynamic payload width *
* - Dynamic ACK *
*****************************************************************************/
hal_nrf_enable_ack_pl(); // Try to enable ack payload
// When the features are locked, the FEATURE and DYNPD are read out 0x00
// even after we have tried to enable ack payload. This mean that we need to
// activate the features.
if(hal_nrf_read_reg(FEATURE) == 0x00 && (hal_nrf_read_reg(DYNPD) == 0x00))
{
hal_nrf_lock_unlock (); // Activate features
hal_nrf_enable_ack_pl(); // Enables payload in ack
}
hal_nrf_enable_dynamic_pl(); // Enables dynamic payload
hal_nrf_setup_dyn_pl(ALL_PIPES); // Sets up dynamic payload on
// all data pipes.
/*****************************************************************************
* End changes from esb/radio_esb.c *
*****************************************************************************/
if(operational_mode == HAL_NRF_PTX) // Mode depentant settings
{
hal_nrf_set_operation_mode(HAL_NRF_PTX); // Enter TX mode
}
else
{
hal_nrf_set_operation_mode(HAL_NRF_PRX); // Enter RX mode
hal_nrf_set_rx_pload_width((uint8_t)HAL_NRF_PIPE0, RF_PAYLOAD_LENGTH);
// Pipe0 expect
// PAYLOAD_LENGTH byte payload
// PAYLOAD_LENGTH in radio.h
}
hal_nrf_set_rf_channel(RF_CHANNEL); // Operating on static channel
// Defined in radio.h.
// Frequenzy =
// 2400 + RF_CHANNEL
hal_nrf_set_power_mode(HAL_NRF_PWR_UP); // Power up device
start_timer(RF_POWER_UP_DELAY); // Wait for the radio to
wait_for_timer(); // power up
radio_set_status (RF_IDLE); // Radio now ready
}
int main(void)
{
struct dac_config conf;
board_init();
sysclk_init();
// Initialize the dac configuration.
dac_read_configuration(&OUTPUT_DAC, &conf);
/* Create configuration:
* - AVCC as reference, right adjusted channel value
* - both DAC channels active, no internal output
* - manually triggered conversions on both channels
* - 2 us conversion intervals
* - 10 us refresh intervals
*/
dac_set_conversion_parameters(&conf, DAC_REF_AVCC, DAC_ADJ_RIGHT);
dac_set_active_channel(&conf, DAC_CH0 | DAC_CH1, 0);
dac_set_conversion_trigger(&conf, 0, 0);
#if XMEGA_DAC_VERSION_1
dac_set_conversion_interval(&conf, 10);
dac_set_refresh_interval(&conf, 20);
#endif
dac_write_configuration(&OUTPUT_DAC, &conf);
dac_enable(&OUTPUT_DAC);
dac_wait_for_channel_ready(&OUTPUT_DAC, DAC_CH0 | DAC_CH1);
dac_set_channel_value(&OUTPUT_DAC, DAC_CH0, 0);
dac_set_channel_value(&OUTPUT_DAC, DAC_CH1, 0);
dac_wait_for_channel_ready(&OUTPUT_DAC, DAC_CH0 | DAC_CH1);
#if !XMEGA_E
// Configure timer/counter to generate events at conversion rate.
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC0);
TCC0.PER = (sysclk_get_per_hz() / RATE_OF_CONVERSION) - 1;
// Configure event channel 0 to generate events upon T/C overflow.
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EVSYS);
EVSYS.CH0MUX = EVSYS_CHMUX_TCC0_OVF_gc;
// Start the timer/counter.
TCC0.CTRLA = TC_CLKSEL_DIV1_gc;
#else
// Configure timer/counter to generate events at conversion rate.
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC4);
TCC4.PER = (sysclk_get_per_hz() / RATE_OF_CONVERSION) - 1;
// Configure event channel 0 to generate events upon T/C overflow.
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EVSYS);
EVSYS.CH0MUX = EVSYS_CHMUX_TCC4_OVF_gc;
// Start the timer/counter.
TCC4.CTRLA = TC45_CLKSEL_DIV1_gc;
#endif
/* Write samples to the DAC channel every time it is ready.
* Conversions are triggered by the timer/counter.
*/
do {
/* Wait for channels to get ready for new values, then set the
* value of one to 10% and the other to 90% of maximum.
*/
wait_for_timer();
dac_set_channel_value(&OUTPUT_DAC, DAC_CH0, 410);
dac_set_channel_value(&OUTPUT_DAC, DAC_CH1, 3686);
wait_for_timer();
dac_set_channel_value(&OUTPUT_DAC, DAC_CH0, 3686);
dac_set_channel_value(&OUTPUT_DAC, DAC_CH1, 410);
} while (1);
}