static int i2c_write(struct i2c_au1550_data *adap, unsigned char *buf,
unsigned int len)
{
int i;
unsigned long data;
if (len == 0)
return 0;
i = 0;
while (i < (len-1)) {
data = buf[i];
WR(adap, PSC_SMBTXRX, data);
if (wait_ack(adap))
return -EIO;
i++;
}
/* The last byte has to indicate transfer done. */
data = buf[i];
data |= PSC_SMBTXRX_STP;
WR(adap, PSC_SMBTXRX, data);
if (wait_master_done(adap))
return -EIO;
return 0;
}
static int
do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q)
{
unsigned long stat;
/* Reset the FIFOs, clear events. */
stat = RD(adap, PSC_SMBSTAT);
WR(adap, PSC_SMBEVNT, PSC_SMBEVNT_ALLCLR);
if (!(stat & PSC_SMBSTAT_TE) || !(stat & PSC_SMBSTAT_RE)) {
WR(adap, PSC_SMBPCR, PSC_SMBPCR_DC);
while ((RD(adap, PSC_SMBPCR) & PSC_SMBPCR_DC) != 0)
cpu_relax();
udelay(50);
}
/* Write out the i2c chip address and specify operation */
addr <<= 1;
if (rd)
addr |= 1;
/* zero-byte xfers stop immediately */
if (q)
addr |= PSC_SMBTXRX_STP;
/* Put byte into fifo, start up master. */
WR(adap, PSC_SMBTXRX, addr);
WR(adap, PSC_SMBPCR, PSC_SMBPCR_MS);
if (wait_ack(adap))
return -EIO;
return (q) ? wait_master_done(adap) : 0;
}
static int i2c_read(struct i2c_au1550_data *adap, unsigned char *buf,
unsigned int len)
{
int i;
if (len == 0)
return 0;
/* A read is performed by stuffing the transmit fifo with
* zero bytes for timing, waiting for bytes to appear in the
* receive fifo, then reading the bytes.
*/
i = 0;
while (i < (len - 1)) {
WR(adap, PSC_SMBTXRX, 0);
if (wait_for_rx_byte(adap, &buf[i]))
return -EIO;
i++;
}
/* The last byte has to indicate transfer done. */
WR(adap, PSC_SMBTXRX, PSC_SMBTXRX_STP);
if (wait_master_done(adap))
return -EIO;
buf[i] = (unsigned char)(RD(adap, PSC_SMBTXRX) & 0xff);
return 0;
}
static int
i2c_write(struct i2c_au1550_data *adap, unsigned char *buf,
unsigned int len)
{
int i;
u32 data;
volatile psc_smb_t *sp;
if (len == 0)
return 0;
sp = (volatile psc_smb_t *)(adap->psc_base);
i = 0;
while (i < (len-1)) {
data = buf[i];
sp->psc_smbtxrx = data;
au_sync();
if (wait_ack(adap))
return -EIO;
i++;
}
data = buf[i];
data |= PSC_SMBTXRX_STP;
sp->psc_smbtxrx = data;
au_sync();
if (wait_master_done(adap))
return -EIO;
return 0;
}
static int
do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q)
{
volatile psc_smb_t *sp;
u32 stat;
sp = (volatile psc_smb_t *)(adap->psc_base);
/* Reset the FIFOs, clear events.
*/
stat = sp->psc_smbstat;
sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR;
au_sync();
if (!(stat & PSC_SMBSTAT_TE) || !(stat & PSC_SMBSTAT_RE)) {
sp->psc_smbpcr = PSC_SMBPCR_DC;
au_sync();
do {
stat = sp->psc_smbpcr;
au_sync();
} while ((stat & PSC_SMBPCR_DC) != 0);
udelay(50);
}
/* Write out the i2c chip address and specify operation
*/
addr <<= 1;
if (rd)
addr |= 1;
/* zero-byte xfers stop immediately */
if (q)
addr |= PSC_SMBTXRX_STP;
/* Put byte into fifo, start up master.
*/
sp->psc_smbtxrx = addr;
au_sync();
sp->psc_smbpcr = PSC_SMBPCR_MS;
au_sync();
if (wait_ack(adap))
return -EIO;
return (q) ? wait_master_done(adap) : 0;
}
static int
do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q)
{
volatile psc_smb_t *sp;
u32 stat;
sp = (volatile psc_smb_t *)(adap->psc_base);
stat = sp->psc_smbstat;
sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR;
au_sync();
if (!(stat & PSC_SMBSTAT_TE) || !(stat & PSC_SMBSTAT_RE)) {
sp->psc_smbpcr = PSC_SMBPCR_DC;
au_sync();
do {
stat = sp->psc_smbpcr;
au_sync();
} while ((stat & PSC_SMBPCR_DC) != 0);
udelay(50);
}
addr <<= 1;
if (rd)
addr |= 1;
if (q)
addr |= PSC_SMBTXRX_STP;
sp->psc_smbtxrx = addr;
au_sync();
sp->psc_smbpcr = PSC_SMBPCR_MS;
au_sync();
if (wait_ack(adap))
return -EIO;
return (q) ? wait_master_done(adap) : 0;
}
static int
i2c_read(struct i2c_au1550_data *adap, unsigned char *buf,
unsigned int len)
{
int i;
u32 data;
volatile psc_smb_t *sp;
if (len == 0)
return 0;
/* A read is performed by stuffing the transmit fifo with
* zero bytes for timing, waiting for bytes to appear in the
* receive fifo, then reading the bytes.
*/
sp = (volatile psc_smb_t *)(adap->psc_base);
i = 0;
while (i < (len-1)) {
sp->psc_smbtxrx = 0;
au_sync();
if (wait_for_rx_byte(adap, &data))
return -EIO;
buf[i] = data;
i++;
}
/* The last byte has to indicate transfer done.
*/
sp->psc_smbtxrx = PSC_SMBTXRX_STP;
au_sync();
if (wait_master_done(adap))
return -EIO;
data = sp->psc_smbtxrx;
au_sync();
buf[i] = data;
return 0;
}
static int
i2c_read(struct i2c_au1550_data *adap, unsigned char *buf,
unsigned int len)
{
int i;
u32 data;
volatile psc_smb_t *sp;
if (len == 0)
return 0;
sp = (volatile psc_smb_t *)(adap->psc_base);
i = 0;
while (i < (len-1)) {
sp->psc_smbtxrx = 0;
au_sync();
if (wait_for_rx_byte(adap, &data))
return -EIO;
buf[i] = data;
i++;
}
sp->psc_smbtxrx = PSC_SMBTXRX_STP;
au_sync();
if (wait_master_done(adap))
return -EIO;
data = sp->psc_smbtxrx;
au_sync();
buf[i] = data;
return 0;
}
