void rx_init()
{
writeregs( bbcal , sizeof(bbcal) );
writeregs( rfcal , sizeof(rfcal) );
writeregs( demodcal , sizeof(demodcal) );
int rxaddress[5] = {0xCC,0xCC,0xCC,0xCC,0xCC};
xn_writerxaddress( rxaddress);
xn_writetxaddress( rxaddress);
xn_writereg( EN_AA , 0 ); // aa disabled
xn_writereg( EN_RXADDR , 1 ); // pipe 0 only
// xn_writereg( RF_SETUP , B00000001); // lna high current on ( better performance )
xn_writereg( RF_SETUP , B00000111);
xn_writereg( RX_PW_P0 , PAYLOAD_LENGHT ); // payload size
xn_writereg( SETUP_RETR , 0 ); // no retransmissions ( redundant?)
xn_writereg( SETUP_AW , 3 ); // address size (5 bits)
xn_command( FLUSH_RX);
xn_writereg( RF_CH , 2 ); // bind channel
xn_writereg( 0 , B00001111 ); // power up, crc enabled
}
void rx_init()
{
uint8_t bbcal[6] = { 0x3f , 0x4c , 0x84 , 0x6F , 0x9c , 0x20 };
writeregs( bbcal , sizeof(bbcal) );
uint8_t rfcal[8] = { 0x3e , 0xc9 , 0x9a , 0x80 , 0x61 , 0xbb , 0xab , 0x9c };
writeregs( rfcal , sizeof(rfcal) );
uint8_t demodcal[6] = { 0x39 , 0x0b , 0xdf , 0xc4 , 0xa7 , 0x03};
writeregs( demodcal , sizeof(demodcal) );
int rxaddress[5] = { 0 , 0 , 0 , 0 , 0 };
xn_writerxaddress( rxaddress);
xn_writereg( EN_AA , 0 ); // aa disabled
xn_writereg( EN_RXADDR , 1 ); // pipe 0 only
xn_writereg( RF_SETUP , B00000001); // lna high current on ( better performance )
xn_writereg( RX_PW_P0 , 15 ); // payload size
xn_writereg( SETUP_RETR , 0 ); // no retransmissions ( redundant?)
xn_writereg( SETUP_AW , 3 ); // address size (5 bits)
xn_command( FLUSH_RX);
xn_writereg( RF_CH , 0 ); // bind on channel 0
xn_writereg( 0 , B00001111 ); // power up, crc enabled
#ifdef RADIO_CHECK
void check_radio(void);
check_radio();
#endif
}
void rx_init()
{
// always on (CH_ON) channel set 1
aux[AUXNUMBER - 2] = 1;
// always off (CH_OFF) channel set 0
aux[AUXNUMBER - 1] = 0;
#ifdef AUX1_START_ON
aux[CH_AUX1] = 1;
#endif
#ifdef RADIO_XN297L
#define XN_TO_RX B10001111
#define XN_TO_TX B10000010
#define XN_POWER B00111111
#endif
#ifdef RADIO_XN297
static uint8_t bbcal[6] = { 0x3f , 0x4c , 0x84 , 0x6F , 0x9c , 0x20 };
writeregs( bbcal , sizeof(bbcal) );
// new values
static uint8_t rfcal[8] = { 0x3e , 0xc9 , 0x9a , 0xA0 , 0x61 , 0xbb , 0xab , 0x9c };
writeregs( rfcal , sizeof(rfcal) );
static uint8_t demodcal[6] = { 0x39 , 0x0b , 0xdf , 0xc4 , 0xa7 , 0x03};
writeregs( demodcal , sizeof(demodcal) );
#define XN_TO_RX B00001111
#define XN_TO_TX B00000010
#define XN_POWER B00000111
#endif
bleinit();
delay(100);
int rxaddress[5] = { 0 , 0 , 0 , 0 , 0 };
xn_writerxaddress( rxaddress);
xn_writereg( EN_AA , 0 ); // aa disabled
xn_writereg( EN_RXADDR , 1 ); // pipe 0 only
xn_writereg( RF_SETUP , XN_POWER); // lna high current on ( better performance )
xn_writereg( RX_PW_P0 , 15 ); // payload size
xn_writereg( SETUP_RETR , 0 ); // no retransmissions ( redundant?)
xn_writereg( SETUP_AW , 3 ); // address size (5 bits)
xn_command( FLUSH_RX);
xn_writereg( RF_CH , 0 ); // bind on channel 0
// set above
// xn_writereg( 29 , 32); // feture reg , CE mode (software controlled)
#ifdef RADIO_XN297L
xn_writereg( 0x1d, B00111000 ); // 64 bit payload , software ce
spi_cson();
spi_sendbyte( 0xFD); // internal CE high command
spi_sendbyte( 0); // required for above
spi_csoff();
#endif
#ifdef RADIO_XN297
xn_writereg( 0x1d, B00011000 ); // 64 bit payload , software ce
#endif
xn_writereg( 0 , XN_TO_RX ); // power up, crc enabled, rx mode
#ifdef RADIO_CHECK
void check_radio(void);
check_radio();
#endif
}
void checkrx( void)
{
int packetreceived = checkpacket();
int pass = 0;
if ( packetreceived )
{
if ( rxmode == 0)
{ // rx startup , bind mode
xn_readpayload( rxdata , 15);
if ( rxdata[0] == 164 )
{// bind packet
rfchannel[0] = rxdata[6];
rfchannel[1] = rxdata[7];
rfchannel[2] = rxdata[8];
rfchannel[3] = rxdata[9];
rxaddress[0] = rxdata[1];
rxaddress[1] = rxdata[2];
rxaddress[2] = rxdata[3];
rxaddress[3] = rxdata[4];
rxaddress[4] = rxdata[5];
rxmode = 123;
xn_writerxaddress( rxaddress );
xn_writereg(0x25, rfchannel[chan] ); // Set channel frequency
#ifdef SERIAL_INFO
printf( " BIND \n");
#endif
}
}
else
{ // normal mode
#ifdef RXDEBUG
rxdebug.channelcount[chan]++;
rxdebug.packettime = gettime() - lastrxtime;
#endif
// for longer loop times than 3ms it was skipping 2 channels
//chan++;
//if (chan > 3 ) chan = 0;
nextchannel();
lastrxtime = gettime();
xn_readpayload( rxdata , 15);
pass = decodepacket();
if (pass)
{
#ifdef RXDEBUG
packetrx++;
#endif
failsafetime = lastrxtime;
failsafe = 0;
}
else
{
#ifdef RXDEBUG
rxdebug.failcount++;
#endif
}
}// end normal rx mode
}// end packet received
unsigned long time = gettime();
// sequence period 12000
if( time - lastrxtime > 9000 && rxmode != 0)
{// channel with no reception
lastrxtime = time;
nextchannel();
}
if( time - failsafetime > FAILSAFETIME )
{// failsafe
failsafe = 1;
rx[0] = 0;
rx[1] = 0;
rx[2] = 0;
rx[3] = 0;
}
#ifdef RXDEBUG
if ( gettime() - secondtimer > 1000000)
{
rxdebug.packetpersecond = packetrx;
packetrx = 0;
secondtimer = gettime();
}
#endif
}
void checkrx(void)
{
int packetreceived = checkpacket();
int pass = 0;
if (packetreceived)
{
if (rxmode == RXMODE_BIND)
{ // rx startup , bind mode
xn_readpayload(rxdata, 15);
if (rxdata[0] == 164)
{ // bind packet
rfchannel[0] = rxdata[6];
rfchannel[1] = rxdata[7];
rfchannel[2] = rxdata[8];
rfchannel[3] = rxdata[9];
int rxaddress[5];
rxaddress[0] = rxdata[1];
rxaddress[1] = rxdata[2];
rxaddress[2] = rxdata[3];
rxaddress[3] = rxdata[4];
rxaddress[4] = rxdata[5];
xn_writerxaddress(rxaddress);
xn_writereg(0x25, rfchannel[chan]); // Set channel frequency
rxmode = RXMODE_NORMAL;
#ifdef SERIAL
printf(" BIND \n");
#endif
}
}
else
{ // normal mode
#ifdef RXDEBUG
rxdebug.channelcount[chan]++;
rxdebug.packettime = gettime() - lastrxtime;
if ( skipchannel&& !timingfail ) afterskip[skipchannel]++;
if ( timingfail ) afterskip[0]++;
#endif
unsigned long temptime = gettime();
nextchannel();
xn_readpayload(rxdata, 15);
pass = decodepacket();
if (pass)
{
#ifdef RXDEBUG
packetrx++;
#endif
skipchannel = 0;
timingfail = 0;
lastrxchan = chan;
lastrxtime = temptime;
failsafetime = temptime;
failsafe = 0;
}
else
{
#ifdef RXDEBUG
rxdebug.failcount++;
#endif
}
} // end normal rx mode
} // end packet received
unsigned long time = gettime();
// sequence period 12000
if (time - lastrxtime > (HOPPING_NUMBER*PACKET_PERIOD + 1000) && rxmode != RXMODE_BIND)
{
// channel with no reception
lastrxtime = time;
// set channel to last with reception
if (!timingfail) chan = lastrxchan;
// advance to next channel
nextchannel();
// set flag to discard packet timing
timingfail = 1;
}
if ( !timingfail && skipchannel < HOPPING_NUMBER+1 && rxmode != RXMODE_BIND)
{
unsigned int temp = time - lastrxtime ;
if ( temp > 1000 && ( temp + (PACKET_OFFSET) )/((int) PACKET_PERIOD) >= (skipchannel + 1) )
{
nextchannel();
#ifdef RXDEBUG
skipstats[skipchannel]++;
#endif
skipchannel++;
}
}
if (time - failsafetime > FAILSAFETIME)
{ // failsafe
failsafe = 1;
rx[0] = 0;
rx[1] = 0;
rx[2] = 0;
rx[3] = 0;
}
#ifdef RXDEBUG
if (gettime() - secondtimer > 1000000)
{
rxdebug.packetpersecond = packetrx;
packetrx = 0;
secondtimer = gettime();
}
#endif
}
void rx_init()
{
// always on (CH_ON) channel set 1
aux[AUXNUMBER - 2] = 1;
// always off (CH_OFF) channel set 0
aux[AUXNUMBER - 1] = 0;
#ifdef AUX1_START_ON
aux[CH_AUX1] = 1;
#endif
#ifdef AUX4_START_ON
aux[CH_AUX4] = 1;
#endif
#ifdef RADIO_XN297L
#define XN_TO_RX B10001111
#define XN_TO_TX B10000010
#define XN_POWER B00111111
#endif
#ifdef RADIO_XN297
static uint8_t bbcal[6] = { 0x3f , 0x4c , 0x84 , 0x6F , 0x9c , 0x20 };
writeregs( bbcal , sizeof(bbcal) );
// new values
static uint8_t rfcal[8] = { 0x3e , 0xc9 , 0x9a , 0xA0 , 0x61 , 0xbb , 0xab , 0x9c };
writeregs( rfcal , sizeof(rfcal) );
static uint8_t demodcal[6] = { 0x39 , 0x0b , 0xdf , 0xc4 , 0xa7 , 0x03};
//static uint8_t demodcal[6] = { 0x39 , 0x0b , 0xdf , 0xc4 , B00100111 , B00000000};
writeregs( demodcal , sizeof(demodcal) );
#define XN_TO_RX B00001111
#define XN_TO_TX B00000010
//#define XN_POWER B00000111 // disabled by silverAG for SilverVISE - value is added from config.h
// SilverVISE - start:
#ifdef TX_POWER_GENERAL
// use value from config.h
#define XN_POWER TX_POWER_GENERAL
#else
#define XN_POWER B00000111
#endif
// SilverVISE - end
#endif
bleinit();
delay(100);
int rxaddress[5] = { 0 , 0 , 0 , 0 , 0 };
xn_writerxaddress( rxaddress);
xn_writereg( EN_AA , 0 ); // aa disabled
xn_writereg( EN_RXADDR , 1 ); // pipe 0 only
xn_writereg( RF_SETUP , XN_POWER); // lna high current on ( better performance )
xn_writereg( RX_PW_P0 , 15 ); // payload size
xn_writereg( SETUP_RETR , 0 ); // no retransmissions ( redundant?)
xn_writereg( SETUP_AW , 3 ); // address size (5 bits)
xn_command( FLUSH_RX);
xn_writereg( RF_CH , 0 ); // bind on channel 0
#ifdef RADIO_XN297L
xn_writereg( 0x1d, B00111000 ); // 64 bit payload , software ce
spi_cson();
spi_sendbyte( 0xFD); // internal CE high command
spi_sendbyte( 0); // required for above
spi_csoff();
#endif
#ifdef RADIO_XN297
xn_writereg( 0x1d, B00011000 ); // 64 bit payload , software ce
#endif
xn_writereg( 0 , XN_TO_RX ); // power up, crc enabled, rx mode
#ifdef RADIO_CHECK
int rxcheck = xn_readreg( 0x0f); // rx address pipe 5
// should be 0xc6
extern void failloop( int);
if ( rxcheck != 0xc6) failloop(3);
#endif
}
