Exemplo n.º 1
0
static void __init
yosemite_setup_arch(void)
{
	yosemite_set_emacdata();

	ibm440gx_get_clocks(&clocks, YOSEMITE_SYSCLK, 6 * 1843200);
	ocp_sys_info.opb_bus_freq = clocks.opb;

	/* init to some ~sane value until calibrate_delay() runs */
        loops_per_jiffy = 50000000/HZ;

	/* Setup PCI host bridge */
	yosemite_setup_hose();

#ifdef CONFIG_BLK_DEV_INITRD
	if (initrd_start)
		ROOT_DEV = Root_RAM0;
	else
#endif
#ifdef CONFIG_ROOT_NFS
		ROOT_DEV = Root_NFS;
#else
	ROOT_DEV = Root_HDA1;
#endif

	yosemite_early_serial_map();

	/* Identify the system */
	printk( "AMCC PowerPC " BOARDNAME " Platform\n" );
}
Exemplo n.º 2
0
static void __init
yosemite_setup_arch(void)
{
	uint32_t* gpio_base;

	/* configuring GPIO1 for external interrupts */
	gpio_base = (uint32_t*)ioremap64(PPC440EP_GPIO1_ADDR,
					 PPC440EP_GPIO_SIZE);
	if (gpio_base) {
		/* GPIO1_TCR reset bits 8-16*/
		gpio_base[1] &= 0xff007fff;
		/* GPIO1_TSRL reset bits 16-31*/
		gpio_base[4] &= 0xffff0000;
		/* GPIO1_ISR1L set bit pairs 16-17 to 30-31 to 01b*/
		gpio_base[12] |= 0x5555;
		/* GPIO1_TSRH reset bits 0-1*/
		gpio_base[5] &= 0x3fffffff;
		/* GPIO1_ISR1H set bit pair 0-1 to 01b*/
		gpio_base[13] |= 0x40000000;
		iounmap(gpio_base);
	}

	/* setting esxternal clk source for serial ports */
	SDR_WRITE(DCRN_SDR_UART0, 0x800001);
	SDR_WRITE(DCRN_SDR_UART1, 0x800001);

	yosemite_set_emacdata();
	
	ibm440gx_get_clocks(&clocks, YOSEMITE_SYSCLK, 6 * 1843200);
	ocp_sys_info.opb_bus_freq = clocks.opb;

	/* init to some ~sane value until calibrate_delay() runs */
        loops_per_jiffy = 50000000/HZ;

	/* Setup PCI host bridge */
	yosemite_setup_hose();

#ifdef CONFIG_BLK_DEV_INITRD
	if (initrd_start)
		ROOT_DEV = Root_RAM0;
	else
#endif
#ifdef CONFIG_ROOT_NFS
		ROOT_DEV = Root_NFS;
#else
		ROOT_DEV = Root_HDA1;
#endif

	yosemite_early_serial_map();

	/* Identify the system */
	printk( "AMCC PowerPC " BOARDNAME " Platform\n" );
}