void StackAllocationPromoter::fixPhiPredBlock(BlockSet &PhiBlocks,
SILBasicBlock *Dest,
SILBasicBlock *Pred) {
TermInst *TI = Pred->getTerminator();
DEBUG(llvm::dbgs() << "*** Fixing the terminator " << TI << ".\n");
SILValue Def = getLiveOutValue(PhiBlocks, Pred);
DEBUG(llvm::dbgs() << "*** Found the definition: " << *Def);
addArgumentToBranch(Def, Dest, TI);
TI->eraseFromParent();
}
/// We rotated a loop if it has the following properties.
///
/// * It has an exiting header with a conditional branch.
/// * It has a preheader (the function will try to create one for critical edges
/// from cond_br).
///
/// We will rotate at most up to the basic block passed as an argument.
/// We will not rotate a loop where the header is equal to the latch except is
/// RotateSingleBlockLoops is true.
///
/// Note: The code relies on the 'UpTo' basic block to stay within the rotate
/// loop for termination.
bool swift::rotateLoop(SILLoop *L, DominanceInfo *DT, SILLoopInfo *LI,
bool RotateSingleBlockLoops, SILBasicBlock *UpTo,
bool ShouldVerify) {
assert(L != nullptr && DT != nullptr && LI != nullptr &&
"Missing loop information");
auto *Header = L->getHeader();
if (!Header)
return false;
// We need a preheader - this is also a canonicalization for follow-up
// passes.
auto *Preheader = L->getLoopPreheader();
if (!Preheader) {
LLVM_DEBUG(llvm::dbgs() << *L << " no preheader\n");
LLVM_DEBUG(L->getHeader()->getParent()->dump());
return false;
}
if (!RotateSingleBlockLoops && (Header == UpTo || isSingleBlockLoop(L)))
return false;
assert(RotateSingleBlockLoops || L->getBlocks().size() != 1);
// Need a conditional branch that guards the entry into the loop.
auto *LoopEntryBranch = dyn_cast<CondBranchInst>(Header->getTerminator());
if (!LoopEntryBranch)
return false;
// The header needs to exit the loop.
if (!L->isLoopExiting(Header)) {
LLVM_DEBUG(llvm::dbgs() << *L << " not an exiting header\n");
LLVM_DEBUG(L->getHeader()->getParent()->dump());
return false;
}
// We need a single backedge and the latch must not exit the loop if it is
// also the header.
auto *Latch = L->getLoopLatch();
if (!Latch) {
LLVM_DEBUG(llvm::dbgs() << *L << " no single latch\n");
return false;
}
// Make sure we can duplicate the header.
SmallVector<SILInstruction *, 8> MoveToPreheader;
if (!canDuplicateOrMoveToPreheader(L, Preheader, Header, MoveToPreheader)) {
LLVM_DEBUG(llvm::dbgs() << *L
<< " instructions in header preventing rotating\n");
return false;
}
auto *NewHeader = LoopEntryBranch->getTrueBB();
auto *Exit = LoopEntryBranch->getFalseBB();
if (L->contains(Exit))
std::swap(NewHeader, Exit);
assert(L->contains(NewHeader) && !L->contains(Exit) &&
"Could not find loop header and exit block");
// We don't want to rotate such that we merge two headers of separate loops
// into one. This can be turned into an assert again once we have guaranteed
// preheader insertions.
if (!NewHeader->getSinglePredecessorBlock() && Header != Latch)
return false;
// Now that we know we can perform the rotation - move the instructions that
// need moving.
for (auto *Inst : MoveToPreheader)
Inst->moveBefore(Preheader->getTerminator());
LLVM_DEBUG(llvm::dbgs() << " Rotating " << *L);
// Map the values for the duplicated header block. We are duplicating the
// header instructions into the end of the preheader.
llvm::DenseMap<ValueBase *, SILValue> ValueMap;
// The original 'phi' argument values are just the values coming from the
// preheader edge.
ArrayRef<SILArgument *> PHIs = Header->getArguments();
OperandValueArrayRef PreheaderArgs =
cast<BranchInst>(Preheader->getTerminator())->getArgs();
assert(PHIs.size() == PreheaderArgs.size() &&
"Basic block arguments and incoming edge mismatch");
// Here we also store the value index to use into the value map (versus
// non-argument values where the operand use decides which value index to
// use).
for (unsigned Idx = 0, E = PHIs.size(); Idx != E; ++Idx)
ValueMap[PHIs[Idx]] = PreheaderArgs[Idx];
// The other instructions are just cloned to the preheader.
TermInst *PreheaderBranch = Preheader->getTerminator();
for (auto &Inst : *Header) {
if (SILInstruction *cloned = Inst.clone(PreheaderBranch)) {
mapOperands(cloned, ValueMap);
// The actual operand will sort out which result idx to use.
auto instResults = Inst.getResults();
auto clonedResults = cloned->getResults();
assert(instResults.size() == clonedResults.size());
for (auto i : indices(instResults))
ValueMap[instResults[i]] = clonedResults[i];
}
}
PreheaderBranch->dropAllReferences();
PreheaderBranch->eraseFromParent();
// If there were any uses of instructions in the duplicated loop entry check
// block rewrite them using the ssa updater.
rewriteNewLoopEntryCheckBlock(Header, Preheader, ValueMap);
L->moveToHeader(NewHeader);
// Now the original preheader dominates all of headers children and the
// original latch dominates the header.
updateDomTree(DT, Preheader, Latch, Header);
assert(DT->getNode(NewHeader)->getIDom() == DT->getNode(Preheader));
assert(!DT->dominates(Header, Exit) ||
DT->getNode(Exit)->getIDom() == DT->getNode(Preheader));
assert(DT->getNode(Header)->getIDom() == DT->getNode(Latch) ||
((Header == Latch) &&
DT->getNode(Header)->getIDom() == DT->getNode(Preheader)));
// Beautify the IR. Move the old header to after the old latch as it is now
// the latch.
Header->moveAfter(Latch);
// Merge the old latch with the old header if possible.
mergeBasicBlockWithSuccessor(Latch, DT, LI);
// Create a new preheader.
splitIfCriticalEdge(Preheader, NewHeader, DT, LI);
if (ShouldVerify) {
DT->verify();
LI->verify();
Latch->getParent()->verify();
}
LLVM_DEBUG(llvm::dbgs() << " to " << *L);
LLVM_DEBUG(L->getHeader()->getParent()->dump());
return true;
}