Exemplo n.º 1
0
/// This functions walks the use list of Reg until it finds an Instruction
/// that isn't a COPY returns the register class of that instruction.
/// \return The register defined by the first non-COPY instruction.
const TargetRegisterClass *SIFixSGPRCopies::inferRegClassFromUses(
                                                 const SIRegisterInfo *TRI,
                                                 const MachineRegisterInfo &MRI,
                                                 unsigned Reg,
                                                 unsigned SubReg) const {

  const TargetRegisterClass *RC
    = TargetRegisterInfo::isVirtualRegister(Reg) ?
    MRI.getRegClass(Reg) :
    TRI->getPhysRegClass(Reg);

  RC = TRI->getSubRegClass(RC, SubReg);
  for (MachineRegisterInfo::use_instr_iterator
       I = MRI.use_instr_begin(Reg), E = MRI.use_instr_end(); I != E; ++I) {
    switch (I->getOpcode()) {
    case AMDGPU::COPY:
      RC = TRI->getCommonSubClass(RC, inferRegClassFromUses(TRI, MRI,
                                  I->getOperand(0).getReg(),
                                  I->getOperand(0).getSubReg()));
      break;
    }
  }

  return RC;
}
Exemplo n.º 2
0
/// This functions walks the use list of Reg until it finds an Instruction
/// that isn't a COPY returns the register class of that instruction.
/// \return The register defined by the first non-COPY instruction.
const TargetRegisterClass *SIFixSGPRCopies::inferRegClassFromUses(
    const SIRegisterInfo *TRI,
    const MachineRegisterInfo &MRI,
    unsigned Reg,
    unsigned SubReg) const {
    // The Reg parameter to the function must always be defined by either a PHI
    // or a COPY, therefore it cannot be a physical register.
    assert(TargetRegisterInfo::isVirtualRegister(Reg) &&
           "Reg cannot be a physical register");

    const TargetRegisterClass *RC = MRI.getRegClass(Reg);
    RC = TRI->getSubRegClass(RC, SubReg);
    for (MachineRegisterInfo::use_instr_iterator
            I = MRI.use_instr_begin(Reg), E = MRI.use_instr_end(); I != E; ++I) {
        switch (I->getOpcode()) {
        case AMDGPU::COPY:
            RC = TRI->getCommonSubClass(RC, inferRegClassFromUses(TRI, MRI,
                                        I->getOperand(0).getReg(),
                                        I->getOperand(0).getSubReg()));
            break;
        }
    }

    return RC;
}