void TR::ARMSystemLinkage::createEpilogue(TR::Instruction *cursor)
{
TR::CodeGenerator *codeGen = cg();
const TR::ARMLinkageProperties& properties = getProperties();
TR::Machine *machine = codeGen->machine();
TR::Node *lastNode = cursor->getNode();
TR::ResolvedMethodSymbol* bodySymbol = comp()->getJittedMethodSymbol();
TR::RealRegister *stackPtr = machine->getRealRegister(properties.getStackPointerRegister());
// restore link register (r14)
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, bodySymbol->getLocalMappingCursor(), codeGen);
cursor = generateMemSrc1Instruction(cg(), ARMOp_ldr, lastNode, stackSlot, machine->getRealRegister(TR::RealRegister::gr14), cursor);
// restore all preserved registers
for (int r = TR::RealRegister::gr4; r <= TR::RealRegister::gr11; ++r)
{
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, (TR::RealRegister::gr11 - r + 1)*4 + bodySymbol->getLocalMappingCursor(), codeGen);
cursor = generateMemSrc1Instruction(cg(), ARMOp_ldr, lastNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)r), cursor);
}
// remove space for preserved registers
auto frameSize = codeGen->getFrameSizeInBytes();
cursor = generateTrg1Src1ImmInstruction(codeGen, ARMOp_add, lastNode, stackPtr, stackPtr, frameSize, 0, cursor);
// return using `mov r15, r14`
TR::RealRegister *gr14 = machine->getRealRegister(TR::RealRegister::gr14);
TR::RealRegister *gr15 = machine->getRealRegister(TR::RealRegister::gr15);
cursor = generateTrg1Src1Instruction(codeGen, ARMOp_mov, lastNode, gr15, gr14, cursor);
}
void
TR::ARM64SystemLinkage::createEpilogue(TR::Instruction *cursor)
{
TR::CodeGenerator *codeGen = cg();
const TR::ARM64LinkageProperties& properties = getProperties();
TR::Machine *machine = codeGen->machine();
TR::Node *lastNode = cursor->getNode();
TR::ResolvedMethodSymbol *bodySymbol = comp()->getJittedMethodSymbol();
TR::RealRegister *sp = machine->getRealRegister(properties.getStackPointerRegister());
// restore callee-saved registers
uint32_t offset = bodySymbol->getLocalMappingCursor();
for (int r = TR::RealRegister::x19; r <= TR::RealRegister::x28; r++)
{
TR::RealRegister *rr = machine->getRealRegister((TR::RealRegister::RegNum)r);
if (rr->getHasBeenAssignedInMethod())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, codeGen);
cursor = generateTrg1MemInstruction(cg(), TR::InstOpCode::ldrimmx, lastNode, rr, stackSlot, cursor);
offset += 8;
}
}
for (int r = TR::RealRegister::v8; r <= TR::RealRegister::v15; r++)
{
TR::RealRegister *rr = machine->getRealRegister((TR::RealRegister::RegNum)r);
if (rr->getHasBeenAssignedInMethod())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, codeGen);
cursor = generateTrg1MemInstruction(cg(), TR::InstOpCode::vldrimmd, lastNode, rr, stackSlot, cursor);
offset += 8;
}
}
// restore link register (x30)
TR::RealRegister *lr = machine->getRealRegister(TR::RealRegister::lr);
if (machine->getLinkRegisterKilled())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, 0, codeGen);
cursor = generateTrg1MemInstruction(cg(), TR::InstOpCode::ldrimmx, lastNode, lr, stackSlot, cursor);
}
// remove space for preserved registers
uint32_t frameSize = codeGen->getFrameSizeInBytes();
if (constantIsUnsignedImm12(frameSize))
{
cursor = generateTrg1Src1ImmInstruction(codeGen, TR::InstOpCode::addimmx, lastNode, sp, sp, frameSize, cursor);
}
else
{
TR_UNIMPLEMENTED();
}
// return
cursor = generateRegBranchInstruction(codeGen, TR::InstOpCode::ret, lastNode, lr, cursor);
}
void
TR::ARM64SystemLinkage::createPrologue(TR::Instruction *cursor, List<TR::ParameterSymbol> &parmList)
{
TR::CodeGenerator *codeGen = cg();
TR::Machine *machine = codeGen->machine();
TR::ResolvedMethodSymbol *bodySymbol = comp()->getJittedMethodSymbol();
const TR::ARM64LinkageProperties& properties = getProperties();
TR::RealRegister *sp = machine->getRealRegister(properties.getStackPointerRegister());
TR::Node *firstNode = comp()->getStartTree()->getNode();
// allocate stack space
uint32_t frameSize = (uint32_t)codeGen->getFrameSizeInBytes();
if (constantIsUnsignedImm12(frameSize))
{
cursor = generateTrg1Src1ImmInstruction(codeGen, TR::InstOpCode::subimmx, firstNode, sp, sp, frameSize, cursor);
}
else
{
TR_UNIMPLEMENTED();
}
// save link register (x30)
if (machine->getLinkRegisterKilled())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, 0, codeGen);
cursor = generateMemSrc1Instruction(cg(), TR::InstOpCode::strimmx, firstNode, stackSlot, machine->getRealRegister(TR::RealRegister::x30), cursor);
}
// spill argument registers
int32_t nextIntArgReg = 0;
int32_t nextFltArgReg = 0;
ListIterator<TR::ParameterSymbol> parameterIterator(&parmList);
for (TR::ParameterSymbol *parameter = parameterIterator.getFirst();
parameter != NULL && (nextIntArgReg < getProperties().getNumIntArgRegs() || nextFltArgReg < getProperties().getNumFloatArgRegs());
parameter = parameterIterator.getNext())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, parameter->getParameterOffset(), codeGen);
TR::InstOpCode::Mnemonic op;
switch (parameter->getDataType())
{
case TR::Int8:
case TR::Int16:
case TR::Int32:
case TR::Int64:
case TR::Address:
if (nextIntArgReg < getProperties().getNumIntArgRegs())
{
op = (parameter->getSize() == 8) ? TR::InstOpCode::strimmx : TR::InstOpCode::strimmw;
cursor = generateMemSrc1Instruction(cg(), op, firstNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)(TR::RealRegister::x0 + nextIntArgReg)), cursor);
nextIntArgReg++;
}
else
{
nextIntArgReg = getProperties().getNumIntArgRegs() + 1;
}
break;
case TR::Float:
case TR::Double:
if (nextFltArgReg < getProperties().getNumFloatArgRegs())
{
op = (parameter->getSize() == 8) ? TR::InstOpCode::vstrimmd : TR::InstOpCode::vstrimms;
cursor = generateMemSrc1Instruction(cg(), op, firstNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)(TR::RealRegister::v0 + nextFltArgReg)), cursor);
nextFltArgReg++;
}
else
{
nextFltArgReg = getProperties().getNumFloatArgRegs() + 1;
}
break;
case TR::Aggregate:
TR_ASSERT(false, "Function parameters of aggregate types are not currently supported on AArch64.");
break;
default:
TR_ASSERT(false, "Unknown parameter type.");
}
}
// save callee-saved registers
uint32_t offset = bodySymbol->getLocalMappingCursor();
for (int r = TR::RealRegister::x19; r <= TR::RealRegister::x28; r++)
{
TR::RealRegister *rr = machine->getRealRegister((TR::RealRegister::RegNum)r);
if (rr->getHasBeenAssignedInMethod())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, codeGen);
cursor = generateMemSrc1Instruction(cg(), TR::InstOpCode::strimmx, firstNode, stackSlot, rr, cursor);
offset += 8;
}
}
for (int r = TR::RealRegister::v8; r <= TR::RealRegister::v15; r++)
{
TR::RealRegister *rr = machine->getRealRegister((TR::RealRegister::RegNum)r);
if (rr->getHasBeenAssignedInMethod())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, codeGen);
cursor = generateMemSrc1Instruction(cg(), TR::InstOpCode::vstrimmd, firstNode, stackSlot, rr, cursor);
offset += 8;
}
}
}
void TR::ARMSystemLinkage::createPrologue(TR::Instruction *cursor)
{
TR::CodeGenerator *codeGen = cg();
const TR::ARMLinkageProperties& properties = getProperties();
TR::Machine *machine = codeGen->machine();
TR::ResolvedMethodSymbol* bodySymbol = comp()->getJittedMethodSymbol();
TR::Node *firstNode = comp()->getStartTree()->getNode();
TR::RealRegister *stackPtr = machine->getRealRegister(properties.getStackPointerRegister());
// Entry breakpoint
//
if (comp()->getOption(TR_EntryBreakPoints))
{
cursor = new (trHeapMemory()) TR::Instruction(cursor, ARMOp_bad, firstNode, cg());
}
// allocate stack space
auto frameSize = codeGen->getFrameSizeInBytes();
cursor = generateTrg1Src1ImmInstruction(codeGen, ARMOp_sub, firstNode, stackPtr, stackPtr, frameSize, 0, cursor);
// spill argument registers
auto nextIntArgReg = 0;
auto nextFltArgReg = 0;
ListIterator<TR::ParameterSymbol> parameterIterator(&bodySymbol->getParameterList());
for (TR::ParameterSymbol *parameter = parameterIterator.getFirst();
parameter!=NULL && (nextIntArgReg < getProperties().getNumIntArgRegs() || nextFltArgReg < getProperties().getNumFloatArgRegs());
parameter=parameterIterator.getNext())
{
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, parameter->getParameterOffset(), codeGen);
switch (parameter->getDataType())
{
case TR::Int8:
case TR::Int16:
case TR::Int32:
case TR::Address:
if (nextIntArgReg < getProperties().getNumIntArgRegs())
{
cursor = generateMemSrc1Instruction(cg(), ARMOp_str, firstNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)(TR::RealRegister::gr0 + nextIntArgReg)), cursor);
nextIntArgReg++;
}
else
{
nextIntArgReg = getProperties().getNumIntArgRegs() + 1;
}
break;
case TR::Int64:
nextIntArgReg += nextIntArgReg & 0x1; // round to next even number
if (nextIntArgReg + 1 < getProperties().getNumIntArgRegs())
{
cursor = generateMemSrc1Instruction(cg(), ARMOp_str, firstNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)(TR::RealRegister::gr0 + nextIntArgReg)), cursor);
stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, parameter->getParameterOffset() + 4, codeGen);
cursor = generateMemSrc1Instruction(cg(), ARMOp_str, firstNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)(TR::RealRegister::gr0 + nextIntArgReg + 1)), cursor);
nextIntArgReg += 2;
}
else
{
nextIntArgReg = getProperties().getNumIntArgRegs() + 1;
}
break;
case TR::Float:
comp()->failCompilation<UnsupportedParameterType>("Compiling methods with a single precision floating point parameter is not supported");
break;
case TR::Double:
if (nextFltArgReg < getProperties().getNumFloatArgRegs())
{
cursor = generateMemSrc1Instruction(cg(), ARMOp_fstd, firstNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)(TR::RealRegister::fp0 + nextFltArgReg)), cursor);
nextFltArgReg += 1;
}
else
{
nextFltArgReg = getProperties().getNumFloatArgRegs() + 1;
}
break;
case TR::Aggregate:
TR_ASSERT(false, "Function parameters of aggregate types are not currently supported on ARM.");
}
}
// save all preserved registers
for (int r = TR::RealRegister::gr4; r <= TR::RealRegister::gr11; ++r)
{
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, (TR::RealRegister::gr11 - r + 1)*4 + bodySymbol->getLocalMappingCursor(), codeGen);
cursor = generateMemSrc1Instruction(cg(), ARMOp_str, firstNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)r), cursor);
}
// save link register (r14)
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, bodySymbol->getLocalMappingCursor(), codeGen);
cursor = generateMemSrc1Instruction(cg(), ARMOp_str, firstNode, stackSlot, machine->getRealRegister(TR::RealRegister::gr14), cursor);
}