static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc)
{
u32 status;
disable_irq_nosync(irq);
status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
status &= QCA955X_EXT_INT_PCIE_RC2_ALL |
QCA955X_EXT_INT_USB1 |
QCA955X_EXT_INT_USB2;
if (status == 0) {
spurious_interrupt();
goto enable;
}
if (status & QCA955X_EXT_INT_USB1) {
/* TODO: flush DDR? */
generic_handle_irq(ATH79_IP3_IRQ(0));
}
if (status & QCA955X_EXT_INT_USB2) {
/* TODO: flush DDR? */
generic_handle_irq(ATH79_IP3_IRQ(1));
}
if (status & QCA955X_EXT_INT_PCIE_RC2_ALL) {
/* TODO: flush DDR? */
generic_handle_irq(ATH79_IP3_IRQ(2));
}
enable:
enable_irq(irq);
}
static void __init qca955x_usb_setup(void)
{
ath79_usb_register("ehci-platform", 0,
QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE,
ATH79_IP3_IRQ(0),
&ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
ath79_usb_register("ehci-platform", 1,
QCA955X_EHCI1_BASE, QCA955X_EHCI_SIZE,
ATH79_IP3_IRQ(1),
&ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
}
static void __init qca955x_usb_setup(void)
{
struct platform_device *pdev;
ath79_usb_init_resource(ath79_ehci_resources,
QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE,
ATH79_IP3_IRQ(0));
pdev = platform_device_register_resndata(NULL, "ehci-platform", 0,
ath79_ehci_resources,
ARRAY_SIZE(ath79_ehci_resources),
&ath79_ehci_pdata_v2,
sizeof(ath79_ehci_pdata_v2));
if (IS_ERR(pdev)) {
pr_err("Unable to register USB %d device, err=%d\n", 0,
(int) PTR_ERR(pdev));
return;
}
pdev->dev.dma_mask = &ath79_ehci_dmamask;
pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
ath79_usb_init_resource(ath79_ehci_resources,
QCA955X_EHCI1_BASE, QCA955X_EHCI_SIZE,
ATH79_IP3_IRQ(1));
pdev = platform_device_register_resndata(NULL, "ehci-platform", 1,
ath79_ehci_resources,
ARRAY_SIZE(ath79_ehci_resources),
&ath79_ehci_pdata_v2,
sizeof(ath79_ehci_pdata_v2));
if (IS_ERR(pdev)) {
pr_err("Unable to register USB %d device, err=%d\n", 1,
(int) PTR_ERR(pdev));
return;
}
pdev->dev.dma_mask = &ath79_ehci_dmamask;
pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
}
