/*
* NOTE....
* first, disable MIICR_MAUTO, then
* set MII reg offset to BMSR == 0x01
* must set offset before re-enable MIICR_MAUTO
*/
VOID GMACvEnableMiiAutoPoll(DWORD dwIoBase)
{
WORD ww;
BYTE byData;
VNSvOutPortB(dwIoBase + MAC_REG_MIICR, 0);
/* polling once before MAUTO is turned on */
VNSvOutPortB(dwIoBase + MAC_REG_MIIADR, MIIADR_SWMPL);
/* as soon as MIIDL is on, polling is really completed */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
udelay(1000);
VNSvInPortB(dwIoBase + MAC_REG_MIISR, &byData);
if (BITbIsBitOn(byData, MIISR_MIIDL))
break;
}
/* Turn on MAUTO */
VNSvOutPortB(dwIoBase + MAC_REG_MIICR, MIICR_MAUTO);
/* as soon as MIIDL is off, MAUTO is really started */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
VNSvInPortB(dwIoBase + MAC_REG_MIISR, &byData);
if (BITbIsBitOff(byData, MIISR_MIIDL))
break;
}
}
/*
* Description: Read a byte from EEPROM, by MAC I2C
*
* Parameters:
* In:
* dwIoBase - I/O base address
* byContntOffset - address of EEPROM
* Out:
* none
*
* Return Value: data read
*
*/
BYTE SROMbyReadEmbedded(DWORD_PTR dwIoBase, BYTE byContntOffset)
{
WORD wDelay, wNoACK;
BYTE byWait;
BYTE byData;
BYTE byOrg;
byData = 0xFF;
VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
// turn off hardware retry for getting NACK
VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY)));
for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) {
VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID);
VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset);
// issue read command
VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMR);
// wait DONE be set
for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) {
VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
if (BITbIsAnyBitsOn(byWait, (I2MCSR_DONE | I2MCSR_NACK)))
break;
PCAvDelayByIO(CB_DELAY_LOOP_WAIT);
}
if ((wDelay < W_MAX_TIMEOUT) &&
(BITbIsBitOff(byWait, I2MCSR_NACK))) {
break;
}
}
VNSvInPortB(dwIoBase + MAC_REG_I2MDIPT, &byData);
VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg);
return byData;
}
/*
* Description: Auto Load EEPROM to MAC register
*
* Parameters:
* In:
* dwIoBase - I/O base address
* Out:
* none
*
* Return Value: TRUE if success; otherwise FALSE
*
*/
BOOL SROMbAutoLoad (DWORD_PTR dwIoBase)
{
BYTE byWait;
int ii;
BYTE byOrg;
VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
// turn on hardware retry
VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg | I2MCFG_NORETRY));
MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD);
// ii = Rom Address
for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) {
MACvTimer0MicroSDelay(dwIoBase, CB_EEPROM_READBYTE_WAIT);
VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
if (BITbIsBitOff(byWait, I2MCSR_AUTOLD))
break;
}
VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg);
if (ii == EEP_MAX_CONTEXT_SIZE)
return FALSE;
return TRUE;
}
VOID GMACvSetTqIndex(DWORD dwIoBase, BYTE byTxQue, WORD wTdIdx)
{
BYTE byData;
/* Clear RUN */
VNSvOutPortB(dwIoBase + MAC_REG_TDCSR_CLR + (byTxQue / 2), (BYTE)(TRDCSR_RUN << ((byTxQue % 2)*4)));
/* Wait for RUN clear */
while (TRUE) {
VNSvInPortB(dwIoBase + MAC_REG_TDCSR_SET + (byTxQue / 2), &byData);
if (BITbIsBitOff(byData, TRDCSR_RUN << ((byTxQue % 2)*4)))
break;
}
/* Set TdIdx */
VNSvOutPortW(dwIoBase + MAC_REG_TDINDX + byTxQue*2, wTdIdx);
/* Set RUN */
VNSvOutPortB(dwIoBase + MAC_REG_TDCSR_SET + (byTxQue / 2), (BYTE)(TRDCSR_RUN << ((byTxQue % 2)*4)));
}
static void s_vInit(
PSAdapterInfo pAdapter,
UINT uTotalNum,
UINT uIdx
)
{
int ii;
unsigned char check;
pAdapter->cbTotalAdapterNum = uTotalNum;
pAdapter->uAdapterIndex = uIdx;
/* Save Memory Mapped IO base address */
switch (uIdx) {
case 0:
pAdapter->dwIoBase = BA_MAC0;
break;
case 1:
pAdapter->dwIoBase = BA_MAC1;
break;
default:
break;
}
MacDump(MACDBG_INFO, ("Memory mapped IO base address:%08X\n", pAdapter->dwIoBase));
/* check vee oe pee */
VNSvInPortB(pAdapter->dwIoBase+0x77, &check);
if (check & 0x40){
/* Issue AUTOLD in EECSR to reload eeprom to ensure right data from eeprom */
MACvRegBitsOn(pAdapter->dwIoBase, MAC_REG_EECSR, EECSR_AUTOLD);
/* set VEELD */
VNSvOutPortB(pAdapter->dwIoBase+PCI_Configuration_Space_Offset+VMSTS, 0x1);
/* wait until VEELD is set */
ii = 0;
while (1) {
VNSvInPortB(pAdapter->dwIoBase+PCI_Configuration_Space_Offset+VMSTS, &check);
if (check&0x2 || ii == MaxTimeOut)
break;
ii++;
}
/* clear VEELD */
VNSvOutPortB(pAdapter->dwIoBase+PCI_Configuration_Space_Offset+VMSTS, 0x0);
} else {
/* Issue AUTOLD in EECSR to reload eeprom to ensure right data from eeprom */
MACvRegBitsOn(pAdapter->dwIoBase, MAC_REG_EECSR, EECSR_AUTOLD);
/* Wait until EEPROM loading complete */
while (TRUE) {
BYTE byData;
VNSvInPortB(pAdapter->dwIoBase + MAC_REG_EECSR, &byData);
if (BITbIsBitOff(byData, EECSR_AUTOLD))
break;
}
}
/* Get Device ID from PCI configuration space */
VPCIvReadW(pAdapter->dwIoBase, PCI_REG_DEVICE_ID, &pAdapter->wDevId);
MacDump(MACDBG_INFO, ("Device ID:%04X\n", pAdapter->wDevId));
if (pAdapter->wDevId != W_DEVICE_ID_3106A && pAdapter->wDevId != W_DEVICE_ID_3053A)
return;
/* Get Revision ID from PCI configuration */
VPCIvReadB(pAdapter->dwIoBase, PCI_REG_REV_ID, &pAdapter->byRevId);
MacDump(MACDBG_INFO, ("Revision ID:%02X\n", pAdapter->byRevId));
/* Clear sticky bits */
if (g_sOptions.ulInitCmds & INIT_CMD_CLEAR_STICKHW)
MACvClearStckDS(pAdapter->dwIoBase);
if (g_sOptions.byRevId != 0)
pAdapter->byRevId = g_sOptions.byRevId;
/* Set RD,TD number for this adapter now */
/* For 3065, 3106J, 3206 */
pAdapter->cbRD = (g_sOptions.iRDescNum) ? g_sOptions.iRDescNum : CB_INIT_RD_NUM;
pAdapter->cbTD = (g_sOptions.iTDescNum) ? g_sOptions.iTDescNum : CB_INIT_TD_NUM;
/* Save IRQ number */
switch (uIdx) {
case 0:
pAdapter->byIrqLevel = IRQ_ETH0;
/* pAdapter->pvAdapterIsr = ISRvIsrForMAC0; */
break;
case 1:
pAdapter->byIrqLevel = IRQ_ETH1;
/* pAdapter->pvAdapterIsr = ISRvIsrForMAC1; */
break;
default:
break;
}
g_sOptions.uiBuffsize = (g_sOptions.uiBuffsize) ? g_sOptions.uiBuffsize : CB_MAX_BUF_SIZE;
/* Get the offset of PM Capability and save it from pci configuration space */
VPCIvReadB(pAdapter->dwIoBase, PCI_REG_CAP, &pAdapter->byPMRegOffset);
/* Get PHY address */
pAdapter->byPhyId = MACbyGetPhyId(pAdapter->dwIoBase);
MacDump(MACDBG_INFO, ("PHY Address:%02X\n", pAdapter->byPhyId));
/* Get Ethernet address */
for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++)
VNSvInPortB(pAdapter->dwIoBase + MAC_REG_PAR, pAdapter->abyEtherAddr + ii);
/* Allocate RD/TD poiter array & DescBuf array data structure */
if (!g_bInit) {
if (!ADPbDynaAllocBuf(pAdapter)) {
printf("ADPbDynaAllocBuf() can't allocate buffer.\n");
return;
}
}
pAdapter->dwCacheLineSize = sizeof(DWORD) * 4;
/* Set default value of connection type to MEDIA_AUTO */
pAdapter->uConnectionType = MEDIA_AUTO;
/* Init default descriptor number per packet in monitor mode */
pAdapter->uTxDescNumPerPacket = 1;
/* Background timer send as default */
pAdapter->bTxContFunTest = TRUE;
}
