static int __logic_dispatch_push(ccif_msg_t *msg, void *ctl_b)
{
logic_channel_info_t *ch_info;
int ret = 0;
logic_dispatch_ctl_block_t *ctl_block = (logic_dispatch_ctl_block_t*)ctl_b;
int md_id = ctl_block->m_md_id;
int drop = 1;
if (unlikely(msg->channel >= CCCI_MAX_CH_NUM)){
CCCI_MSG_INF(md_id, "cci", "%s get invalid logic ch id:%d\n", \
__FUNCTION__, msg->channel);
ret = -CCCI_ERR_INVALID_LOGIC_CHANNEL_ID;
goto _out;
}
ch_info = &(ctl_block->m_logic_ch_table[msg->channel]);
if (unlikely(ch_info->m_attrs&L_CH_ATTR_TX)){
CCCI_MSG_INF(md_id, "cci", "%s CH:%d %s is tx channel\n", __FUNCTION__, \
msg->channel, ch_info->m_ch_name);
ret = -CCCI_ERR_PUSH_RX_DATA_TO_TX_CHANNEL;
goto _out;
}
// check whether fifo is ready
if (!ch_info->m_kfifo_ready){
CCCI_MSG_INF(md_id, "cci", "%s CH:%d %s's kfifo is not ready\n", \
__FUNCTION__, msg->channel, ch_info->m_ch_name);
ret = -CCCI_ERR_KFIFO_IS_NOT_READY;
goto _out;
}
// Check fifo free space
if (kfifo_is_full(&ch_info->m_kfifo))
{
if (ch_info->m_attrs&L_CH_DROP_TOLERATED){
CCCI_CTL_MSG(md_id, "Drop (%08X %08X %02d %08X) is tolerated\n", \
msg->data[0], msg->data[1], msg->channel, msg->reserved);
ret = sizeof(ccif_msg_t);
} else {
// message should NOT be droped
CCCI_DBG_MSG(md_id, "cci", "kfifo full: ch:%s size:%d (%08X %08X %02d %08X)\n",
ch_info->m_ch_name, kfifo_size(&ch_info->m_kfifo),msg->data[0],
msg->data[1], msg->channel, msg->reserved);
// disalbe CCIF interrupt here????
ret = 0; // Fix this!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
}
goto _out;
}
// Push data
ret = kfifo_in(&ch_info->m_kfifo,msg,sizeof(ccif_msg_t));
WARN_ON(ret!=sizeof(ccif_msg_t));
ctl_block->m_has_pending_data = 1;
drop = 0;
_out:
add_logic_layer_record(md_id, (ccci_msg_t*)msg, drop);
return ret;
}
int ccci_alloc_smem(int md_id)
{
ccci_mem_layout_t *mem_layout_ptr = NULL;
int ret = 0;
int smem_size = 0;
int *smem_vir;
dma_addr_t smem_phy;
int i,j, base_virt, base_phy;
int size;
smem_size = cal_md_smem_size(md_id);
ret = cfg_md_mem_layout(md_id);
if(ret < 0) {
CCCI_MSG_INF(md_id, "ctl", "md mem layout config fail\n");
return ret;
}
mem_layout_ptr = &md_mem_layout_tab[md_id];
#ifdef CCCI_STATIC_SHARED_MEM
if (CCCI_SHARED_MEM_SIZE < smem_size) {
CCCI_MSG_INF(md_id, "ctl", "[error]CCCI shared mem isn't enough: 0x%08X\n", smem_size);
return -ENOMEM;
}
smem_phy = mem_layout_ptr->smem_region_phy;
smem_vir = (int*)ioremap_nocache((unsigned long)smem_phy, smem_size);
if (!smem_vir) {
CCCI_MSG_INF(md_id, "ctl", "ccci smem ioremap fail\n");
return -ENOMEM;
}
#else // dynamic allocation shared memory
smem_vir = dma_alloc_coherent(NULL, smem_size, &smem_phy, GFP_KERNEL);
if (smem_vir == NULL) {
CCCI_MSG_INF(md_id, "ctl", "ccci smem dma_alloc_coherent fail\n");
return -CCCI_ERR_GET_MEM_FAIL;
}
mem_layout_ptr->smem_region_phy = (unsigned int)smem_phy;
mem_layout_ptr->smem_region_size = smem_size;
#endif
mem_layout_ptr->smem_region_vir = (unsigned int)smem_vir;
CCCI_CTL_MSG(md_id, "ccci_smem_phy=%x, ccci_smem_size=%d, ccci_smem_virt=%x\n",
(unsigned int)smem_phy, smem_size, (unsigned int)smem_vir);
WARN_ON(smem_phy&(0x4000-1)||smem_size&(0x4000-1));
// Memory allocate done, config for each sub module
base_virt = (int)smem_vir;
base_phy = (int)smem_phy;
// Total
md_smem_tab[md_id].ccci_smem_vir = base_virt;
md_smem_tab[md_id].ccci_smem_phy = base_phy;
md_smem_tab[md_id].ccci_smem_size = smem_size;
//MD runtime data!! Note: This item must be the first!!!
md_smem_tab[md_id].ccci_md_runtime_data_smem_base_virt = base_virt;
md_smem_tab[md_id].ccci_md_runtime_data_smem_base_phy = base_phy;
md_smem_tab[md_id].ccci_md_runtime_data_smem_size = CCCI_MD_RUNTIME_DATA_SMEM_SIZE;
base_virt += CCCI_MD_RUNTIME_DATA_SMEM_SIZE;
base_phy += CCCI_MD_RUNTIME_DATA_SMEM_SIZE;
// EXP
md_smem_tab[md_id].ccci_exp_smem_base_virt = base_virt;
md_smem_tab[md_id].ccci_exp_smem_base_phy = base_phy;
md_smem_tab[md_id].ccci_exp_smem_size = MD_EX_LOG_SIZE;
base_virt += MD_EX_LOG_SIZE;
base_phy += MD_EX_LOG_SIZE;
//MD Exception expand Info
md_smem_tab[md_id].ccci_md_ex_exp_info_smem_base_virt = base_virt;
md_smem_tab[md_id].ccci_md_ex_exp_info_smem_base_phy = base_phy;
md_smem_tab[md_id].ccci_md_ex_exp_info_smem_size = CCCI_MD_EX_EXP_INFO_SMEM_SIZE;
base_virt += CCCI_MD_EX_EXP_INFO_SMEM_SIZE;
base_phy += CCCI_MD_EX_EXP_INFO_SMEM_SIZE;
//Misc info
md_smem_tab[md_id].ccci_misc_info_base_virt = base_virt;
md_smem_tab[md_id].ccci_misc_info_base_phy = base_phy;
md_smem_tab[md_id].ccci_misc_info_size = CCCI_MISC_INFO_SMEM_SIZE;
base_virt += CCCI_MISC_INFO_SMEM_SIZE;
base_phy += CCCI_MISC_INFO_SMEM_SIZE;
base_virt = round_up(base_virt, 0x1000);
base_phy = round_up(base_phy, 0x1000);
// PCM
md_smem_tab[md_id].ccci_pcm_smem_base_virt = base_virt;
md_smem_tab[md_id].ccci_pcm_smem_base_phy = base_phy;
md_smem_tab[md_id].ccci_pcm_smem_size = pcm_smem_size[md_id];
size = round_up(pcm_smem_size[md_id], 0x1000);
base_virt += size;
base_phy += size;
// LOG
md_smem_tab[md_id].ccci_mdlog_smem_base_virt = base_virt;
md_smem_tab[md_id].ccci_mdlog_smem_base_phy = base_phy;
md_smem_tab[md_id].ccci_mdlog_smem_size = md_log_smem_size[md_id];
size = round_up(md_log_smem_size[md_id], 0x1000);
base_virt += size;
base_phy += size;
// RPC
md_smem_tab[md_id].ccci_rpc_smem_base_virt = base_virt;
md_smem_tab[md_id].ccci_rpc_smem_base_phy = base_phy;
md_smem_tab[md_id].ccci_rpc_smem_size = rpc_smem_size[md_id];
size = round_up(rpc_smem_size[md_id], 0x1000);
base_virt += size;
base_phy += size;
// FS
md_smem_tab[md_id].ccci_fs_smem_base_virt = base_virt;
md_smem_tab[md_id].ccci_fs_smem_base_phy = base_phy;
md_smem_tab[md_id].ccci_fs_smem_size = CCCI_FS_SMEM_SIZE;
size = round_up(CCCI_FS_SMEM_SIZE, 0x1000);
base_virt += size;
base_phy += size;
// TTY: tty_muxd(uart0), tty_meta(uart1), ccmni1(uart2), ccmni2(uart3), ccmni3(uart4), tty_ipc(uart5)
j = 0;
for (i = 0; i < CCCI1_TTY_PORT_NUM-1; i++, j++) {
md_smem_tab[md_id].ccci_tty_smem_base_virt[i] = base_virt;
md_smem_tab[md_id].ccci_tty_smem_base_phy[i] = base_phy;
md_smem_tab[md_id].ccci_tty_smem_size[i] = tty_smem_size[md_id];
base_virt += tty_smem_size[md_id];
base_phy += tty_smem_size[md_id];
}
for (i = 0; i < CCCI1_CCMNI_V1_PORT_NUM; i++, j++) {
if(net_v1_smem_size[md_id] == 0) {
md_smem_tab[md_id].ccci_tty_smem_base_virt[j] = 0;
md_smem_tab[md_id].ccci_tty_smem_base_phy[j] = 0;
md_smem_tab[md_id].ccci_tty_smem_size[j] = 0;
} else {
md_smem_tab[md_id].ccci_tty_smem_base_virt[j] = base_virt;
md_smem_tab[md_id].ccci_tty_smem_base_phy[j] = base_phy;
md_smem_tab[md_id].ccci_tty_smem_size[j] = net_v1_smem_size[md_id];
base_virt += net_v1_smem_size[md_id];
base_phy += net_v1_smem_size[md_id];
}
}
md_smem_tab[md_id].ccci_tty_smem_base_virt[j] = base_virt; // TTY for IPC
md_smem_tab[md_id].ccci_tty_smem_base_phy[j] = base_phy;
md_smem_tab[md_id].ccci_tty_smem_size[j] = tty_smem_size[md_id];
base_virt += tty_smem_size[md_id];
base_phy += tty_smem_size[md_id];
j++;
for (; j < UART_MAX_PORT_NUM; j++) {
md_smem_tab[md_id].ccci_tty_smem_base_virt[j] = 0;
md_smem_tab[md_id].ccci_tty_smem_base_phy[j] = 0;
md_smem_tab[md_id].ccci_tty_smem_size[j] = 0;
}
// PMIC
md_smem_tab[md_id].ccci_pmic_smem_base_virt = 0;
md_smem_tab[md_id].ccci_pmic_smem_base_phy = 0;
md_smem_tab[md_id].ccci_pmic_smem_size = 0;
base_virt += 0;
base_phy += 0;
// SYS
md_smem_tab[md_id].ccci_sys_smem_base_virt = 0;
md_smem_tab[md_id].ccci_sys_smem_base_phy = 0;
md_smem_tab[md_id].ccci_sys_smem_size = 0;
base_virt += 0;
base_phy += 0;
//IPC
md_smem_tab[md_id].ccci_ipc_smem_base_virt = base_virt;
md_smem_tab[md_id].ccci_ipc_smem_base_phy = base_phy;
md_smem_tab[md_id].ccci_ipc_smem_size = CCCI_IPC_SMEM_SIZE;
base_virt += CCCI_IPC_SMEM_SIZE ;
base_phy += CCCI_IPC_SMEM_SIZE;
// CCMNI_V2 -- UP-Link
if(net_smem_ul_size[md_id] != 0) {
md_smem_tab[md_id].ccci_ccmni_smem_ul_base_virt = base_virt;
md_smem_tab[md_id].ccci_ccmni_smem_ul_base_phy = base_phy;
md_smem_tab[md_id].ccci_ccmni_smem_ul_size = net_smem_ul_size[md_id];
base_virt += net_smem_ul_size[md_id];
base_phy += net_smem_ul_size[md_id];
} else {
md_smem_tab[md_id].ccci_ccmni_smem_ul_base_virt = 0;
md_smem_tab[md_id].ccci_ccmni_smem_ul_base_phy = 0;
md_smem_tab[md_id].ccci_ccmni_smem_ul_size = 0;
}
// CCMNI_V2 --DOWN-Link
if(net_smem_dl_size[md_id] != 0) {
md_smem_tab[md_id].ccci_ccmni_smem_dl_base_virt = base_virt;
md_smem_tab[md_id].ccci_ccmni_smem_dl_base_phy = base_phy;
md_smem_tab[md_id].ccci_ccmni_smem_dl_size = net_smem_dl_size[md_id];
base_virt += net_smem_dl_size[md_id];
base_phy += net_smem_dl_size[md_id];
} else {
md_smem_tab[md_id].ccci_ccmni_smem_dl_base_virt = 0;
md_smem_tab[md_id].ccci_ccmni_smem_dl_base_phy = 0;
md_smem_tab[md_id].ccci_ccmni_smem_dl_size = 0;
}
// CCMNI_V2 --Ctrl memory
for (i = 0; i < CCMNI_CHANNEL_CNT; i++) {
if (net_v2_smem_size[md_id] == 0) {
md_smem_tab[md_id].ccci_ccmni_ctl_smem_base_virt[i] = 0;
md_smem_tab[md_id].ccci_ccmni_ctl_smem_base_phy[i] = 0;
md_smem_tab[md_id].ccci_ccmni_ctl_smem_size[i] = 0;
} else {
md_smem_tab[md_id].ccci_ccmni_ctl_smem_base_virt[i] = base_virt;
md_smem_tab[md_id].ccci_ccmni_ctl_smem_base_phy[i] = base_phy;
md_smem_tab[md_id].ccci_ccmni_ctl_smem_size[i] = net_v2_smem_size[md_id];
}
memset((void*)base_virt, 0, net_v2_smem_size[md_id]);
base_virt += net_v2_smem_size[md_id];
base_phy += net_v2_smem_size[md_id];
}
for (; i < CCMNI_MAX_CHANNELS; i++){
md_smem_tab[md_id].ccci_ccmni_ctl_smem_base_virt[i] = 0;
md_smem_tab[md_id].ccci_ccmni_ctl_smem_base_phy[i] = 0;
md_smem_tab[md_id].ccci_ccmni_ctl_smem_size[i] = 0;
}
return ret;
}
static void dump_ccci_md_data(void)
{
int i;
struct modem_runtime_t *runtime = (struct modem_runtime_t *)MD_RUNTIME_ADDR;
char ctmp[12];
int *p;
p = (int*)ctmp;
*p = runtime->Prefix;
p++;
*p = runtime->Platform_L;
p++;
*p = runtime->Platform_H;
CCCI_MSG("**********************************************\n");
CCCI_MSG("Prefix\t\t%c%c%c%c\n", ctmp[0], ctmp[1], ctmp[2], ctmp[3]);
CCCI_MSG("Platform_L\t\t%c%c%c%c\n", ctmp[4], ctmp[5], ctmp[6], ctmp[7]);
CCCI_MSG("Platform_H\t\t%c%c%c%c\n", ctmp[8], ctmp[9], ctmp[10], ctmp[11]);
CCCI_MSG("DriverVersion\t\t0x%x\n", runtime->DriverVersion);
CCCI_MSG("BootChannel\t\t%d\n", runtime->BootChannel);
CCCI_MSG("BootingStartID(Mode)\t\t%d\n", runtime->BootingStartID);
CCCI_MSG("BootAttributes\t\t%d\n", runtime->BootAttributes);
CCCI_MSG("BootReadyID\t\t%d\n", runtime->BootReadyID);
CCCI_CTL_MSG("MdlogShareMemBase\t\t0x%x\n", runtime->MdlogShareMemBase);
CCCI_CTL_MSG("MdlogShareMemSize\t\t%d\n", runtime->MdlogShareMemSize);
CCCI_CTL_MSG("PcmShareMemBase\t\t0x%x\n", runtime->PcmShareMemBase);
CCCI_CTL_MSG("PcmShareMemSize\t\t%d\n", runtime->PcmShareMemSize);
CCCI_CTL_MSG("UartPortNum\t\t%d\n", runtime->UartPortNum);
for (i = 0; i < UART_MAX_PORT_NUM; i++) {
CCCI_CTL_MSG("UartShareMemBase[%d]\t0x%x\n", i, runtime->UartShareMemBase[i]);
CCCI_CTL_MSG("UartShareMemSize[%d]\t%d\n", i, runtime->UartShareMemSize[i]);
}
CCCI_CTL_MSG("FileShareMemBase\t0x%x\n", runtime->FileShareMemBase);
CCCI_CTL_MSG("FileShareMemSize\t%d\n", runtime->FileShareMemSize);
CCCI_CTL_MSG("RpcShareMemBase\t0x%x\n", runtime->RpcShareMemBase);
CCCI_CTL_MSG("RpcShareMemSize\t%d\n", runtime->RpcShareMemSize);
CCCI_CTL_MSG("PmicShareMemBase\t0x%x\n", runtime->PmicShareMemBase);
CCCI_CTL_MSG("PmicShareMemSize\t%d\n", runtime->PmicShareMemSize);
CCCI_CTL_MSG("ExceShareMemBase\t0x%x\n", runtime->ExceShareMemBase);
CCCI_CTL_MSG("ExceShareMemSize\t%d\n", runtime->ExceShareMemSize);
CCCI_CTL_MSG("SysShareMemBase\t\t0x%x\n", runtime->SysShareMemBase);
CCCI_CTL_MSG("SysShareMemSize\t\t%d\n", runtime->SysShareMemSize);
CCCI_CTL_MSG("IPCShareMemBase\t\t0x%x\n",runtime->IPCShareMemBase);
CCCI_CTL_MSG("IPCShareMemSize\t\t0x%x\n",runtime->IPCShareMemSize);
CCCI_CTL_MSG("CheckSum\t\t%d\n", runtime->CheckSum);
p = (int*)ctmp;
*p = runtime->Postfix;
CCCI_MSG("Postfix\t\t%c%c%c%c\n", ctmp[0], ctmp[1], ctmp[2], ctmp[3]);
CCCI_MSG("----------------------------------------------\n");
CCCI_MSG("ccci_smem_virt\t%x\n", (unsigned int)ccci_smem_virt);
CCCI_MSG("ccci_smem_phy\t%x\n", (unsigned int)ccci_smem_phy);
CCCI_MSG("ccci_smem_size\t%08x\n", ccci_smem_size);
CCCI_MSG("ccci_pcm_smem_base_virt\t%x\n", ccci_pcm_smem_base_virt);
CCCI_MSG("ccci_pcm_smem_base_phy\t%x\n", ccci_pcm_smem_base_phy);
CCCI_MSG("ccci_pcm_smem_size\t%d\n", ccci_pcm_smem_size);
CCCI_MSG("ccci_fs_smem_base_virt\t%x\n", ccci_fs_smem_base_virt);
CCCI_MSG("ccci_fs_smem_base_phy\t%x\n", ccci_fs_smem_base_phy);
CCCI_MSG("ccci_fs_smem_size\t%d\n", ccci_fs_smem_size);
for (i = 0; i < UART_MAX_PORT_NUM; i++) {
CCCI_MSG("ccci_tty_smem_base_virt[%d]\t%x\n", i, ccci_tty_smem_base_virt[i]);
CCCI_MSG("ccci_tty_smem_base_phy[%d]\t%x\n", i, ccci_tty_smem_base_phy[i]);
CCCI_MSG("ccci_tty_smem_size[%d]\t%d\n", i, ccci_tty_smem_size[i]);
}
CCCI_MSG("ccci_ipc_smem_base_virt\t%x\n", ccci_ipc_smem_base_virt);
CCCI_MSG("ccci_ipc_smem_base_phy\t%x\n", ccci_ipc_smem_base_phy);
CCCI_MSG("ccci_ipc_smem_size\t%d\n", ccci_ipc_smem_size);
CCCI_MSG("**********************************************\n");
}
static int __init ccci_alloc_smem(void)
{
int ret = 0;
int i, base_virt, base_phy;
ccci_smem_size = CCCI_PCM_SMEM_SIZE +
CCCI_MD_LOG_SIZE +
CCCI_PMIC_SMEM_SIZE +
CCCI_RPC_SMEM_SIZE +
CCCI_FS_SMEM_SIZE +
(CCCI_TTY_SMEM_SIZE * CCCI_TTY_PORT_COUNT) +
#ifdef AP_MD_EINT_SHARE_DATA
CCCI_SYS_SMEM_SIZE +
#endif
MD_EX_LOG_SIZE+
CCCI_IPC_SMEM_SIZE;
ccci_smem_size=round_up(ccci_smem_size,0x4000);
#ifdef CCCI_STATIC_SHARED_MEM
if (CCCI_SHARED_MEM_SIZE < ccci_smem_size) {
CCCI_MSG_INF("ctl", "CCCI shared mem is too small\n");
return -ENOMEM;
}
ccci_smem_virt = ioremap_nocache(CCCI_SHARED_MEM_BASE, CCCI_SHARED_MEM_SIZE);
if (!ccci_smem_virt) {
CCCI_MSG_INF("ctl", "CCCI_MD: alloc_smem err\n");
return -ENOMEM;
}
ccci_smem_phy = CCCI_SHARED_MEM_BASE;
#else // dynamic allocation shared memory
ccci_smem_virt = dma_alloc_coherent(NULL, ccci_smem_size, &ccci_smem_phy, GFP_KERNEL);
if (ccci_smem_virt == NULL) {
CCCI_MSG_INF("ctl", "ccci_alloc_smem\n");
return -ENOMEM;
}
CCCI_CTL_MSG("ccci_smem_size=%d,ccci_smem_virt=%x,ccci_smem_phy=%x\n",
ccci_smem_size, (unsigned int)ccci_smem_virt, (unsigned int)ccci_smem_phy);
#endif
WARN_ON(ccci_smem_phy&(0x4000-1)||ccci_smem_size&(0x4000-1));
base_virt = (int)ccci_smem_virt;
base_phy = (int)ccci_smem_phy;
//LOG
ccci_mdlog_smem_base_virt = base_virt;
ccci_mdlog_smem_base_phy = base_phy;
ccci_mdlog_smem_size = CCCI_MD_LOG_SIZE;
base_virt += CCCI_MD_LOG_SIZE;
base_phy += CCCI_MD_LOG_SIZE;
// PCM
ccci_pcm_smem_base_virt = base_virt;
ccci_pcm_smem_base_phy = base_phy;
ccci_pcm_smem_size = CCCI_PCM_SMEM_SIZE;
base_virt += CCCI_PCM_SMEM_SIZE;
base_phy += CCCI_PCM_SMEM_SIZE;
// FS
ccci_fs_smem_base_virt = base_virt;
ccci_fs_smem_base_phy = base_phy;
ccci_fs_smem_size = CCCI_FS_SMEM_SIZE;
base_virt += CCCI_FS_SMEM_SIZE;
base_phy += CCCI_FS_SMEM_SIZE;
// RPC
ccci_rpc_smem_base_virt = base_virt;
ccci_rpc_smem_base_phy = base_phy;
ccci_rpc_smem_size = CCCI_RPC_SMEM_SIZE;
base_virt += CCCI_RPC_SMEM_SIZE;
base_phy += CCCI_RPC_SMEM_SIZE;
// TTY
for (i = 0; i < CCCI_TTY_PORT_COUNT ; i++) {
ccci_tty_smem_base_virt[i] = base_virt;
ccci_tty_smem_base_phy[i] = base_phy;
ccci_tty_smem_size[i] = CCCI_TTY_SMEM_SIZE;
base_virt += CCCI_TTY_SMEM_SIZE;
base_phy += CCCI_TTY_SMEM_SIZE;
}
for (; i < CCCI_TTY_BUFF_NR; i++) {
ccci_tty_smem_base_virt[i] = 0;
ccci_tty_smem_base_phy[i] = 0;
ccci_tty_smem_size[i] = 0;
}
// PMIC
ccci_pmic_smem_base_virt = base_virt;
ccci_pmic_smem_base_phy = base_phy;
ccci_pmic_smem_size = CCCI_PMIC_SMEM_SIZE;
base_virt += CCCI_PMIC_SMEM_SIZE;
base_phy += CCCI_PMIC_SMEM_SIZE;
// SYS
#ifdef AP_MD_EINT_SHARE_DATA
ccci_sys_smem_base_virt = base_virt;
ccci_sys_smem_base_phy = base_phy;
ccci_sys_smem_size = CCCI_SYS_SMEM_SIZE;
cores_exch_data = (struct ccci_cores_exch_data*)ccci_sys_smem_base_virt;
base_virt += CCCI_SYS_SMEM_SIZE;
base_phy += CCCI_SYS_SMEM_SIZE;
#endif
// EXP
ccci_exp_smem_base_virt = base_virt;
ccci_exp_smem_base_phy = base_phy;
ccci_exp_smem_size = MD_EX_LOG_SIZE;
md_ex_log = (int*)ccci_exp_smem_base_virt ;
base_virt += MD_EX_LOG_SIZE;
base_phy += MD_EX_LOG_SIZE;
//IPC
ccci_ipc_smem_base_virt=base_virt;
ccci_ipc_smem_base_phy=base_phy;
ccci_ipc_smem_size=CCCI_IPC_SMEM_SIZE;
base_virt += CCCI_IPC_SMEM_SIZE ;
base_phy += CCCI_IPC_SMEM_SIZE;
return ret;
}
