int s5p_cec_ioctl(struct inode *inode, struct file *file, u32 cmd,
unsigned long arg)
{
u32 laddr;
switch (cmd) {
case CEC_IOC_SETLADDR:
CECIFPRINTK("ioctl(CEC_IOC_SETLADDR)\n");
if (get_user(laddr, (u32 __user *) arg))
return -EFAULT;
CECIFPRINTK("logical address = 0x%02x\n", laddr);
__s5p_cec_set_addr(laddr);
break;
default:
return -EINVAL;
}
return 0;
}
/**
* @brief CEC interrupt handler
*
* Handles interrupt requests from CEC hardware. \n
* Action depends on current state of CEC hardware.
*/
static irqreturn_t s5p_cec_irq_handler(int irq, void *dev_id)
{
u32 status = 0;
status = s5p_cec_get_status();
if (status & CEC_STATUS_TX_DONE) {
if (status & CEC_STATUS_TX_ERROR) {
CECIFPRINTK(" CEC_STATUS_TX_ERROR!\n");
s5p_cec_set_tx_state(STATE_ERROR);
} else {
CECIFPRINTK(" CEC_STATUS_TX_DONE!\n");
s5p_cec_set_tx_state(STATE_DONE);
}
s5p_clr_pending_tx();
wake_up_interruptible(&g_cec_tx_struct.waitq);
}
if (status & CEC_STATUS_RX_DONE) {
if (status & CEC_STATUS_RX_ERROR) {
CECIFPRINTK(" CEC_STATUS_RX_ERROR!\n");
s5p_cec_rx_reset();
} else {
u32 size;
CECIFPRINTK(" CEC_STATUS_RX_DONE!\n");
/* copy data from internal buffer */
size = status >> 24;
spin_lock(&g_cec_rx_struct.lock);
s5p_cec_get_rx_buf(size, g_cec_rx_struct.buffer);
g_cec_rx_struct.size = size;
s5p_cec_set_rx_state(STATE_DONE);
spin_unlock(&g_cec_rx_struct.lock);
s5p_cec_enable_rx();
}
/* clear interrupt pending bit */
s5p_clr_pending_rx();
wake_up_interruptible(&g_cec_rx_struct.waitq);
}
return IRQ_HANDLED;
}
/**
* @brief CEC interrupt handler
*
* Handles interrupt requests from CEC hardware. \n
* Action depends on current state of CEC hardware.
*/
irqreturn_t s5p_cec_irq_handler(int irq, void *dev_id)
{
u32 status = 0;
/* read flag register */
/* is this our interrupt? */
/*
if (!(flag & (1 << HDMI_IRQ_CEC))) {
return IRQ_NONE;
}
*/
status = __s5p_cec_get_status();
if (status & CEC_STATUS_TX_DONE) {
if (status & CEC_STATUS_TX_ERROR) {
CECIFPRINTK(" CEC_STATUS_TX_ERROR!\n");
__s5p_cec_set_tx_state(STATE_ERROR);
} else {
CECIFPRINTK(" CEC_STATUS_TX_DONE!\n");
__s5p_cec_set_tx_state(STATE_DONE);
}
__s5p_clr_pending_tx();
wake_up_interruptible(&cec_tx_struct.waitq);
}
if (status & CEC_STATUS_RX_DONE) {
if (status & CEC_STATUS_RX_ERROR) {
CECIFPRINTK(" CEC_STATUS_RX_ERROR!\n");
__s5p_cec_rx_reset();
} else {
u32 size;
CECIFPRINTK(" CEC_STATUS_RX_DONE!\n");
/* copy data from internal buffer */
size = status >> 24;
spin_lock(&cec_rx_struct.lock);
__s5p_cec_get_rx_buf(size, cec_rx_struct.buffer);
cec_rx_struct.size = size;
__s5p_cec_set_rx_state(STATE_DONE);
spin_unlock(&cec_rx_struct.lock);
__s5p_cec_enable_rx();
}
/* clear interrupt pending bit */
__s5p_clr_pending_rx();
wake_up_interruptible(&cec_rx_struct.waitq);
}
return IRQ_HANDLED;
}
