/**
* Initializes the tracing.
*
* @returns VBox status code
* @param pVM The cross context VM structure.
* @param cbEntry The trace entry size.
* @param cEntries The number of entries.
*/
static int dbgfR3TraceEnable(PVM pVM, uint32_t cbEntry, uint32_t cEntries)
{
/*
* Don't enable it twice.
*/
if (pVM->hTraceBufR3 != NIL_RTTRACEBUF)
return VERR_ALREADY_EXISTS;
/*
* Resolve default parameter values.
*/
int rc;
if (!cbEntry)
{
rc = CFGMR3QueryU32Def(CFGMR3GetChild(CFGMR3GetRoot(pVM), "DBGF"), "TraceBufEntrySize", &cbEntry, 128);
AssertRCReturn(rc, rc);
}
if (!cEntries)
{
rc = CFGMR3QueryU32Def(CFGMR3GetChild(CFGMR3GetRoot(pVM), "DBGF"), "TraceBufEntries", &cEntries, 4096);
AssertRCReturn(rc, rc);
}
/*
* Figure the required size.
*/
RTTRACEBUF hTraceBuf;
size_t cbBlock = 0;
rc = RTTraceBufCarve(&hTraceBuf, cEntries, cbEntry, 0 /*fFlags*/, NULL, &cbBlock);
if (rc != VERR_BUFFER_OVERFLOW)
{
AssertReturn(!RT_SUCCESS_NP(rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
return rc;
}
/*
* Allocate a hyper heap block and carve a trace buffer out of it.
*
* Note! We ASSUME that the returned trace buffer handle has the same value
* as the heap block.
*/
cbBlock = RT_ALIGN_Z(cbBlock, PAGE_SIZE);
void *pvBlock;
rc = MMR3HyperAllocOnceNoRel(pVM, cbBlock, PAGE_SIZE, MM_TAG_DBGF, &pvBlock);
if (RT_FAILURE(rc))
return rc;
rc = RTTraceBufCarve(&hTraceBuf, cEntries, cbEntry, 0 /*fFlags*/, pvBlock, &cbBlock);
AssertRCReturn(rc, rc);
AssertRelease(hTraceBuf == (RTTRACEBUF)pvBlock);
AssertRelease((void *)hTraceBuf == pvBlock);
pVM->hTraceBufR3 = hTraceBuf;
pVM->hTraceBufR0 = MMHyperCCToR0(pVM, hTraceBuf);
pVM->hTraceBufRC = MMHyperCCToRC(pVM, hTraceBuf);
return VINF_SUCCESS;
}
tstVMMConfigConstructor(PVM pVM, void *pvUser)
{
int rc = CFGMR3ConstructDefaultTree(pVM);
if ( RT_SUCCESS(rc)
&& g_cCpus > 1)
{
PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
CFGMR3RemoveValue(pRoot, "NumCPUs");
rc = CFGMR3InsertInteger(pRoot, "NumCPUs", g_cCpus);
RTTESTI_CHECK_MSG_RET(RT_SUCCESS(rc), ("CFGMR3InsertInteger(pRoot,\"NumCPUs\",) -> %Rrc\n", rc), rc);
CFGMR3RemoveValue(pRoot, "HwVirtExtForced");
rc = CFGMR3InsertInteger(pRoot, "HwVirtExtForced", true);
RTTESTI_CHECK_MSG_RET(RT_SUCCESS(rc), ("CFGMR3InsertInteger(pRoot,\"HwVirtExtForced\",) -> %Rrc\n", rc), rc);
PCFGMNODE pHwVirtExt = CFGMR3GetChild(pRoot, "HWVirtExt");
CFGMR3RemoveNode(pHwVirtExt);
rc = CFGMR3InsertNode(pRoot, "HWVirtExt", &pHwVirtExt);
RTTESTI_CHECK_MSG_RET(RT_SUCCESS(rc), ("CFGMR3InsertNode(pRoot,\"HWVirtExt\",) -> %Rrc\n", rc), rc);
rc = CFGMR3InsertInteger(pHwVirtExt, "Enabled", true);
RTTESTI_CHECK_MSG_RET(RT_SUCCESS(rc), ("CFGMR3InsertInteger(pHwVirtExt,\"Enabled\",) -> %Rrc\n", rc), rc);
rc = CFGMR3InsertInteger(pHwVirtExt, "64bitEnabled", false);
RTTESTI_CHECK_MSG_RET(RT_SUCCESS(rc), ("CFGMR3InsertInteger(pHwVirtExt,\"64bitEnabled\",) -> %Rrc\n", rc), rc);
}
return rc;
}
/**
* Initialize the global 1 halt method.
*
* @return VBox status code.
* @param pUVM Pointer to the user mode VM structure.
*/
static DECLCALLBACK(int) vmR3HaltGlobal1Init(PUVM pUVM)
{
/*
* The defaults.
*/
uint32_t cNsResolution = SUPSemEventMultiGetResolution(pUVM->vm.s.pSession);
if (cNsResolution > 5*RT_NS_100US)
pUVM->vm.s.Halt.Global1.cNsSpinBlockThresholdCfg = 50000;
else if (cNsResolution > RT_NS_100US)
pUVM->vm.s.Halt.Global1.cNsSpinBlockThresholdCfg = cNsResolution / 4;
else
pUVM->vm.s.Halt.Global1.cNsSpinBlockThresholdCfg = 2000;
/*
* Query overrides.
*
* I don't have time to bother with niceties such as invalid value checks
* here right now. sorry.
*/
PCFGMNODE pCfg = CFGMR3GetChild(CFGMR3GetRoot(pUVM->pVM), "/VMM/HaltedGlobal1");
if (pCfg)
{
uint32_t u32;
if (RT_SUCCESS(CFGMR3QueryU32(pCfg, "SpinBlockThreshold", &u32)))
pUVM->vm.s.Halt.Global1.cNsSpinBlockThresholdCfg = u32;
}
LogRel(("HaltedGlobal1 config: cNsSpinBlockThresholdCfg=%u\n",
pUVM->vm.s.Halt.Global1.cNsSpinBlockThresholdCfg));
return VINF_SUCCESS;
}
/**
* Initializes the tracing.
*
* @returns VBox status code
* @param pVM The cross context VM structure.
*/
int dbgfR3TraceInit(PVM pVM)
{
/*
* Initialize the trace buffer handles.
*/
Assert(NIL_RTTRACEBUF == (RTTRACEBUF)NULL);
pVM->hTraceBufR3 = NIL_RTTRACEBUF;
pVM->hTraceBufRC = NIL_RTRCPTR;
pVM->hTraceBufR0 = NIL_RTR0PTR;
/*
* Check the config and enable tracing if requested.
*/
PCFGMNODE pDbgfNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "DBGF");
#if defined(DEBUG) || defined(RTTRACE_ENABLED)
bool const fDefault = false;
const char * const pszConfigDefault = "";
#else
bool const fDefault = false;
const char * const pszConfigDefault = "";
#endif
bool fTracingEnabled;
int rc = CFGMR3QueryBoolDef(pDbgfNode, "TracingEnabled", &fTracingEnabled, fDefault);
AssertRCReturn(rc, rc);
if (fTracingEnabled)
{
rc = dbgfR3TraceEnable(pVM, 0, 0);
if (RT_SUCCESS(rc))
{
if (pDbgfNode)
{
char *pszTracingConfig;
rc = CFGMR3QueryStringAllocDef(pDbgfNode, "TracingConfig", &pszTracingConfig, pszConfigDefault);
if (RT_SUCCESS(rc))
{
rc = DBGFR3TraceConfig(pVM, pszTracingConfig);
if (RT_FAILURE(rc))
rc = VMSetError(pVM, rc, RT_SRC_POS, "TracingConfig=\"%s\" -> %Rrc", pszTracingConfig, rc);
MMR3HeapFree(pszTracingConfig);
}
}
else
{
rc = DBGFR3TraceConfig(pVM, pszConfigDefault);
if (RT_FAILURE(rc))
rc = VMSetError(pVM, rc, RT_SRC_POS, "TracingConfig=\"%s\" (default) -> %Rrc", pszConfigDefault, rc);
}
}
}
/*
* Register a debug info item that will dump the trace buffer content.
*/
if (RT_SUCCESS(rc))
rc = DBGFR3InfoRegisterInternal(pVM, "tracebuf", "Display the trace buffer content. No arguments.", dbgfR3TraceInfo);
return rc;
}
/**
* Same as dbgfR3AsSearchEnv, except that the path is taken from the DBGF config
* (CFGM).
*
* Nothing is done if the CFGM variable isn't set.
*
* @returns VBox status code.
* @param pszFilename The filename.
* @param pszCfgValue The name of the config variable (under /DBGF/).
* @param pfnOpen The open callback function.
* @param pvUser User argument for the callback.
*/
static int dbgfR3AsSearchCfgPath(PVM pVM, const char *pszFilename, const char *pszCfgValue, PFNDBGFR3ASSEARCHOPEN pfnOpen, void *pvUser)
{
char *pszPath;
int rc = CFGMR3QueryStringAllocDef(CFGMR3GetChild(CFGMR3GetRoot(pVM), "/DBGF"), pszCfgValue, &pszPath, NULL);
if (RT_FAILURE(rc))
return rc;
if (!pszPath)
return VERR_FILE_NOT_FOUND;
rc = dbgfR3AsSearchPath(pszFilename, pszPath, pfnOpen, pvUser);
MMR3HeapFree(pszPath);
return rc;
}
/**
* Initialize the configuration of halt method 1 & 2.
*
* @return VBox status code. Failure on invalid CFGM data.
* @param pVM Pointer to the VM.
*/
static int vmR3HaltMethod12ReadConfigU(PUVM pUVM)
{
/*
* The defaults.
*/
#if 1 /* DEBUGGING STUFF - REMOVE LATER */
pUVM->vm.s.Halt.Method12.u32LagBlockIntervalDivisorCfg = 4;
pUVM->vm.s.Halt.Method12.u32MinBlockIntervalCfg = 2*1000000;
pUVM->vm.s.Halt.Method12.u32MaxBlockIntervalCfg = 75*1000000;
pUVM->vm.s.Halt.Method12.u32StartSpinningCfg = 30*1000000;
pUVM->vm.s.Halt.Method12.u32StopSpinningCfg = 20*1000000;
#else
pUVM->vm.s.Halt.Method12.u32LagBlockIntervalDivisorCfg = 4;
pUVM->vm.s.Halt.Method12.u32MinBlockIntervalCfg = 5*1000000;
pUVM->vm.s.Halt.Method12.u32MaxBlockIntervalCfg = 200*1000000;
pUVM->vm.s.Halt.Method12.u32StartSpinningCfg = 20*1000000;
pUVM->vm.s.Halt.Method12.u32StopSpinningCfg = 2*1000000;
#endif
/*
* Query overrides.
*
* I don't have time to bother with niceties such as invalid value checks
* here right now. sorry.
*/
PCFGMNODE pCfg = CFGMR3GetChild(CFGMR3GetRoot(pUVM->pVM), "/VMM/HaltedMethod1");
if (pCfg)
{
uint32_t u32;
if (RT_SUCCESS(CFGMR3QueryU32(pCfg, "LagBlockIntervalDivisor", &u32)))
pUVM->vm.s.Halt.Method12.u32LagBlockIntervalDivisorCfg = u32;
if (RT_SUCCESS(CFGMR3QueryU32(pCfg, "MinBlockInterval", &u32)))
pUVM->vm.s.Halt.Method12.u32MinBlockIntervalCfg = u32;
if (RT_SUCCESS(CFGMR3QueryU32(pCfg, "MaxBlockInterval", &u32)))
pUVM->vm.s.Halt.Method12.u32MaxBlockIntervalCfg = u32;
if (RT_SUCCESS(CFGMR3QueryU32(pCfg, "StartSpinning", &u32)))
pUVM->vm.s.Halt.Method12.u32StartSpinningCfg = u32;
if (RT_SUCCESS(CFGMR3QueryU32(pCfg, "StopSpinning", &u32)))
pUVM->vm.s.Halt.Method12.u32StopSpinningCfg = u32;
LogRel(("HaltedMethod1 config: %d/%d/%d/%d/%d\n",
pUVM->vm.s.Halt.Method12.u32LagBlockIntervalDivisorCfg,
pUVM->vm.s.Halt.Method12.u32MinBlockIntervalCfg,
pUVM->vm.s.Halt.Method12.u32MaxBlockIntervalCfg,
pUVM->vm.s.Halt.Method12.u32StartSpinningCfg,
pUVM->vm.s.Halt.Method12.u32StopSpinningCfg));
}
return VINF_SUCCESS;
}
static void doInVmmTests(RTTEST hTest)
{
/*
* Create empty VM structure and init SSM.
*/
int rc = SUPR3Init(NULL);
if (RT_FAILURE(rc))
{
RTTestSkipped(hTest, "SUPR3Init failed with rc=%Rrc", rc);
return;
}
PVM pVM;
RTTESTI_CHECK_RC_RETV(SUPR3PageAlloc(RT_ALIGN_Z(sizeof(*pVM), PAGE_SIZE) >> PAGE_SHIFT, (void **)&pVM), VINF_SUCCESS);
PUVM pUVM = (PUVM)RTMemPageAlloc(sizeof(*pUVM));
pUVM->u32Magic = UVM_MAGIC;
pUVM->pVM = pVM;
pVM->pUVM = pUVM;
/*
* Do the testing.
*/
RTTESTI_CHECK_RC_RETV(STAMR3InitUVM(pUVM), VINF_SUCCESS);
RTTESTI_CHECK_RC_RETV(MMR3InitUVM(pUVM), VINF_SUCCESS);
RTTESTI_CHECK_RC_RETV(CFGMR3Init(pVM, NULL, NULL), VINF_SUCCESS);
RTTESTI_CHECK_RETV(CFGMR3GetRoot(pVM) != NULL);
doTestsOnDefaultValues(CFGMR3GetRoot(pVM));
doGeneralTests(CFGMR3GetRoot(pVM));
/* done */
RTTESTI_CHECK_RC_RETV(CFGMR3Term(pVM), VINF_SUCCESS);
}
tstVMREQConfigConstructor(PUVM pUVM, PVM pVM, void *pvUser)
{
NOREF(pvUser);
int rc = CFGMR3ConstructDefaultTree(pVM);
if (RT_SUCCESS(rc))
{
/* Disable HM, otherwise it will fail on machines without unrestricted guest execution
* because the allocation of HM_VTX_TOTAL_DEVHEAP_MEM will fail -- no VMMDev */
PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
rc = CFGMR3InsertInteger(pRoot, "HMEnabled", false);
if (RT_FAILURE(rc))
RTPrintf("CFGMR3InsertInteger(pRoot,\"HMEnabled\",) -> %Rrc\n", rc);
}
return rc;
}
/**
* Changes the halt method.
*
* @returns VBox status code.
* @param pUVM Pointer to the user mode VM structure.
* @param enmHaltMethod The new halt method.
* @thread EMT.
*/
int vmR3SetHaltMethodU(PUVM pUVM, VMHALTMETHOD enmHaltMethod)
{
PVM pVM = pUVM->pVM; Assert(pVM);
VM_ASSERT_EMT(pVM);
AssertReturn(enmHaltMethod > VMHALTMETHOD_INVALID && enmHaltMethod < VMHALTMETHOD_END, VERR_INVALID_PARAMETER);
/*
* Resolve default (can be overridden in the configuration).
*/
if (enmHaltMethod == VMHALTMETHOD_DEFAULT)
{
uint32_t u32;
int rc = CFGMR3QueryU32(CFGMR3GetChild(CFGMR3GetRoot(pVM), "VM"), "HaltMethod", &u32);
if (RT_SUCCESS(rc))
{
enmHaltMethod = (VMHALTMETHOD)u32;
if (enmHaltMethod <= VMHALTMETHOD_INVALID || enmHaltMethod >= VMHALTMETHOD_END)
return VMSetError(pVM, VERR_INVALID_PARAMETER, RT_SRC_POS, N_("Invalid VM/HaltMethod value %d"), enmHaltMethod);
}
else if (rc == VERR_CFGM_VALUE_NOT_FOUND || rc == VERR_CFGM_CHILD_NOT_FOUND)
return VMSetError(pVM, rc, RT_SRC_POS, N_("Failed to Query VM/HaltMethod as uint32_t"));
else
enmHaltMethod = VMHALTMETHOD_GLOBAL_1;
//enmHaltMethod = VMHALTMETHOD_1;
//enmHaltMethod = VMHALTMETHOD_OLD;
}
LogRel(("VM: Halt method %s (%d)\n", vmR3GetHaltMethodName(enmHaltMethod), enmHaltMethod));
/*
* Find the descriptor.
*/
unsigned i = 0;
while ( i < RT_ELEMENTS(g_aHaltMethods)
&& g_aHaltMethods[i].enmHaltMethod != enmHaltMethod)
i++;
AssertReturn(i < RT_ELEMENTS(g_aHaltMethods), VERR_INVALID_PARAMETER);
/*
* This needs to be done while the other EMTs are not sleeping or otherwise messing around.
*/
return VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, vmR3SetHaltMethodCallback, (void *)(uintptr_t)i);
}
/**
* @interface_method_impl{VBOXEXTPACKREG,pfnVMConfigureVMM
*/
static DECLCALLBACK(int) vboxBusMouseExtPack_VMConfigureVMM(PCVBOXEXTPACKREG pThis, IConsole *pConsole, PVM pVM)
{
/*
* Find the bus mouse module and tell PDM to load it.
* ASSUME /PDM/Devices exists.
*/
char szPath[RTPATH_MAX];
int rc = g_pHlp->pfnFindModule(g_pHlp, "VBoxBusMouseR3", NULL, VBOXEXTPACKMODKIND_R3, szPath, sizeof(szPath), NULL);
if (RT_FAILURE(rc))
return rc;
PCFGMNODE pCfgRoot = CFGMR3GetRoot(pVM);
AssertReturn(pCfgRoot, VERR_INTERNAL_ERROR_3);
PCFGMNODE pCfgDevices = CFGMR3GetChild(pCfgRoot, "PDM/Devices");
AssertReturn(pCfgDevices, VERR_INTERNAL_ERROR_3);
PCFGMNODE pCfgMine;
rc = CFGMR3InsertNode(pCfgDevices, "VBoxBusMouse", &pCfgMine);
AssertRCReturn(rc, rc);
rc = CFGMR3InsertString(pCfgMine, "Path", szPath);
AssertRCReturn(rc, rc);
/*
* Tell PDM where to find the R0 and RC modules for the bus mouse device.
*/
#ifdef VBOX_WITH_RAW_MODE
rc = g_pHlp->pfnFindModule(g_pHlp, "VBoxBusMouseRC", NULL, VBOXEXTPACKMODKIND_RC, szPath, sizeof(szPath), NULL);
AssertRCReturn(rc, rc);
RTPathStripFilename(szPath);
rc = CFGMR3InsertString(pCfgMine, "RCSearchPath", szPath);
AssertRCReturn(rc, rc);
#endif
rc = g_pHlp->pfnFindModule(g_pHlp, "VBoxBusMouseR0", NULL, VBOXEXTPACKMODKIND_R0, szPath, sizeof(szPath), NULL);
AssertRCReturn(rc, rc);
RTPathStripFilename(szPath);
rc = CFGMR3InsertString(pCfgMine, "R0SearchPath", szPath);
AssertRCReturn(rc, rc);
return VINF_SUCCESS;
}
DECLCALLBACK(int) CFGMConstructor(PVM pVM, void *pvUser)
{
/*
* Get root node first.
* This is the only node in the tree.
*/
PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
int rc = CFGMR3InsertInteger(pRoot, "RamSize", 32*1024*1024);
AssertRC(rc);
/* rc = CFGMR3InsertInteger(pRoot, "EnableNestedPaging", false);
AssertRC(rc); */
PCFGMNODE pHWVirtExt;
rc = CFGMR3InsertNode(pRoot, "HWVirtExt", &pHWVirtExt);
AssertRC(rc);
rc = CFGMR3InsertInteger(pHWVirtExt, "Enabled", 1);
AssertRC(rc);
return VINF_SUCCESS;
}
/**
* Initialize the debug info for a VM.
*
* This will check the CFGM for any symbols or symbol files
* which needs loading.
*
* @returns VBox status code.
* @param pVM The VM handle.
*/
int dbgfR3SymInit(PVM pVM)
{
int rc;
/*
* Initialize the symbol table.
*/
pVM->dbgf.s.pSymbolSpace = (PRTSTRSPACE)MMR3HeapAllocZ(pVM, MM_TAG_DBGF_SYMBOL, sizeof(*pVM->dbgf.s.pSymbolSpace));
AssertReturn(pVM->dbgf.s.pSymbolSpace, VERR_NO_MEMORY);
#ifndef HAVE_DBGHELP
/* modules & lines later */
rc = dbgfR3SymbolInit(pVM);
if (RT_FAILURE(rc))
return rc;
pVM->dbgf.s.fSymInited = true;
#endif
/*
* Check if there are 'loadsyms' commands in the configuration.
*/
PCFGMNODE pNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/DBGF/loadsyms/");
if (pNode)
{
/*
* Enumerate the commands.
*/
for (PCFGMNODE pCmdNode = CFGMR3GetFirstChild(pNode);
pCmdNode;
pCmdNode = CFGMR3GetNextChild(pCmdNode))
{
char szCmdName[128];
CFGMR3GetName(pCmdNode, &szCmdName[0], sizeof(szCmdName));
/* File */
char *pszFilename;
rc = CFGMR3QueryStringAlloc(pCmdNode, "Filename", &pszFilename);
AssertMsgRCReturn(rc, ("rc=%Rrc querying the 'File' attribute of '/DBGF/loadsyms/%s'!\n", rc, szCmdName), rc);
/* Delta (optional) */
RTGCINTPTR offDelta;
rc = CFGMR3QueryGCPtrS(pNode, "Delta", &offDelta);
if (rc == VERR_CFGM_VALUE_NOT_FOUND)
offDelta = 0;
else
AssertMsgRCReturn(rc, ("rc=%Rrc querying the 'Delta' attribute of '/DBGF/loadsyms/%s'!\n", rc, szCmdName), rc);
/* Module (optional) */
char *pszModule;
rc = CFGMR3QueryStringAlloc(pCmdNode, "Module", &pszModule);
if (rc == VERR_CFGM_VALUE_NOT_FOUND)
pszModule = NULL;
else
AssertMsgRCReturn(rc, ("rc=%Rrc querying the 'Module' attribute of '/DBGF/loadsyms/%s'!\n", rc, szCmdName), rc);
/* Module (optional) */
RTGCUINTPTR ModuleAddress;
rc = CFGMR3QueryGCPtrU(pNode, "ModuleAddress", &ModuleAddress);
if (rc == VERR_CFGM_VALUE_NOT_FOUND)
ModuleAddress = 0;
else
AssertMsgRCReturn(rc, ("rc=%Rrc querying the 'ModuleAddress' attribute of '/DBGF/loadsyms/%s'!\n", rc, szCmdName), rc);
/* Image size (optional) */
RTGCUINTPTR cbModule;
rc = CFGMR3QueryGCPtrU(pNode, "ModuleSize", &cbModule);
if (rc == VERR_CFGM_VALUE_NOT_FOUND)
cbModule = 0;
else
AssertMsgRCReturn(rc, ("rc=%Rrc querying the 'ModuleAddress' attribute of '/DBGF/loadsyms/%s'!\n", rc, szCmdName), rc);
/*
* Execute the command.
*/
rc = DBGFR3ModuleLoad(pVM, pszFilename, offDelta, pszModule, ModuleAddress, cbModule);
AssertMsgRCReturn(rc, ("pszFilename=%s offDelta=%RGv pszModule=%s ModuleAddress=%RGv cbModule=%RGv\n",
pszFilename, offDelta, pszModule, ModuleAddress, cbModule), rc);
MMR3HeapFree(pszModule);
MMR3HeapFree(pszFilename);
}
}
/*
* Check if there are any 'symadd' commands in the configuration.
*/
return VINF_SUCCESS;
}
/**
* Initialize the network shaper.
*
* @returns VBox status code
* @param pVM Pointer to the VM.
*/
int pdmR3NetShaperInit(PVM pVM)
{
LogFlowFunc((": pVM=%p\n", pVM));
VM_ASSERT_EMT(pVM);
PPDMNETSHAPER pNetShaper = NULL;
int rc = MMR3HeapAllocZEx(pVM, MM_TAG_PDM_NET_SHAPER,
sizeof(PDMNETSHAPER),
(void **)&pNetShaper);
if (RT_SUCCESS(rc))
{
PCFGMNODE pCfgRoot = CFGMR3GetRoot(pVM);
PCFGMNODE pCfgNetShaper = CFGMR3GetChild(CFGMR3GetChild(pCfgRoot, "PDM"), "NetworkShaper");
pNetShaper->pVM = pVM;
rc = RTCritSectInit(&pNetShaper->cs);
if (RT_SUCCESS(rc))
{
/* Create all bandwidth groups. */
PCFGMNODE pCfgBwGrp = CFGMR3GetChild(pCfgNetShaper, "BwGroups");
if (pCfgBwGrp)
{
for (PCFGMNODE pCur = CFGMR3GetFirstChild(pCfgBwGrp); pCur; pCur = CFGMR3GetNextChild(pCur))
{
uint64_t cbMax;
size_t cbName = CFGMR3GetNameLen(pCur) + 1;
char *pszBwGrpId = (char *)RTMemAllocZ(cbName);
if (!pszBwGrpId)
{
rc = VERR_NO_MEMORY;
break;
}
rc = CFGMR3GetName(pCur, pszBwGrpId, cbName);
AssertRC(rc);
if (RT_SUCCESS(rc))
rc = CFGMR3QueryU64(pCur, "Max", &cbMax);
if (RT_SUCCESS(rc))
rc = pdmNsBwGroupCreate(pNetShaper, pszBwGrpId, cbMax);
RTMemFree(pszBwGrpId);
if (RT_FAILURE(rc))
break;
}
}
if (RT_SUCCESS(rc))
{
PUVM pUVM = pVM->pUVM;
AssertMsg(!pUVM->pdm.s.pNetShaper, ("Network shaper was already initialized\n"));
char szDesc[64];
static unsigned s_iThread;
RTStrPrintf(szDesc, sizeof(szDesc), "PDMNsTx-%d", ++s_iThread);
rc = PDMR3ThreadCreate(pVM, &pNetShaper->hTxThread, pNetShaper,
pdmR3NsTxThread, pdmR3NsTxWakeUp, 0,
RTTHREADTYPE_IO, szDesc);
if (RT_SUCCESS(rc))
{
pUVM->pdm.s.pNetShaper = pNetShaper;
return VINF_SUCCESS;
}
}
RTCritSectDelete(&pNetShaper->cs);
}
MMR3HeapFree(pNetShaper);
}
LogFlowFunc((": pVM=%p rc=%Rrc\n", pVM, rc));
return rc;
}
/**
* Initialize the network shaper.
*
* @returns VBox status code
* @param pVM The cross context VM structure.
*/
int pdmR3NetShaperInit(PVM pVM)
{
LogFlow(("pdmR3NetShaperInit: pVM=%p\n", pVM));
VM_ASSERT_EMT(pVM);
PUVM pUVM = pVM->pUVM;
AssertMsgReturn(!pUVM->pdm.s.pNetShaper, ("Network shaper was already initialized\n"), VERR_WRONG_ORDER);
PPDMNETSHAPER pShaper;
int rc = MMR3HeapAllocZEx(pVM, MM_TAG_PDM_NET_SHAPER, sizeof(PDMNETSHAPER), (void **)&pShaper);
if (RT_SUCCESS(rc))
{
PCFGMNODE pCfgNetShaper = CFGMR3GetChild(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "NetworkShaper");
pShaper->pVM = pVM;
rc = RTCritSectInit(&pShaper->Lock);
if (RT_SUCCESS(rc))
{
/* Create all bandwidth groups. */
PCFGMNODE pCfgBwGrp = CFGMR3GetChild(pCfgNetShaper, "BwGroups");
if (pCfgBwGrp)
{
for (PCFGMNODE pCur = CFGMR3GetFirstChild(pCfgBwGrp); pCur; pCur = CFGMR3GetNextChild(pCur))
{
size_t cbName = CFGMR3GetNameLen(pCur) + 1;
char *pszBwGrpId = (char *)RTMemAllocZ(cbName);
if (pszBwGrpId)
{
rc = CFGMR3GetName(pCur, pszBwGrpId, cbName);
if (RT_SUCCESS(rc))
{
uint64_t cbMax;
rc = CFGMR3QueryU64(pCur, "Max", &cbMax);
if (RT_SUCCESS(rc))
rc = pdmNsBwGroupCreate(pShaper, pszBwGrpId, cbMax);
}
RTMemFree(pszBwGrpId);
}
else
rc = VERR_NO_MEMORY;
if (RT_FAILURE(rc))
break;
}
}
if (RT_SUCCESS(rc))
{
rc = PDMR3ThreadCreate(pVM, &pShaper->pTxThread, pShaper, pdmR3NsTxThread, pdmR3NsTxWakeUp,
0 /*cbStack*/, RTTHREADTYPE_IO, "PDMNsTx");
if (RT_SUCCESS(rc))
{
pUVM->pdm.s.pNetShaper = pShaper;
return VINF_SUCCESS;
}
}
RTCritSectDelete(&pShaper->Lock);
}
MMR3HeapFree(pShaper);
}
LogFlow(("pdmR3NetShaperInit: pVM=%p rc=%Rrc\n", pVM, rc));
return rc;
}
/* execute the switch. */
VMMR3DECL(int) VMMDoTest(PVM pVM)
{
#if 1
PVMCPU pVCpu = &pVM->aCpus[0];
#ifdef NO_SUPCALLR0VMM
RTPrintf("NO_SUPCALLR0VMM\n");
return VINF_SUCCESS;
#endif
/*
* Setup stack for calling VMMGCEntry().
*/
RTRCPTR RCPtrEP;
int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
if (RT_SUCCESS(rc))
{
RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
/*
* Test various crashes which we must be able to recover from.
*/
vmmR3DoTrapTest(pVM, 0x3, 0, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3");
vmmR3DoTrapTest(pVM, 0x3, 1, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3 WP");
#if defined(DEBUG_bird) /* guess most people would like to skip these since they write to com1. */
vmmR3DoTrapTest(pVM, 0x8, 0, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG]");
SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
bool f;
rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "DoubleFault", &f);
#if !defined(DEBUG_bird)
if (RT_SUCCESS(rc) && f)
#endif
{
/* see triple fault warnings in SELM and VMMGC.cpp. */
vmmR3DoTrapTest(pVM, 0x8, 1, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG] WP");
SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
}
#endif
vmmR3DoTrapTest(pVM, 0xd, 0, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP");
///@todo find a better \#GP case, on intel ltr will \#PF (busy update?) and not \#GP.
//vmmR3DoTrapTest(pVM, 0xd, 1, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP WP");
vmmR3DoTrapTest(pVM, 0xe, 0, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL)");
vmmR3DoTrapTest(pVM, 0xe, 1, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL) WP");
vmmR3DoTrapTest(pVM, 0xe, 2, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler");
/* This test is no longer relevant as fs and gs are loaded with NULL
selectors and we will always return to HC if a #GP occurs while
returning to guest code.
vmmR3DoTrapTest(pVM, 0xe, 4, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler and bad fs");
*/
/*
* Set a debug register and perform a context switch.
*/
rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
if (rc != VINF_SUCCESS)
{
RTPrintf("VMM: Nop test failed, rc=%Rrc not VINF_SUCCESS\n", rc);
return rc;
}
/* a harmless breakpoint */
RTPrintf("VMM: testing hardware bp at 0x10000 (not hit)\n");
DBGFADDRESS Addr;
DBGFR3AddrFromFlat(pVM, &Addr, 0x10000);
RTUINT iBp0;
rc = DBGFR3BpSetReg(pVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp0);
AssertReleaseRC(rc);
rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
if (rc != VINF_SUCCESS)
{
RTPrintf("VMM: DR0=0x10000 test failed with rc=%Rrc!\n", rc);
return rc;
}
/* a bad one at VMMGCEntry */
RTPrintf("VMM: testing hardware bp at VMMGCEntry (hit)\n");
DBGFR3AddrFromFlat(pVM, &Addr, RCPtrEP);
RTUINT iBp1;
rc = DBGFR3BpSetReg(pVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp1);
AssertReleaseRC(rc);
rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
{
RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
return rc;
}
/* resume the breakpoint */
RTPrintf("VMM: resuming hyper after breakpoint\n");
CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) | X86_EFL_RF);
rc = VMMR3ResumeHyper(pVM, pVCpu);
if (rc != VINF_SUCCESS)
{
RTPrintf("VMM: failed to resume on hyper breakpoint, rc=%Rrc = KNOWN BUG\n", rc); /** @todo fix VMMR3ResumeHyper */
return rc;
}
/* engage the breakpoint again and try single stepping. */
RTPrintf("VMM: testing hardware bp at VMMGCEntry + stepping\n");
rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
{
RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
return rc;
}
RTGCUINTREG OldPc = CPUMGetHyperEIP(pVCpu);
RTPrintf("%RGr=>", OldPc);
unsigned i;
for (i = 0; i < 8; i++)
{
CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) | X86_EFL_TF | X86_EFL_RF);
rc = VMMR3ResumeHyper(pVM, pVCpu);
if (rc != VINF_EM_DBG_HYPER_STEPPED)
{
RTPrintf("\nVMM: failed to step on hyper breakpoint, rc=%Rrc\n", rc);
return rc;
}
RTGCUINTREG Pc = CPUMGetHyperEIP(pVCpu);
RTPrintf("%RGr=>", Pc);
if (Pc == OldPc)
{
RTPrintf("\nVMM: step failed, PC: %RGr -> %RGr\n", OldPc, Pc);
return VERR_GENERAL_FAILURE;
}
OldPc = Pc;
}
RTPrintf("ok\n");
/* done, clear it */
if ( RT_FAILURE(DBGFR3BpClear(pVM, iBp0))
|| RT_FAILURE(DBGFR3BpClear(pVM, iBp1)))
{
RTPrintf("VMM: Failed to clear breakpoints!\n");
return VERR_GENERAL_FAILURE;
}
rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
if (rc != VINF_SUCCESS)
{
RTPrintf("VMM: NOP failed, rc=%Rrc\n", rc);
return rc;
}
/*
* Interrupt masking.
*/
RTPrintf("VMM: interrupt masking...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
for (i = 0; i < 10000; i++)
{
uint64_t StartTick = ASMReadTSC();
rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_INTERRUPT_MASKING, 0);
if (rc != VINF_SUCCESS)
{
RTPrintf("VMM: Interrupt masking failed: rc=%Rrc\n", rc);
return rc;
}
uint64_t Ticks = ASMReadTSC() - StartTick;
if (Ticks < (SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000))
RTPrintf("Warning: Ticks=%RU64 (< %RU64)\n", Ticks, SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000);
}
/*
* Interrupt forwarding.
*/
CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
CPUMPushHyper(pVCpu, 0);
CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_HYPER_INTERRUPT);
CPUMPushHyper(pVCpu, pVM->pVMRC);
CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
Log(("trampoline=%x\n", pVM->vmm.s.pfnCallTrampolineRC));
/*
* Switch and do da thing.
*/
RTPrintf("VMM: interrupt forwarding...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
i = 0;
uint64_t tsBegin = RTTimeNanoTS();
uint64_t TickStart = ASMReadTSC();
Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
do
{
rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
if (RT_LIKELY(rc == VINF_SUCCESS))
rc = pVCpu->vmm.s.iLastGZRc;
if (RT_FAILURE(rc))
{
Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
VMMR3FatalDump(pVM, pVCpu, rc);
return rc;
}
i++;
if (!(i % 32))
Log(("VMM: iteration %d, esi=%08x edi=%08x ebx=%08x\n",
i, CPUMGetHyperESI(pVCpu), CPUMGetHyperEDI(pVCpu), CPUMGetHyperEBX(pVCpu)));
} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
uint64_t TickEnd = ASMReadTSC();
uint64_t tsEnd = RTTimeNanoTS();
uint64_t Elapsed = tsEnd - tsBegin;
uint64_t PerIteration = Elapsed / (uint64_t)i;
uint64_t cTicksElapsed = TickEnd - TickStart;
uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
RTPrintf("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration);
Log(("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration));
/*
* These forced actions are not necessary for the test and trigger breakpoints too.
*/
VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
/*
* Profile switching.
*/
RTPrintf("VMM: profiling switcher...\n");
Log(("VMM: profiling switcher...\n"));
uint64_t TickMin = ~0;
tsBegin = RTTimeNanoTS();
TickStart = ASMReadTSC();
Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
for (i = 0; i < 1000000; i++)
{
CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
CPUMPushHyper(pVCpu, 0);
CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_NOP);
CPUMPushHyper(pVCpu, pVM->pVMRC);
CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
uint64_t TickThisStart = ASMReadTSC();
rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
if (RT_LIKELY(rc == VINF_SUCCESS))
rc = pVCpu->vmm.s.iLastGZRc;
uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
if (RT_FAILURE(rc))
{
Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
VMMR3FatalDump(pVM, pVCpu, rc);
return rc;
}
if (TickThisElapsed < TickMin)
TickMin = TickThisElapsed;
}
TickEnd = ASMReadTSC();
tsEnd = RTTimeNanoTS();
Elapsed = tsEnd - tsBegin;
PerIteration = Elapsed / (uint64_t)i;
cTicksElapsed = TickEnd - TickStart;
cTicksPerIteration = cTicksElapsed / (uint64_t)i;
RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
rc = VINF_SUCCESS;
}
else
AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
#endif
return rc;
}
int main()
{
/*
* Init runtime.
*/
RTR3InitExeNoArguments(RTR3INIT_FLAGS_SUPLIB);
/*
* Create empty VM structure and init SSM.
*/
PVM pVM;
int rc = SUPR3Init(NULL);
if (RT_SUCCESS(rc))
rc = SUPR3PageAlloc(RT_ALIGN_Z(sizeof(*pVM), PAGE_SIZE) >> PAGE_SHIFT, (void **)&pVM);
if (RT_FAILURE(rc))
{
RTPrintf("Fatal error: SUP Failure! rc=%Rrc\n", rc);
return 1;
}
static UVM s_UVM;
PUVM pUVM = &s_UVM;
pUVM->pVM = pVM;
pVM->pUVM = pUVM;
rc = STAMR3InitUVM(pUVM);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: STAMR3Init failed. rc=%Rrc\n", rc);
return 1;
}
rc = MMR3InitUVM(pUVM);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: STAMR3Init failed. rc=%Rrc\n", rc);
return 1;
}
rc = CFGMR3Init(pVM, NULL, NULL);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3Init failed. rc=%Rrc\n", rc);
return 1;
}
if (!CFGMR3GetRoot(pVM))
{
RTPrintf("FAILURE: CFGMR3GetRoot failed\n");
return 1;
}
/* integer */
uint64_t u64;
rc = CFGMR3QueryU64(CFGMR3GetRoot(pVM), "RamSize", &u64);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QueryU64(,\"RamSize\",) failed. rc=%Rrc\n", rc);
return 1;
}
size_t cb;
rc = CFGMR3QuerySize(CFGMR3GetRoot(pVM), "RamSize", &cb);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QuerySize(,\"RamSize\",) failed. rc=%Rrc\n", rc);
return 1;
}
if (cb != sizeof(uint64_t))
{
RTPrintf("FAILURE: Incorrect valuesize %d for \"RamSize\" value.\n", cb);
return 1;
}
/* string */
char *pszName = NULL;
rc = CFGMR3QueryStringAlloc(CFGMR3GetRoot(pVM), "Name", &pszName);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QueryStringAlloc(,\"Name\" failed. rc=%Rrc\n", rc);
return 1;
}
rc = CFGMR3QuerySize(CFGMR3GetRoot(pVM), "Name", &cb);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QuerySize(,\"RamSize\",) failed. rc=%Rrc\n", rc);
return 1;
}
if (cb != strlen(pszName) + 1)
{
RTPrintf("FAILURE: Incorrect valuesize %d for \"Name\" value '%s'.\n", cb, pszName);
return 1;
}
MMR3HeapFree(pszName);
/* test multilevel node creation */
PCFGMNODE pChild = NULL;
rc = CFGMR3InsertNode(CFGMR3GetRoot(pVM), "First/Second/Third//Final", &pChild);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3InsertNode(,\"First/Second/Third//Final\" failed. rc=%Rrc\n", rc);
return 1;
}
rc = CFGMR3InsertInteger(pChild, "BoolValue", 1);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3InsertInteger(,\"BoolValue\", 1) failed. rc=%Rrc\n", rc);
return 1;
}
PCFGMNODE pNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "First/Second/Third/Final");
if (pNode != pChild)
{
RTPrintf("FAILURE: CFGMR3GetChild(,\"First/Second/Third/Final/BoolValue\") failed. pNode=%p expected %p\n", pNode, pChild);
return 1;
}
bool f = false;
rc = CFGMR3QueryBool(pNode, "BoolValue", &f);
if (RT_FAILURE(rc) || !f)
{
RTPrintf("FAILURE: CFGMR3QueryBool(,\"BoolValue\",) failed. rc=%Rrc f=%d\n", rc, f);
return 1;
}
/* done */
rc = CFGMR3Term(pVM);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QueryU64(,\"RamSize\" failed. rc=%Rrc\n", rc);
return 1;
}
RTPrintf("tstCFGM: SUCCESS\n");
return rc;
}
/**
* Creates the default configuration.
* This assumes an empty tree.
*
* @returns VBox status code.
* @param pVM VM handle.
*/
static DECLCALLBACK(int) cfgmR3CreateDefault(PVM pVM, void *pvUser)
{
uint64_t cbMem = *(uint64_t *)pvUser;
int rc;
int rcAll = VINF_SUCCESS;
bool fIOAPIC = false;
#define UPDATERC() do { if (RT_FAILURE(rc) && RT_SUCCESS(rcAll)) rcAll = rc; } while (0)
/*
* Create VM default values.
*/
PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
rc = CFGMR3InsertString(pRoot, "Name", "Default VM");
UPDATERC();
rc = CFGMR3InsertInteger(pRoot, "RamSize", cbMem);
UPDATERC();
rc = CFGMR3InsertInteger(pRoot, "TimerMillies", 10);
UPDATERC();
rc = CFGMR3InsertInteger(pRoot, "RawR3Enabled", 0);
UPDATERC();
/** @todo CFGM Defaults: RawR0, PATMEnabled and CASMEnabled needs attention later. */
rc = CFGMR3InsertInteger(pRoot, "RawR0Enabled", 0);
UPDATERC();
rc = CFGMR3InsertInteger(pRoot, "PATMEnabled", 0);
UPDATERC();
rc = CFGMR3InsertInteger(pRoot, "CSAMEnabled", 0);
UPDATERC();
/*
* PDM.
*/
PCFGMNODE pPdm;
rc = CFGMR3InsertNode(pRoot, "PDM", &pPdm);
UPDATERC();
PCFGMNODE pDevices = NULL;
rc = CFGMR3InsertNode(pPdm, "Devices", &pDevices);
UPDATERC();
rc = CFGMR3InsertInteger(pDevices, "LoadBuiltin", 1); /* boolean */
UPDATERC();
PCFGMNODE pDrivers = NULL;
rc = CFGMR3InsertNode(pPdm, "Drivers", &pDrivers);
UPDATERC();
rc = CFGMR3InsertInteger(pDrivers, "LoadBuiltin", 1); /* boolean */
UPDATERC();
/*
* Devices
*/
pDevices = NULL;
rc = CFGMR3InsertNode(pRoot, "Devices", &pDevices);
UPDATERC();
/* device */
PCFGMNODE pDev = NULL;
PCFGMNODE pInst = NULL;
PCFGMNODE pCfg = NULL;
#if 0
PCFGMNODE pLunL0 = NULL;
PCFGMNODE pLunL1 = NULL;
#endif
/*
* PC Arch.
*/
rc = CFGMR3InsertNode(pDevices, "pcarch", &pDev);
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
/*
* PC Bios.
*/
rc = CFGMR3InsertNode(pDevices, "pcbios", &pDev);
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "RamSize", cbMem);
UPDATERC();
rc = CFGMR3InsertString(pCfg, "BootDevice0", "IDE");
UPDATERC();
rc = CFGMR3InsertString(pCfg, "BootDevice1", "NONE");
UPDATERC();
rc = CFGMR3InsertString(pCfg, "BootDevice2", "NONE");
UPDATERC();
rc = CFGMR3InsertString(pCfg, "BootDevice3", "NONE");
UPDATERC();
rc = CFGMR3InsertString(pCfg, "HardDiskDevice", "piix3ide");
UPDATERC();
rc = CFGMR3InsertString(pCfg, "FloppyDevice", "i82078");
rc = CFGMR3InsertInteger(pCfg, "IOAPIC", fIOAPIC); UPDATERC();
RTUUID Uuid;
RTUuidClear(&Uuid);
rc = CFGMR3InsertBytes(pCfg, "UUID", &Uuid, sizeof(Uuid)); UPDATERC();
/* Bios logo. */
rc = CFGMR3InsertInteger(pCfg, "FadeIn", 0);
UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "FadeOut", 0);
UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "LogoTime", 0);
UPDATERC();
rc = CFGMR3InsertString(pCfg, "LogoFile", "");
UPDATERC();
/*
* ACPI
*/
rc = CFGMR3InsertNode(pDevices, "acpi", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "RamSize", cbMem); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "IOAPIC", fIOAPIC); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIDeviceNo", 7); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIFunctionNo", 0); UPDATERC();
/*
* DMA
*/
rc = CFGMR3InsertNode(pDevices, "8237A", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
/*
* PCI bus.
*/
rc = CFGMR3InsertNode(pDevices, "pci", &pDev); /* piix3 */
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "IOAPIC", fIOAPIC); UPDATERC();
/*
* PS/2 keyboard & mouse
*/
rc = CFGMR3InsertNode(pDevices, "pckbd", &pDev);
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
/*
* Floppy
*/
rc = CFGMR3InsertNode(pDevices, "i82078", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "IRQ", 6); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "DMA", 2); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "MemMapped", 0 ); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "IOBase", 0x3f0); UPDATERC();
/*
* i8254 Programmable Interval Timer And Dummy Speaker
*/
rc = CFGMR3InsertNode(pDevices, "i8254", &pDev);
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
/*
* i8259 Programmable Interrupt Controller.
*/
rc = CFGMR3InsertNode(pDevices, "i8259", &pDev);
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
/*
* APIC.
*/
rc = CFGMR3InsertNode(pDevices, "apic", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "IOAPIC", fIOAPIC); UPDATERC();
if (fIOAPIC)
{
/*
* I/O Advanced Programmable Interrupt Controller.
*/
rc = CFGMR3InsertNode(pDevices, "ioapic", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
}
/*
* RTC MC146818.
*/
rc = CFGMR3InsertNode(pDevices, "mc146818", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
/*
* VGA.
*/
rc = CFGMR3InsertNode(pDevices, "vga", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIDeviceNo", 2); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIFunctionNo", 0); UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "VRamSize", 8 * _1M); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "CustomVideoModes", 0);
rc = CFGMR3InsertInteger(pCfg, "HeightReduction", 0); UPDATERC();
//rc = CFGMR3InsertInteger(pCfg, "MonitorCount", 1); UPDATERC();
/*
* IDE controller.
*/
rc = CFGMR3InsertNode(pDevices, "piix3ide", &pDev); /* piix3 */
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIDeviceNo", 1); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIFunctionNo", 1); UPDATERC();
/*
* Network card.
*/
rc = CFGMR3InsertNode(pDevices, "pcnet", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIDeviceNo", 3); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIFunctionNo", 0); UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "Am79C973", 1); UPDATERC();
RTMAC Mac;
Mac.au16[0] = 0x0080;
Mac.au16[2] = Mac.au16[1] = 0x8086;
rc = CFGMR3InsertBytes(pCfg, "MAC", &Mac, sizeof(Mac)); UPDATERC();
/*
* VMM Device
*/
rc = CFGMR3InsertNode(pDevices, "VMMDev", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIDeviceNo", 4); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIFunctionNo", 0); UPDATERC();
/*
* ...
*/
#undef UPDATERC
return rcAll;
}