/*********************************************************************//**
* @brief Close Timer/Counter device
* @param[in] TIMx Pointer to timer device, should be:
* - LPC_TIM0: TIMER0 peripheral
* - LPC_TIM1: TIMER1 peripheral
* - LPC_TIM2: TIMER2 peripheral
* - LPC_TIM3: TIMER3 peripheral
* @return None
**********************************************************************/
void TIM_DeInit (LPC_TIM_TypeDef *TIMx)
{
// Disable timer/counter
TIMx->TCR = 0x00;
// Disable power
if (TIMx== LPC_TIM0)
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM0, DISABLE);
else if (TIMx== LPC_TIM1)
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM1, DISABLE);
else if (TIMx== LPC_TIM2)
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, DISABLE);
else if (TIMx== LPC_TIM3)
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, DISABLE);
}
/*********************************************************************//**
* @brief De-initializes the SPIx peripheral registers to their
* default reset values.
* @param[in] SPIx SPI peripheral selected, should be SPI
* @return None
**********************************************************************/
void SPI_DeInit(SPI_TypeDef* SPIx)
{
CHECK_PARAM(PARAM_SPIx(SPIx));
if (SPIx == SPI)
{
/* Set up clock and power for SPI module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSPI, DISABLE);
}
}
void GPS_Wakeup()
{
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE);
//Send GPS Sleep command
uint8_t wakeCmd = ' ';
UART_Send(UART_3, &wakeCmd, 1, BLOCKING);
//Set state to GPS on
gpsActive = 1;
}
/*********************************************************************//**
* @brief Initializes the PWMx peripheral corresponding to the specified
* parameters in the PWM_ConfigStruct.
* @param[in] PWMx PWM peripheral, should be LPC_PWM1
* @param[in] PWMTimerCounterMode Timer or Counter mode, should be:
* - PWM_MODE_TIMER: Counter of PWM peripheral is in Timer mode
* - PWM_MODE_COUNTER: Counter of PWM peripheral is in Counter mode
* @param[in] PWM_ConfigStruct Pointer to structure (PWM_TIMERCFG_Type or
* PWM_COUNTERCFG_Type) which will be initialized.
* @return None
* Note: PWM_ConfigStruct pointer will be assigned to corresponding structure
* (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) due to PWMTimerCounterMode.
**********************************************************************/
void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct)
{
PWM_TIMERCFG_Type *pTimeCfg;
PWM_COUNTERCFG_Type *pCounterCfg;
uint64_t clkdlycnt;
CHECK_PARAM(PARAM_PWMx(PWMx));
CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode));
pTimeCfg = (PWM_TIMERCFG_Type *)PWM_ConfigStruct;
pCounterCfg = (PWM_COUNTERCFG_Type *)PWM_ConfigStruct;
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCPWM1, ENABLE);
CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_PWM1, CLKPWR_PCLKSEL_CCLK_DIV_4);
// Get peripheral clock of PWM1
clkdlycnt = (uint64_t) CLKPWR_GetPCLK (CLKPWR_PCLKSEL_PWM1);
// Clear all interrupts pending
PWMx->IR = 0xFF & PWM_IR_BITMASK;
PWMx->TCR = 0x00;
PWMx->CTCR = 0x00;
PWMx->MCR = 0x00;
PWMx->CCR = 0x00;
PWMx->PCR = 0x00;
PWMx->LER = 0x00;
if (PWMTimerCounterMode == PWM_MODE_TIMER)
{
CHECK_PARAM(PARAM_PWM_TIMER_PRESCALE(pTimeCfg->PrescaleOption));
/* Absolute prescale value */
if (pTimeCfg->PrescaleOption == PWM_TIMER_PRESCALE_TICKVAL)
{
PWMx->PR = pTimeCfg->PrescaleValue - 1;
}
/* uSecond prescale value */
else
{
clkdlycnt = (clkdlycnt * pTimeCfg->PrescaleValue) / 1000000;
PWMx->PR = ((uint32_t) clkdlycnt) - 1;
}
}
else if (PWMTimerCounterMode == PWM_MODE_COUNTER)
{
CHECK_PARAM(PARAM_PWM_COUNTER_INPUTSEL(pCounterCfg->CountInputSelect));
CHECK_PARAM(PARAM_PWM_COUNTER_EDGE(pCounterCfg->CounterOption));
PWMx->CTCR |= (PWM_CTCR_MODE((uint32_t)pCounterCfg->CounterOption)) \
| (PWM_CTCR_SELECT_INPUT((uint32_t)pCounterCfg->CountInputSelect));
}
}
void GPS_Sleep()
{
//Send GPS Sleep command
uint8_t* sleepCmd = (uint8_t*)"$PMTK161,0*28\r\n";
UART_Send(UART_3, sleepCmd, 15, BLOCKING);
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE);
//Set state to GPS off
gpsActive = 0;
gpsData.valid = 0;
}
/********************************************************************//**
* @brief Initializes the RTC peripheral.
* @param[in] RTCx RTC peripheral selected, should be LPC_RTC
* @return None
*********************************************************************/
void RTC_Init (LPC_RTC_TypeDef *RTCx)
{
/* Set up clock and power for RTC module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRTC, ENABLE);
// Clear all register to be default
RTCx->ILR = 0x00;
RTCx->CCR = 0x00;
RTCx->CIIR = 0x00;
RTCx->AMR = 0xFF;
RTCx->CALIBRATION = 0x00;
}
/******************************************************************************//*
* @brief DeInitial for RIT
* - Turn off power and clock
* - ReSetup default register values
* @param[in] RITx is RIT peripheral selected, should be: LPC_RIT
* @return None
*******************************************************************************/
void RIT_DeInit(LPC_RIT_TypeDef *RITx)
{
CHECK_PARAM(PARAM_RITx(RITx));
// Turn off power and clock
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRIT, DISABLE);
//ReSetup default register values
RITx->RICOMPVAL = 0xFFFFFFFF;
RITx->RIMASK = 0x00000000;
RITx->RICTRL = 0x0C;
RITx->RICOUNTER = 0x00000000;
}
/*********************************************************************//**
* @brief Close ADC
* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
* @return None
**********************************************************************/
void ADC_DeInit(LPC_ADC_TypeDef *ADCx)
{
CHECK_PARAM(PARAM_ADCx(ADCx));
if (ADCx->ADCR & ADC_CR_START_MASK) //need to stop START bits before DeInit
ADCx->ADCR &= ~ADC_CR_START_MASK;
// Clear SEL bits
ADCx->ADCR &= ~0xFF;
// Clear PDN bit
ADCx->ADCR &= ~ADC_CR_PDN;
// Turn on power and clock
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, DISABLE);
}
/*********************************************************************//**
* @brief De-initializes the UARTx peripheral registers to their
* default reset values.
* @param[in] UARTx UART peripheral selected, should be:
* - LPC_UART0: UART0 peripheral
* - LPC_UART1: UART1 peripheral
* - LPC_UART2: UART2 peripheral
* - LPC_UART3: UART3 peripheral
* @return None
**********************************************************************/
void UART_DeInit(LPC_UART_TypeDef* UARTx)
{
// For debug mode
CHECK_PARAM(PARAM_UARTx(UARTx));
UART_TxCmd(UARTx, DISABLE);
#ifdef _UART0
if (UARTx == LPC_UART0)
{
/* Set up clock and power for UART module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE);
}
#endif
#ifdef _UART1
if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
{
/* Set up clock and power for UART module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE);
}
#endif
#ifdef _UART2
if (UARTx == LPC_UART2)
{
/* Set up clock and power for UART module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE);
}
#endif
#ifdef _UART3
if (UARTx == LPC_UART3)
{
/* Set up clock and power for UART module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE);
}
#endif
}
/*********************************************************************//**
* @brief De-initializes the I2C peripheral registers to their
* default reset values.
* @param[in] I2Cx I2C peripheral selected, should be
* - LPC_I2C0
* - LPC_I2C1
* - LPC_I2C2
* @return None
**********************************************************************/
void I2C_DeInit(LPC_I2C_TypeDef* I2Cx)
{
/* Disable I2C control */
I2Cx->I2CONCLR = I2C_I2CONCLR_I2ENC;
if (I2Cx==LPC_I2C0)
{
/* Disable power for I2C0 module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C0, DISABLE);
}
else if (I2Cx==LPC_I2C1)
{
/* Disable power for I2C1 module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C1, DISABLE);
}
else if (I2Cx==LPC_I2C2)
{
/* Disable power for I2C2 module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C2, DISABLE);
}
}
/********************************************************************//**
* @brief Initializes the I2Cx peripheral with specified parameter.
* @param[in] I2Cx I2C peripheral selected, should be I2C0, I2C1 or I2C2
* @param[in] clockrate Target clock rate value to initialized I2C
* peripheral
* @return None
*********************************************************************/
void I2C_Init(LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
{
//CHECK_PARAM(PARAM_I2Cx(I2Cx));
if (I2Cx==LPC_I2C0)
{
/* Set up clock and power for I2C0 module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C0, ENABLE);
/* As default, peripheral clock for I2C0 module
* is set to FCCLK / 2 */
CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C0, CLKPWR_PCLKSEL_CCLK_DIV_2);
}
else if (I2Cx==LPC_I2C1)
{
/* Set up clock and power for I2C1 module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C1, ENABLE);
/* As default, peripheral clock for I2C1 module
* is set to FCCLK / 2 */
CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C1, CLKPWR_PCLKSEL_CCLK_DIV_2);
}
else if (I2Cx==LPC_I2C2)
{
/* Set up clock and power for I2C2 module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C2, ENABLE);
/* As default, peripheral clock for I2C2 module
* is set to FCCLK / 2 */
CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C2, CLKPWR_PCLKSEL_CCLK_DIV_2);
}
else {
// Up-Support this device
return;
}
/* Set clock rate */
I2C_SetClock(I2Cx, clockrate);
/* Set I2C operation to default */
I2Cx->I2CONCLR = (I2C_I2CONCLR_AAC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_I2ENC);
}
/********************************************************************//**
* @brief Initializes the RTC peripheral.
* @param[in] RTCx RTC peripheral selected, should be RTC
* @return None
*********************************************************************/
void RTC_Init (RTC_TypeDef *RTCx)
{
CHECK_PARAM(PARAM_RTCx(RTCx));
/* Set up clock and power for UART module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRTC, ENABLE);
// Clear all register to be default
RTCx->ILR = 0x00;
RTCx->CCR = 0x00;
RTCx->CIIR = 0x00;
RTCx->AMR = 0x00;
RTCx->CALIBRATION = 0x00;
}
/*********************************************************************//**
* @brief Initializes the MCPWM peripheral
* @param[in] MCPWMx Motor Control PWM peripheral selected,
* Should be: LPC_MCPWM
* @return None
**********************************************************************/
void MCPWM_Init(LPC_MCPWM_TypeDef *MCPWMx)
{
/* Turn On MCPWM PCLK */
CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCMCPWM, ENABLE);
MCPWMx->CAP_CLR = MCPWM_CAPCLR_CAP(0) | MCPWM_CAPCLR_CAP(1) | MCPWM_CAPCLR_CAP(2);
MCPWMx->INTF_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \
| MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \
| MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2);
MCPWMx->INTEN_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \
| MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \
| MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2);
}
void uart3_init(uint32_t baudrate)
{
// P4[28] RX_MCLK / MAT2[0] / TXD3
// P4[29] TX_MCLK / MAT2[1] / RXD3
///////////////////////////////////////
// init uart
CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCUART3, ENABLE);
//CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_UART3, CLKPWR_PCLKSEL_CCLK_DIV_1);
uart_tab[3]->config.Baud_rate = baudrate;
uart_regs_init(3);
}
void uart0_init(uint32_t baudrate)
{
// P0[2] / TXD0
// P0[3] / RXD0
PINSEL_ConfigPin(0, 2, 1);
PINSEL_ConfigPin(0, 3, 1);
CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCUART0, ENABLE);
//CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_UART0, CLKPWR_PCLKSEL_CCLK_DIV_1);
// init uart
uart_tab[0]->config.Baud_rate = baudrate;
uart_regs_init(0);
}
/* dac_init
*
* Initialize the DAC. This must be called once after reset.
*/
void COLD dac_init() {
/* Turn on the PWM and timer peripherals. */
CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCPWM1, ENABLE);
CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_PWM1, CLKPWR_PCLKSEL_CCLK_DIV_4);
/* Set up the SSP to communicate with the DAC, and initialize to 0 */
hw_dac_init();
/* ... and LDAC on the PWM peripheral */
LPC_PINCON->PINSEL4 |= (1 << 8);
/* Get the pin set up to produce a low LDAC puslse */
LPC_GPIO2->FIODIR |= (1 << 4);
LPC_GPIO2->FIOCLR = (1 << 4);
/* The PWM peripheral is used to generate LDAC pulses. Set it up,
* but hold it in reset until go time. */
LPC_PWM1->TCR = PWM_TCR_COUNTER_RESET | PWM_TCR_COUNTER_ENABLE;
/* Reset on match channel 0 */
LPC_PWM1->MCR = PWM_MCR_RESET_ON_MATCH(0) | PWM_MCR_INT_ON_MATCH(0);
/* Enable single-edge PWM on channel 5 */
LPC_PWM1->PCR = PWM_PCR_PWMENAn(5);
/* The match registers themselves will be set by dac_start(). */
/* Enable the write-to-DAC interrupt with the highest priority. */
NVIC_SetPriority(PWM1_IRQn, 0);
NVIC_EnableIRQ(PWM1_IRQn);
dac_control.state = DAC_IDLE;
dac_control.irq_do = IRQ_DO_PANIC;
dac_control.count = 0;
dac_current_pps = 0;
dac_control.color_control.word = 0;
delay_line_reset();
dac_control.red_gain = COORD_MAX;
dac_control.green_gain = COORD_MAX;
dac_control.blue_gain = COORD_MAX;
if (hw_dac_16bit) {
memcpy(PWM1_IRQHandler, goto_dac16_handle_irq, goto_dac16_handle_irq_end - goto_dac16_handle_irq);
}
}
void uart2_init(uint32_t baudrate)
{
// P0[10] / TXD2
// P0[11] / RXD2
PINSEL_ConfigPin(0, 10, 1);
PINSEL_ConfigPin(0, 11, 1);
///////////////////////////////////////
// init uart
CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCUART2, ENABLE);
//CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_UART2, CLKPWR_PCLKSEL_CCLK_DIV_1);
uart_tab[2]->config.Baud_rate = baudrate;
uart_regs_init(2);
}
void uart1_init(uint32_t baudrate)
{
// P0[15] / TXD1
// P0[16] / RXD1
PINSEL_ConfigPin(0, 15, 1);
PINSEL_ConfigPin(0, 16, 1);
///////////////////////////////////////
// init uart
CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCUART1, ENABLE);
//CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_UART1, CLKPWR_PCLKSEL_CCLK_DIV_1);
uart_tab[1]->config.Baud_rate = baudrate;
uart_regs_init(1);
}
int main(void)
{
CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCGPIO, ENABLE);
GPIO_SetDir(1, 1 << 18, 1);
SYSTICK_InternalInit(1); // 1ms entre ticks
SYSTICK_IntCmd(ENABLE); // Habilita interrupcion SYSTICK
SYSTICK_Cmd(ENABLE); // Habilita timer SYSTICK
while(1)
{
Delay(100);
GPIO_ClearValue(1, 1 << 18);
Delay(250);
GPIO_SetValue(1, 1 << 18);
}
}
/*********************************************************************
* @brief Power on EMC Block
* @param[in] None
* @return None
**********************************************************************/
EMC_FUNC_CODE EMC_PwrOn(void)
{
// If CPU clock is > 80 MHz, then divide it by two to create the EMC clock
if(CLKPWR_GetCLK(CLKPWR_CLKTYPE_CPU) > 80000000) {
CLKPWR_SetCLKDiv(CLKPWR_CLKTYPE_EMC, 1); // CPU clock / 2
} else {
CLKPWR_SetCLKDiv(CLKPWR_CLKTYPE_EMC, 0); // Same clock as CPU
}
// Power on
CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCEMC, ENABLE);
// Enable
LPC_EMC->Control = EMC_Control_E;
return EMC_FUNC_OK;
}
/*********************************************************************//**
* @brief Initializes the MCPWM peripheral
* @param[in] MCPWMx Motor Control PWM peripheral selected,
* Should be: LPC_MCPWM
* @return None
**********************************************************************/
void MCPWM_Init(LPC_MCPWM_TypeDef *MCPWMx)
{
/* Turn On MCPWM PCLK */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCMC, ENABLE);
/* As default, peripheral clock for MCPWM module
* is set to FCCLK / 2 */
// CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_MC, CLKPWR_PCLKSEL_CCLK_DIV_2);
MCPWMx->MCCAP_CLR = MCPWM_CAPCLR_CAP(0) | MCPWM_CAPCLR_CAP(1) | MCPWM_CAPCLR_CAP(2);
MCPWMx->MCINTFLAG_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \
| MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \
| MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2);
MCPWMx->MCINTEN_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \
| MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \
| MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2);
}
/********************************************************************//**
* @brief Initialize GPDMA controller
* @param None
* @return None
*********************************************************************/
void GPDMA_Init(void)
{
/* Enable GPDMA clock */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCGPDMA, ENABLE);
// Reset all channel configuration register
LPC_GPDMACH0->DMACCConfig = 0;
LPC_GPDMACH1->DMACCConfig = 0;
LPC_GPDMACH2->DMACCConfig = 0;
LPC_GPDMACH3->DMACCConfig = 0;
LPC_GPDMACH4->DMACCConfig = 0;
LPC_GPDMACH5->DMACCConfig = 0;
LPC_GPDMACH6->DMACCConfig = 0;
LPC_GPDMACH7->DMACCConfig = 0;
/* Clear all DMA interrupt and error flag */
LPC_GPDMA->DMACIntTCClear = 0xFF;
LPC_GPDMA->DMACIntErrClr = 0xFF;
}
// Inicializa módulo RTC
void rtc_init(void) {
RTC_Init(LPC_RTC);
CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCRTC, ENABLE);
// Configura RTC para interrumpir cada 1 segundo
RTC_CntIncrIntConfig(LPC_RTC, RTC_TIMETYPE_SECOND, ENABLE);
// Limpia las interrupciones del RTC
RTC_ClearIntPending(LPC_RTC, RTC_INT_COUNTER_INCREASE);
// Habilita las interrupciones del RTC en NVIC
NVIC_EnableIRQ((IRQn_Type) RTC_IRQn);
// Habilita el módulo RTC --> comienza a contar el tiempo
RTC_Cmd(LPC_RTC, ENABLE);
NVIC_SetPriority((IRQn_Type) RTC_IRQn, 6);
}
void Task0(void *Tags)
{
CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCGPIO, ENABLE);
GPIO_SetDir(2, 1<<21, GPIO_DIRECTION_OUTPUT);
GPIO_OutputValue(2,1<<21,0);
DeBug_SetCallBack(DebugCall);
while(1)
{
Tos_TaskDelay(1000);
GPIO_OutputValue(2,1<<21,0);
Tos_TaskDelay(10);
GPIO_OutputValue(2,1<<21,1);
Tos_TaskDelay(100);
GPIO_OutputValue(2,1<<21,0);
Tos_TaskDelay(10);
GPIO_OutputValue(2,1<<21,1);
Tos_TaskDelay(100);
//DeBug("GUI_ALLOC_GetNumUsedBlocks=%d",GUI_ALLOC_GetNumUsedBlocks(),Infor_Infor);
}
}
void ETHE_Init(void)
{
CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCGPIO, ENABLE);
/* Configure ethernet pin muxing as follows:
RMII_TXD0 -> P1.0 -> FUNC1
RMII_TXD1 -> P1.1 -> FUNC1
RMII_TXEN -> P1.4 -> FUNC1
RMII_RXD0 -> P1.9 -> FUNC1
RMII_RXD1 -> P1.10 -> FUNC1
RMII_CRS -> P1.8 -> FUNC1
RMII_RXER -> P1.14 -> FUNC1
RMII_MDIO -> P1.17 -> FUNC1
RMII_MCD -> P1.16 -> FUNC1
RMII_CLK -> P1.15 -> FUNC1
*/
PINSEL_ConfigPin(1, 0, 1);
PINSEL_ConfigPin(1, 1, 1);
PINSEL_ConfigPin(1, 4, 1);
PINSEL_ConfigPin(1, 9, 1);
PINSEL_ConfigPin(1, 10, 1);
PINSEL_ConfigPin(1, 8, 1);
PINSEL_ConfigPin(1, 14, 1);
PINSEL_ConfigPin(1, 17, 1);
PINSEL_ConfigPin(1, 16, 1);
PINSEL_ConfigPin(1, 15, 1);
PINSEL_ConfigPin(4, 15, 0);
GPIO_SetDir(4, 15, 1);
GPIO_SetValue(4, 1<<15);
for( int i = 0; i < 10000; i++ );
GPIO_ClearValue(4, 1<<15);
for( int i = 0; i < 10000; i++ );
GPIO_SetValue(4, 1<<15);
// struct netif lpc_netif;
// lpc_enetif_init(&lpc_netif);
}
/********************************************************************//**
* @brief Initializes the SPIx peripheral according to the specified
* parameters in the UART_ConfigStruct.
* @param[in] SPIx SPI peripheral selected, should be SPI
* @param[in] SPI_ConfigStruct Pointer to a SPI_CFG_Type structure
* that contains the configuration information for the
* specified SPI peripheral.
* @return None
*********************************************************************/
void SPI_Init(SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct)
{
SPI_PinCFG_Type defaultSPIPinCfg;
uint32_t tmp;
CHECK_PARAM(PARAM_SPIx(SPIx));
if(SPIx == SPI)
{
/* Set up clock and power for UART module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSPI, ENABLE);
/* As default, peripheral clock for UART0 module
* is set to FCCLK / 2 */
CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_SPI, CLKPWR_PCLKSEL_CCLK_DIV_2);
// Set UART0 function pin as default
defaultSPIPinCfg.SCK_Pin = SPI_SCK_P0_15;
defaultSPIPinCfg.SSEL_Pin = SPI_SSEL_P0_16;
defaultSPIPinCfg.MISO_Pin = SPI_MISO_P0_17;
defaultSPIPinCfg.MOSI_Pin = SPI_MOSI_P0_18;
SPI_PinConfig(SPIx, &defaultSPIPinCfg, SPI_ConfigStruct->Mode);
}
// Configure SPI, interrupt is disable as default
tmp = ((SPI_ConfigStruct->CPHA) | (SPI_ConfigStruct->CPOL) \
| (SPI_ConfigStruct->DataOrder) | (SPI_ConfigStruct->Databit) \
| (SPI_ConfigStruct->Mode) | SPI_SPCR_BIT_EN) & SPI_SPCR_BITMASK;
// write back to SPI control register
SPIx->SPCR = tmp;
// Set clock rate for SPI peripheral
SPI_SetClock(SPIx, SPI_ConfigStruct->ClockRate);
// If interrupt flag is set, Write '1' to Clear interrupt flag
if (SPIx->SPINT & SPI_SPINT_INTFLAG)
{
SPIx->SPINT = SPI_SPINT_INTFLAG;
}
}
/**
* @brief Initial for ADC
* - Set bit PCADC
* - Set clock for ADC
* - Set Clock Frequency
*
* @param[in] ADCx pointer to ADC_TypeDef
* @param[in] ConvFreq Clock frequency
* @return None
*/
void ADC_Init(ADC_TypeDef *ADCx, uint32_t ConvFreq)
{
uint32_t temp, tmp;
CHECK_PARAM(PARAM_ADCx(ADCx));
CHECK_PARAM(PARAM_ADC_FREQUENCY(ConvFreq));
// Turn on power and clock
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, ENABLE);
// Set clock divider for ADC to 4 from CCLK as default
// CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_ADC,CLKPWR_PCLKSEL_CCLK_DIV_4);
ADCx->ADCR = 0;
//Enable PDN bit
tmp = ADC_CR_PDN;
// Set clock frequency
temp = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_ADC) ;
temp = (temp /ConvFreq) - 1;
tmp |= ADC_CR_CLKDIV(temp);
ADCx->ADCR = tmp;
}
/********************************************************************//**
* @brief Initializes the UARTx peripheral according to the specified
* parameters in the UART_ConfigStruct.
* @param[in] UARTx UART peripheral selected, should be:
* - LPC_UART0: UART0 peripheral
* - LPC_UART1: UART1 peripheral
* - LPC_UART2: UART2 peripheral
* - LPC_UART3: UART3 peripheral
* @param[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure
* that contains the configuration information for the
* specified UART peripheral.
* @return None
*********************************************************************/
void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
{
uint32_t tmp;
// For debug mode
CHECK_PARAM(PARAM_UARTx(UARTx));
CHECK_PARAM(PARAM_UART_DATABIT(UART_ConfigStruct->Databits));
CHECK_PARAM(PARAM_UART_STOPBIT(UART_ConfigStruct->Stopbits));
CHECK_PARAM(PARAM_UART_PARITY(UART_ConfigStruct->Parity));
#ifdef _UART0
if(UARTx == LPC_UART0)
{
/* Set up clock and power for UART module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE);
}
#endif
#ifdef _UART1
if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
{
/* Set up clock and power for UART module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE);
}
#endif
#ifdef _UART2
if(UARTx == LPC_UART2)
{
/* Set up clock and power for UART module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE);
}
#endif
#ifdef _UART3
if(UARTx == LPC_UART3)
{
/* Set up clock and power for UART module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE);
}
#endif
if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
{
/* FIFOs are empty */
((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN \
| UART_FCR_RX_RS | UART_FCR_TX_RS);
// Disable FIFO
((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = 0;
// Dummy reading
while (((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_RDR)
{
tmp = ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/RBR;
}
((LPC_UART1_TypeDef *)UARTx)->TER = UART_TER_TXEN;
// Wait for current transmit complete
while (!(((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_THRE));
// Disable Tx
((LPC_UART1_TypeDef *)UARTx)->TER = 0;
// Disable interrupt
((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER = 0;
// Set LCR to default state
((LPC_UART1_TypeDef *)UARTx)->LCR = 0;
// Set ACR to default state
((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
// Set Modem Control to default state
((LPC_UART1_TypeDef *)UARTx)->MCR = 0;
// Set RS485 control to default state
((LPC_UART1_TypeDef *)UARTx)->RS485CTRL = 0;
// Set RS485 delay timer to default state
((LPC_UART1_TypeDef *)UARTx)->RS485DLY = 0;
// Set RS485 addr match to default state
((LPC_UART1_TypeDef *)UARTx)->ADRMATCH = 0;
//Dummy Reading to Clear Status
tmp = ((LPC_UART1_TypeDef *)UARTx)->MSR;
tmp = ((LPC_UART1_TypeDef *)UARTx)->LSR;
}
else
{
/* FIFOs are empty */
UARTx->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
// Disable FIFO
UARTx->/*IIFCR.*/FCR = 0;
// Dummy reading
while (UARTx->LSR & UART_LSR_RDR)
{
tmp = UARTx->/*RBTHDLR.*/RBR;
}
UARTx->TER = UART_TER_TXEN;
// Wait for current transmit complete
while (!(UARTx->LSR & UART_LSR_THRE));
// Disable Tx
UARTx->TER = 0;
// Disable interrupt
UARTx->/*DLIER.*/IER = 0;
// Set LCR to default state
UARTx->LCR = 0;
// Set ACR to default state
UARTx->ACR = 0;
// Dummy reading
tmp = UARTx->LSR;
}
if (UARTx == LPC_UART3)
{
// Set IrDA to default state
UARTx->ICR = 0;
}
// Set Line Control register ----------------------------
uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate));
if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
{
tmp = (((LPC_UART1_TypeDef *)UARTx)->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \
& UART_LCR_BITMASK;
}
else
{
tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
}
switch (UART_ConfigStruct->Databits){
case UART_DATABIT_5:
tmp |= UART_LCR_WLEN5;
break;
case UART_DATABIT_6:
tmp |= UART_LCR_WLEN6;
break;
case UART_DATABIT_7:
tmp |= UART_LCR_WLEN7;
break;
case UART_DATABIT_8:
default:
tmp |= UART_LCR_WLEN8;
break;
}
if (UART_ConfigStruct->Parity == UART_PARITY_NONE)
{
// Do nothing...
}
else
{
tmp |= UART_LCR_PARITY_EN;
switch (UART_ConfigStruct->Parity)
{
case UART_PARITY_ODD:
tmp |= UART_LCR_PARITY_ODD;
break;
case UART_PARITY_EVEN:
tmp |= UART_LCR_PARITY_EVEN;
break;
case UART_PARITY_SP_1:
tmp |= UART_LCR_PARITY_F_1;
break;
case UART_PARITY_SP_0:
tmp |= UART_LCR_PARITY_F_0;
break;
default:
break;
}
}
switch (UART_ConfigStruct->Stopbits){
case UART_STOPBIT_2:
tmp |= UART_LCR_STOPBIT_SEL;
break;
case UART_STOPBIT_1:
default:
// Do no thing
break;
}
// Write back to LCR, configure FIFO and Disable Tx
if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
{
((LPC_UART1_TypeDef *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
}
else
{
UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
}
}
/*********************************************************************//**
* @brief De-initializes the RTC peripheral registers to their
* default reset values.
* @param[in] RTCx RTC peripheral selected, should be LPC_RTC
* @return None
**********************************************************************/
void RTC_DeInit(LPC_RTC_TypeDef *RTCx)
{
RTCx->CCR = 0x00;
// Disable power and clock for RTC module
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRTC, DISABLE);
}
/*********************************************************************//**
* @brief Initial Timer/Counter device
* Set Clock frequency for Timer
* Set initial configuration for Timer
* @param[in] TIMx Timer selection, should be:
* - LPC_TIM0: TIMER0 peripheral
* - LPC_TIM1: TIMER1 peripheral
* - LPC_TIM2: TIMER2 peripheral
* - LPC_TIM3: TIMER3 peripheral
* @param[in] TimerCounterMode Timer counter mode, should be:
* - TIM_TIMER_MODE: Timer mode
* - TIM_COUNTER_RISING_MODE: Counter rising mode
* - TIM_COUNTER_FALLING_MODE: Counter falling mode
* - TIM_COUNTER_ANY_MODE:Counter on both edges
* @param[in] TIM_ConfigStruct pointer to TIM_TIMERCFG_Type
* that contains the configuration information for the
* specified Timer peripheral.
* @return None
**********************************************************************/
void TIM_Init(LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
{
TIM_TIMERCFG_Type *pTimeCfg;
TIM_COUNTERCFG_Type *pCounterCfg;
CHECK_PARAM(PARAM_TIMx(TIMx));
CHECK_PARAM(PARAM_TIM_MODE_OPT(TimerCounterMode));
//set power
if (TIMx== LPC_TIM0)
{
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM0, ENABLE);
CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER0, CLKPWR_PCLKSEL_CCLK_DIV_4);
}
else if (TIMx== LPC_TIM1)
{
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM1, ENABLE);
CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER1, CLKPWR_PCLKSEL_CCLK_DIV_4);
}
else if (TIMx== LPC_TIM2)
{
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, ENABLE);
CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER2, CLKPWR_PCLKSEL_CCLK_DIV_4);
}
else if (TIMx== LPC_TIM3)
{
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM3, ENABLE);
CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER3, CLKPWR_PCLKSEL_CCLK_DIV_4);
}
TIMx->CTCR &= ~TIM_CTCR_MODE_MASK;
TIMx->CTCR |= TimerCounterMode;
TIMx->TC =0;
TIMx->PC =0;
TIMx->PR =0;
TIMx->TCR |= (1<<1); //Reset Counter
TIMx->TCR &= ~(1<<1); //release reset
if (TimerCounterMode == TIM_TIMER_MODE )
{
pTimeCfg = (TIM_TIMERCFG_Type *)TIM_ConfigStruct;
if (pTimeCfg->PrescaleOption == TIM_PRESCALE_TICKVAL)
{
TIMx->PR = pTimeCfg->PrescaleValue -1 ;
}
else
{
TIMx->PR = converUSecToVal (converPtrToTimeNum(TIMx),pTimeCfg->PrescaleValue)-1;
}
}
else
{
pCounterCfg = (TIM_COUNTERCFG_Type *)TIM_ConfigStruct;
TIMx->CTCR &= ~TIM_CTCR_INPUT_MASK;
if (pCounterCfg->CountInputSelect == TIM_COUNTER_INCAP1)
TIMx->CCR |= _BIT(2);
}
// Clear interrupt pending
TIMx->IR = 0xFFFFFFFF;
}
