void spc_config(MTK_SPC_CONFIG* pCfg)
{
unsigned int regval;
SPCMSG("spc config prot=(%d,%d,%d,%d), start=0x%x, end=0x%x\n",
pCfg->domain_0_prot,pCfg->domain_1_prot,
pCfg->domain_2_prot,pCfg->domain_3_prot,
pCfg->start,pCfg->end);
//config monitor range 1:
regval = F_SYSRAM_RANG_ADDR_SET(pCfg->start);
COM_WriteReg32(REG_SMI_ISPSYS_SRAM_RANG(0), regval);
regval = F_SYSRAM_RANG_ADDR_SET(pCfg->end);
COM_WriteReg32(REG_SMI_ISPSYS_SRAM_RANG(1), regval);
//config access type monitor of domains
//0-no protect; 1-sec rw; 2-sec_rw nonsec_r; 3-no access
regval = (pCfg->domain_0_prot<<(0*2))|
(pCfg->domain_1_prot<<(1*2))|
(pCfg->domain_2_prot<<(2*2))|
(pCfg->domain_3_prot<<(3*2));
// we use only region 1 for simple protection
COM_WriteReg32(REG_SMI_ISPSYS_SRNG_ACTL(1), regval);
}
unsigned int spc_status_check()
{
unsigned int regval;
int j;
int vio = 0;
unsigned int vread, vwrite, vdomain, vport, vaddr;
for(j=0; j<4; j++)
{
regval = COM_ReadReg32(REG_ISPSYS_D_VIO_STA(j));
if(regval !=0)
{
SPCMSG("domain %d violation: reg=0x%x\n", j, regval);
vio = 1;
}
}
//check debug info-- write violation; domain=0; port=?; addr=?;
regval = COM_ReadReg32(REG_ISPSYS_VIO_DBG0);
vread = F_SYSRAM_VIO_DBG0_RD(regval);
vwrite = F_SYSRAM_VIO_DBG0_WR(regval);
vdomain = F_SYSRAM_VIO_DBG0_DOMAIN(regval);
vport = F_SYSRAM_VIO_DBG0_PORT(regval);
vaddr = COM_ReadReg32(REG_ISPSYS_VIO_DBG1);
if(vio)
{
spc_aee_print("violation: port=%d,rd=%d,wt=%d,domain=%d,addr=0x%x\n",
vport, vread, vwrite, vdomain, vaddr);
}
SPCMSG("vio debug0=0x%x, debug1=0x%x\n", regval, vaddr);
//reset
for(j=0; j<4; j++)
{
regval = COM_ReadReg32(REG_ISPSYS_D_VIO_STA(j));
COM_WriteReg32(REG_ISPSYS_D_VIO_STA(j), regval);
}
COM_WriteReg32(REG_ISPSYS_VIO_DBG0, F_SYSRAM_VIO_DBG0_CLR);
return 0;
}
/*****************************************************************************
* FUNCTION
* larb_reg_restore
* DESCRIPTION
* Restore register for system resume.
* PARAMETERS
* param1 : [IN] const int larb
* larb index.
* RETURNS
* None.
****************************************************************************/
static void larb_reg_restore(const int larb)
{
unsigned int* pReg = pLarbRegBackUp[larb];
int i;
unsigned int regval;
unsigned int larb_base = gLarbBaseAddr[larb];
//SMI registers
for(i=0; i<2; i++)
COM_WriteReg32(REG_SMI_SECUR_CON(i), *(pReg++) );
//warning: larb_con is controlled by set/clr
regval = *(pReg++);
M4U_WriteReg32(larb_base, SMI_LARB_CON_CLR, ~(regval));
M4U_WriteReg32(larb_base, SMI_LARB_CON_SET, (regval));
for(i=0; i<MAU_ENTRY_NR; i++)
{
M4U_WriteReg32(larb_base, SMI_MAU_ENTR_START(i), *(pReg++));
M4U_WriteReg32(larb_base, SMI_MAU_ENTR_END(i), *(pReg++));
M4U_WriteReg32(larb_base, SMI_MAU_ENTR_GID(i), *(pReg++));
}
}
static void process_dbg_opt(const char *opt)
{
//m4u log
if (0 == strncmp(opt, "m4u_log:", 8))
{
if (0 == strncmp(opt + 8, "on", 2))
m4u_log_on();
else if (0 == strncmp(opt + 8, "off", 3))
m4u_log_off();
else
goto Error;
}
//m4u debug
if (0 == strncmp(opt, "m4u_debug:", 10))
{
unsigned int command;
char *p = (char *)opt + 10;
command = (unsigned int) simple_strtoul(p, &p, 10);
SMIMSG("m4u_debug_command, command=%d ", command);
m4u_debug_command(command);
}
//mau dump
if (0 == strncmp(opt, "mau_stat:", 9))
{
char *p = (char *)opt + 9;
unsigned int larb=(unsigned int)simple_strtoul(p, &p, 16);
if(larb>SMI_LARB_NR)
SMIERR("debug error: larb=%d\n", larb);
mau_dump_status(larb);
}
if (0 == strncmp(opt, "mau_config:", 11 ))
{
MTK_MAU_CONFIG MauConf;
unsigned int larb,entry, rd, wt, vir, start, end, port_msk;
char *p = (char *)opt + 11;
larb = (unsigned int) simple_strtoul(p, &p, 16);
p++;
entry = (unsigned int) simple_strtoul(p, &p, 16);
p++;
rd = (unsigned int) simple_strtoul(p, &p, 16);
p++;
wt = (unsigned int) simple_strtoul(p, &p, 16);
p++;
vir = (unsigned int) simple_strtoul(p, &p, 16);
p++;
start = (unsigned int) simple_strtoul(p, &p, 16);
p++;
end = (unsigned int) simple_strtoul(p, &p, 16);
p++;
port_msk = (unsigned int) simple_strtoul(p, &p, 16);
SMIMSG("larb=%d,entry=%d,rd=%d wt=%d vir=%d \n"
"start=0x%x end=0x%x msk=0x%x \n",
larb, entry, rd, wt, vir, start, end, port_msk);
MauConf.larb = larb;
MauConf.entry = entry;
MauConf.monitor_read = rd;
MauConf.monitor_write = wt;
MauConf.virt = vir;
MauConf.start = start;
MauConf.end = end;
MauConf.port_msk = port_msk;
mau_config(&MauConf);
}
if (0 == strncmp(opt, "spc_config:", 11 ))
{
MTK_SPC_CONFIG pCfg;
char *p = (char *)opt + 11;
SMIMSG("%s", p);
//0-no protect; 1-sec rw; 2-sec_rw nonsec_r; 3-no access
pCfg.domain_0_prot = (unsigned int) simple_strtoul(p, &p, 16);
SMIMSG("%d,%s", pCfg.domain_0_prot, p);
p++;
pCfg.domain_1_prot = (unsigned int) simple_strtoul(p, &p, 16);
p++;
SMIMSG("%d", pCfg.domain_1_prot);
pCfg.domain_2_prot = (unsigned int) simple_strtoul(p, &p, 16);
p++;
SMIMSG("%d", pCfg.domain_2_prot);
pCfg.domain_3_prot = (unsigned int) simple_strtoul(p, &p, 16);
p++;
SMIMSG("%d", pCfg.domain_3_prot);
pCfg.start = (unsigned int) simple_strtoul(p, &p, 16);
p++;
SMIMSG("%d", pCfg.domain_0_prot);
pCfg.end = (unsigned int) simple_strtoul(p, &p, 16);
SMIMSG("prot=(%d,%d,%d,%d), start=0x%x, end=0x%x\n",
pCfg.domain_0_prot,pCfg.domain_1_prot,
pCfg.domain_2_prot,pCfg.domain_3_prot,
pCfg.start,pCfg.end);
spc_config(&pCfg);
}
if (0 == strncmp(opt, "spc_status", 10 ))
{
spc_status_check();
}
if (0 == strncmp(opt, "spc_dump_reg", 12 ))
{
spc_dump_reg();
}
if (0 == strncmp(opt, "touch_sysram", 10 ))
{
volatile unsigned int *va;
unsigned int i;
//va = ioremap_nocache(0x1200C000, 1024*80);
va=(volatile unsigned int *)0xf2000000;
for(i=0; i<1024*80/4; i++)
{
va[i] = i;
}
SMIMSG("cpu read sysram: 0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x",
va[0],va[1],va[2],va[3],va[100],va[222],va[444]);
}
if (0 == strncmp(opt, "set_reg:", 8 ))
{
unsigned int addr, val;
char *p = (char *)opt + 8;
addr = (unsigned int) simple_strtoul(p, &p, 16);
p++;
val = (unsigned int) simple_strtoul(p, &p, 16);
SMIMSG("set register: 0x%x = 0x%x\n", addr, val);
COM_WriteReg32(addr, val);
}
if (0 == strncmp(opt, "get_reg:", 8 ))
{
unsigned int addr;
char *p = (char *)opt + 8;
addr = (unsigned int) simple_strtoul(p, &p, 16);
SMIMSG("get register: 0x%x = 0x%x \n", addr, COM_ReadReg32(addr));
}
return;
Error:
SMIERR("parse command error!\n");
SMIMSG("%s", STR_HELP);
}
