//------------------------------------------------------------------------------
/// Check Instruction cache
/// \return 0 if I_cache disable, 1 if I_cache enable
//------------------------------------------------------------------------------
unsigned int CP15_IsIcacheEnabled(void)
{
unsigned int control;
control = CP15_ReadControl();
return ((control & (1 << CP15_I_BIT)) != 0);
}
//------------------------------------------------------------------------------
/// Check D_cache
/// \return 0 if D_cache disable, 1 if D_cache enable (with MMU of course)
//------------------------------------------------------------------------------
U32 CP15_IsDcacheEnabled(void)
{
U32 control;
control = CP15_ReadControl();
return ((control & ((1 << CP15_C_BIT)||(1 << CP15_M_BIT))) != 0);
}
//------------------------------------------------------------------------------
/// Check D_cache
/// \return 0 if D_cache disable, 1 if D_cache enable (with MMU of course)
//------------------------------------------------------------------------------
unsigned int CP15_IsDcacheEnabled(void)
{
unsigned int control;
control = CP15_ReadControl();
return ((control & ((1 << CP15_C_BIT)||(1 << CP15_M_BIT))) != 0);
}
//------------------------------------------------------------------------------
/// Check MMU
/// return 0 if MMU disable, 1 if MMU enable
//------------------------------------------------------------------------------
U32 CP15_IsMMUEnabled(void)
{
U32 control;
control = CP15_ReadControl();
return ((control & (1 << CP15_M_BIT)) != 0);
}
//------------------------------------------------------------------------------
/// Disable Instruction cache
//------------------------------------------------------------------------------
void CP15_DisableIcache(void)
{
U32 control;
control = CP15_ReadControl();
// Check if cache is enabled
if ((control & (1 << CP15_I_BIT)) != 0) {
control &= ~(1 << CP15_I_BIT);
CP15_WriteControl(control);
DEBUG_MSG("I cache disabled.");
}
else {
DEBUG_MSG("I cache is already disabled.");
}
}
//------------------------------------------------------------------------------
/// Enable MMU
//------------------------------------------------------------------------------
void CP15_EnableMMU(void)
{
U32 control;
control = CP15_ReadControl();
// Check if MMU is disabled
if ((control & (1 << CP15_M_BIT)) == 0) {
control |= (1 << CP15_M_BIT);
CP15_WriteControl(control);
DEBUG_MSG("MMU enabled.");
}
else {
DEBUG_MSG("MMU is already enabled.");
}
}
//------------------------------------------------------------------------------
/// Disable Data cache
//------------------------------------------------------------------------------
void CP15_DisableDcache(void)
{
unsigned int control;
control = CP15_ReadControl();
// Check if cache is enabled
if ((control & (1 << CP15_C_BIT)) != 0) {
control &= ~(1ul << CP15_C_BIT);
CP15_WriteControl(control);
TRACE_INFO("D cache disabled.\n\r");
}
else {
TRACE_INFO("D cache is already disabled.\n\r");
}
}
//------------------------------------------------------------------------------
/// Enable MMU
//------------------------------------------------------------------------------
void CP15_EnableMMU(void)
{
unsigned int control;
control = CP15_ReadControl();
// Check if MMU is disabled
if ((control & (1 << CP15_M_BIT)) == 0) {
control |= (1 << CP15_M_BIT);
CP15_WriteControl(control);
TRACE_INFO("MMU enabled.\n\r");
}
else {
TRACE_INFO("MMU is already enabled.\n\r");
}
}
//------------------------------------------------------------------------------
/// Enable Instruction cache
//------------------------------------------------------------------------------
void CP15_EnableIcache(void)
{
U32 control;
control = CP15_ReadControl();
// Check if cache is disabled
if ((control & (1 << CP15_I_BIT)) == 0) {
control |= (1 << CP15_I_BIT);
CP15_WriteControl(control);
DEBUG_MSG("I cache enabled.");
}
#if !defined(OP_BOOTSTRAP_on)
else {
DEBUG_MSG("I cache is already enabled.");
}
#endif
}
//------------------------------------------------------------------------------
/// Disable MMU
//------------------------------------------------------------------------------
void CP15_DisableMMU(void)
{
U32 control;
control = CP15_ReadControl();
// Check if MMU is enabled
if ((control & (1 << CP15_M_BIT)) != 0) {
control &= ~(1 << CP15_M_BIT);
control &= ~(1 << CP15_C_BIT);
CP15_WriteControl(control);
DEBUG_MSG("MMU disabled.");
}
else {
DEBUG_MSG("MMU is already disabled.");
}
}
//------------------------------------------------------------------------------
/// Disable MMU
//------------------------------------------------------------------------------
void CP15_DisableMMU(void)
{
unsigned int control;
control = CP15_ReadControl();
// Check if MMU is enabled
if ((control & (1 << CP15_M_BIT)) != 0) {
control &= (unsigned int)(~(1 << CP15_M_BIT));
control &= (unsigned int)(~(1 << CP15_C_BIT));
CP15_WriteControl(control);
TRACE_INFO("MMU disabled.\n\r");
}
else {
TRACE_INFO("MMU is already disabled.\n\r");
}
}
//------------------------------------------------------------------------------
/// Enable Instruction cache
//------------------------------------------------------------------------------
void CP15_EnableIcache(void)
{
unsigned int control;
control = CP15_ReadControl();
// Check if cache is disabled
if ((control & (1 << CP15_I_BIT)) == 0) {
control |= (1 << CP15_I_BIT);
CP15_WriteControl(control);
TRACE_INFO("I cache enabled.\n\r");
}
#if !defined(OP_BOOTSTRAP_on)
else {
TRACE_INFO("I cache is already enabled.\n\r");
}
#endif
}
//------------------------------------------------------------------------------
/// Enable Data cache
//------------------------------------------------------------------------------
void CP15_EnableDcache(void)
{
U32 control;
control = CP15_ReadControl();
if( !CP15_IsMMUEnabled() ) {
DEBUG_MSG("Do nothing: MMU not enabled");
}
else {
// Check if cache is disabled
if ((control & (1 << CP15_C_BIT)) == 0) {
control |= (1 << CP15_C_BIT);
CP15_WriteControl(control);
DEBUG_MSG("D cache enabled.");
}
else {
DEBUG_MSG("D cache is already enabled.");
}
}
}
//------------------------------------------------------------------------------
/// Enable Data cache
//------------------------------------------------------------------------------
void CP15_EnableDcache(void)
{
unsigned int control;
control = CP15_ReadControl();
if( !CP15_IsMMUEnabled() ) {
TRACE_ERROR("Do nothing: MMU not enabled\n\r");
}
else {
// Check if cache is disabled
if ((control & (1 << CP15_C_BIT)) == 0) {
control |= (1 << CP15_C_BIT);
CP15_WriteControl(control);
TRACE_INFO("D cache enabled.\n\r");
}
else {
TRACE_INFO("D cache is already enabled.\n\r");
}
}
}
