void Chip_USB_Init(void)
{
/* Set USB PLL input to main oscillator */
Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC);
/* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz
MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
Chip_Clock_SetupUSBPLL(3, 1);
/* Powerup USB PLL */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD);
/* Wait for PLL to lock */
while (!Chip_Clock_IsUSBPLLLocked()) {}
/* enable USB main clock */
Chip_Clock_SetUSBClockSource(SYSCTL_USBCLKSRC_PLLOUT, 1);
/* Enable AHB clock to the USB block. */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB);
/* power UP USB Phy */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPHY_PD);
/* Reset USB block */
Chip_SYSCTL_PeriphReset(RESET_USB);
}
void platform_early_init(void)
{
/* set up clocking for a board with an external oscillator */
Chip_SetupXtalClocking();
/* Set USB PLL input to main oscillator */
Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC);
/* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz
MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
Chip_Clock_SetupUSBPLL(3, 1);
/* Powerup USB PLL */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD);
/* Wait for PLL to lock */
while (!Chip_Clock_IsUSBPLLLocked()) {}
/* Set default system tick divder to 1 */
Chip_Clock_SetSysTickClockDiv(1);
/* start the generic systick driver */
arm_cm_systick_init(Chip_Clock_GetMainClockRate());
lpc_debug_early_init();
}
/* Setup system clocking */
STATIC void SystemSetupClocking(void)
{
volatile int i;
/* Powerup main oscillator */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSOSC_PD);
/* Wait 200us for OSC to be stablized, no status
indication, dummy wait. */
for (i = 0; i < 0x100; i++) {}
/* Set system PLL input to main oscillator */
Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_MAINOSC);
/* Power down PLL to change the PLL divider ratio */
Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD);
/* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 4 = 48MHz
MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
Chip_Clock_SetupSystemPLL(3, 1);
/* Powerup system PLL */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD);
/* Wait for PLL to lock */
while (!Chip_Clock_IsSystemPLLLocked()) {}
/* Set system clock divider to 1 */
Chip_Clock_SetSysClockDiv(1);
/* Setup FLASH access to 3 clocks */
Chip_FMC_SetFLASHAccess(FLASHTIM_50MHZ_CPU);
/* Set main clock source to the system PLL. This will drive 48MHz
for the main clock and 48MHz for the system clock */
Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT);
/* Set USB PLL input to main oscillator */
Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC);
/* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz
MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
Chip_Clock_SetupUSBPLL(3, 1);
/* Powerup USB PLL */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD);
/* Wait for PLL to lock */
while (!Chip_Clock_IsUSBPLLLocked()) {}
}
/* Sets up USB PLL, all needed clocks and enables USB PHY on the chip. USB pins which are
muxed to different pads are not initialized here. This routine assumes that the XTAL
OSC is enabled and running prior to this call. */
void Chip_USB_Init(void)
{
#if defined(CHIP_LPC175X_6X)
/* Setup USB PLL1 for a 48MHz clock
Input clock rate (FIN) is main oscillator = 12MHz
PLL1 Output = USBCLK = 48MHz = FIN * MSEL, so MSEL = 4.
FCCO = USBCLK = USBCLK * 2 * P. It must be between 156 MHz to 320 MHz.
so P = 2 and FCCO = 48MHz * 2 * 2 = 192MHz */
Chip_Clock_SetupPLL(SYSCTL_USB_PLL, 3, 1); /* Multiply by 4, Divide by 2 */
/* Use PLL1 output as USB Clock Source */
/* Enable PLL1 */
Chip_Clock_EnablePLL(SYSCTL_USB_PLL, SYSCTL_PLL_ENABLE);
/* Wait for PLL1 to lock */
while (!Chip_Clock_IsUSBPLLLocked()) {}
/* Connect PLL1 */
Chip_Clock_EnablePLL(SYSCTL_USB_PLL, SYSCTL_PLL_ENABLE | SYSCTL_PLL_CONNECT);
/* Wait for PLL1 to be connected */
while (!Chip_Clock_IsUSBPLLConnected()) {}
#else
/* Select XTAL as clock source for USB block and divider as 1 */
LPC_SYSCTL->USBCLKSEL = 0x1;
/* Setup USB PLL1 for a 48MHz clock
Input clock rate (FIN) is main oscillator = 12MHz
PLL output = 48MHz = FIN * MSEL, so MSEL = 4
FCCO must be between 156 MHz to 320 MHz, where FCCO = PLL output * 2 * P,
so P = 2 and FCCO = 48MHz * 2 * 2 = 192MHz */
Chip_Clock_SetupPLL(SYSCTL_USB_PLL, 3, 1);
/* Wait for USB PLL to lock */
while ((Chip_Clock_GetPLLStatus(SYSCTL_USB_PLL) & SYSCTL_PLLSTS_LOCKED) == 0) {}
/* Select PLL1/USBPLL as clock source for USB block and divider as 1 */
LPC_SYSCTL->USBCLKSEL = (SYSCTL_USBCLKSRC_USBPLL << 8) | 0x01;
#endif /* defined(CHIP_LPC175X_6X) */
/* Enable AHB clock to the USB block and USB RAM. */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB);
}
