/* Initialize the SSP */
void Chip_SSP_Init(LPC_SSP_T *pSSP)
{
Chip_Clock_Enable(Chip_SSP_GetClockIndex(pSSP));
Chip_SSP_Set_Mode(pSSP, SSP_MODE_MASTER);
Chip_SSP_SetFormat(pSSP, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA0_CPOL0);
Chip_SSP_SetBitRate(pSSP, 100000);
}
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
void SPI_Init()
{
/* SSP initialization */
Init_SSP_PinMux();
Chip_SSP_Init(LPC_SSP0);
Chip_SSP_SetFormat(LPC_SSP0, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_MODE0);
Chip_SSP_SetMaster(LPC_SSP0, true);
Chip_SSP_SetBitRate(LPC_SSP0, 10000000); // 10MHz
Chip_SSP_Enable(LPC_SSP0);
}
/**
* Methods
*/
void nRF24L01PInit(unsigned char transmitMode) {
Chip_GPIO_SetPinOutHigh(LPC_GPIO, CSN_PORT, CSN_PIN);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, CSN_PORT, CSN_PIN);
Chip_GPIO_SetPinOutLow(LPC_GPIO, NORDIC_CE_PORT, NORDIC_CE_PIN);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, NORDIC_CE_PORT, NORDIC_CE_PIN);
Chip_GPIO_SetPinDIRInput(LPC_GPIO, NORDIC_IRQ_PORT, NORDIC_IRQ_PIN);
nRF24L01P.mode = NRF24L01P_MODE_UNKNOWN;
nRF24L01P.transmissionTimeout = -1;
nRF24L01P.payloadsinTXFIFO = 0;
RFdisable();
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SSP1);
Chip_SSP_Set_Mode(LPC_SSP1, SSP_MODE_MASTER);
Chip_SSP_SetFormat(LPC_SSP1, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA0_CPOL0); // 8-bit, ClockPhase = 0, ClockPolarity = 0
Chip_SSP_SetBitRate(LPC_SSP1, NRF24L01P_SPI_MAX_DATA_RATE / 2); // 2Mbit, 1/5th the maximum transfer rate for the SPI bus
Chip_SSP_Enable(LPC_SSP1);
RingBuffer_Init(&nordicTxBuffer, nordictxBufferArray, 1, TX_BUFFER_SIZE);
memset(&spi, 0, sizeof(spi));
spi.tx_data = spiBufferTx;
spi.rx_data = spiBufferRx;
timerDelayUs(NRF24L01P_TIMING_Tundef2pd_us); // Wait for Power-on reset
RFsetRegister(NRF24L01P_REG_CONFIG, 0); // Power Down
RFsetRegister(NRF24L01P_REG_STATUS, NRF24L01P_STATUS_MAX_RT | NRF24L01P_STATUS_TX_DS | NRF24L01P_STATUS_RX_DR); // Clear any pending interrupts
RFsetRegister(NRF24L01P_REG_FEATURE, NRF24L01P_EN_DYN_ACK | NRF24L01P_EN_ACK_PAY | NRF24L01P_EN_DPL); //Enabled no ack packages
RFsetRegister(NRF24L01P_REG_DYNPD, NRF24L01P_DPL_P0);
RFsetRegister(NRF24L01P_REG_RF_SETUP, 0); // Clear this register
//
// Setup default configuration
//
RFdisableAllRxPipes();
RFsetFrequency(DEFAULTNRF24L01P_RF_FREQUENCY);
RFsetAirDataRate(DEFAULTNRF24L01P_DATARATE);
RFsetRfOutputPower(DEFAULTNRF24L01P_TX_PWR);
RFsetCrcWidth(DEFAULTNRF24L01P_CRC);
RFsetTxAddress(DEFAULTNRF24L01P_ADDRESS, DEFAULTNRF24L01P_ADDRESS_WIDTH);
RFsetRxAddress(DEFAULTNRF24L01P_ADDRESS, DEFAULTNRF24L01P_ADDRESS_WIDTH, NRF24L01P_PIPE_P0);
RFenableAutoRetransmit(250, 3);
RFdisableAutoAcknowledge();
RFenableAutoAcknowledge(NRF24L01P_PIPE_P0);
RFsetTransferSize(DEFAULTNRF24L01P_TRANSFER_SIZE, NRF24L01P_PIPE_P0);
nRF24L01P.mode = NRF24L01P_MODE_POWER_DOWN;
if (transmitMode) {
RFsetTransmitMode();
} else {
RFsetReceiveMode();
}
RFenable();
}
void App_SSP_Init (void)
{
//Setup pin muxing for SPI pins.
//Note: CS pins are not set up here
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 10, (IOCON_FUNC2 | IOCON_MODE_PULLUP)); /* SCK0 */
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 8, (IOCON_FUNC1 | IOCON_MODE_PULLUP)); /* MISO0 */
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 9, (IOCON_FUNC1 | IOCON_MODE_PULLUP)); /* MOSI0 */
Chip_SSP_Init(LPC_SSP0);
Chip_SSP_SetFormat(LPC_SSP0, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA1_CPOL1);
Chip_SSP_SetMaster(LPC_SSP0, 1); //Set to master mode
Chip_SSP_SetBitRate(LPC_SSP0, 8000000); //Set SSP0 frequency to 8MHz
Chip_SSP_Enable(LPC_SSP0);
return;
}
void InitSPI ()
{
Chip_IOCON_PinMux(LPC_IOCON,TOUCH_E,IOCON_MODE_PULLUP,IOCON_FUNC0);
Chip_GPIO_SetPinDIROutput(LPC_GPIO,TOUCH_E);
Chip_IOCON_DisableOD(LPC_IOCON,TOUCH_E);
Chip_GPIO_SetPinOutHigh(LPC_GPIO,TOUCH_E);
Chip_IOCON_PinMux(LPC_IOCON,TOUCH_CLK,IOCON_MODE_INACT,IOCON_FUNC2);
Chip_IOCON_PinMux(LPC_IOCON,TOUCH_MOSI,IOCON_MODE_INACT,IOCON_FUNC2);
Chip_IOCON_PinMux(LPC_IOCON,TOUCH_MISO,IOCON_MODE_INACT,IOCON_FUNC2);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SSP0);
Chip_SSP_Set_Mode(LPC_SSP0,SSP_MASTER_MODE);
Chip_SSP_SetFormat(LPC_SSP0,SSP_BITS_8,SSP_FRAMEFORMAT_SPI,SSP_CLOCK_CPHA0_CPOL0);
Chip_SSP_SetBitRate(LPC_SSP0,1000000 );
Chip_SSP_Enable(LPC_SSP0);
}
/******************************************************************************
*
* Description:
* Initialize the touch controller
*
*****************************************************************************/
void touch_init (void)
{
uint8_t data[3];
//SSP_CFG_Type SSP_ConfigStruct;
//SSP_DATA_SETUP_Type sspCfg;
pinConfig();
CS_OFF;
// initialize SSP configuration structure to default
//SSP_ConfigStructInit(&SSP_ConfigStruct);
// set clock rate
// SSP_ConfigStruct.ClockRate = SSP_CLOCK;
// SSP_ConfigStruct.CPHA = SSP_CPHA_SECOND;
// SSP_ConfigStruct.CPOL = SSP_CPOL_LO;
//
// // Initialize SSP peripheral with parameter given in structure above
// SSP_Init(SSP_PORT, &SSP_ConfigStruct);
//
// // Enable SSP peripheral
// SSP_Cmd(SSP_PORT, ENABLE);
// initialize SSP
Chip_SSP_Init(SSP_ID);
Chip_SSP_SetMaster(SSP_ID, true);
Chip_SSP_SetBitRate(SSP_ID, SSP_CLOCK);
Chip_SSP_SetFormat(SSP_ID, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_MODE3);
Chip_SSP_Enable(SSP_ID);
data[0] = REF_ON;
data[1] = (READ_12BIT_SER(ADS_A2A1A0_vaux) | ADS_PD10_ALL_ON);
data[2] = PWRDOWN;
CS_ON;
//sspCfg.tx_data = data;
//sspCfg.rx_data = NULL;
//sspCfg.length = 3;
//SSP_ReadWrite (SSP_PORT, &sspCfg, SSP_TRANSFER_POLLING);
Chip_SSP_WriteFrames_Blocking(SSP_ID, data, 3);
CS_OFF;
}
/* Initialize Pin Muxing for LCD */
void Board_LCD_Init(void)
{
uint32_t val;
Board_SSP_Init(LCD_SSP);
val = LCD_SSP->CR0 & 0xFFFF;
Chip_SCU_PinMuxSet(LCD_CDM_PORT, LCD_CMD_PIN, LCD_CMD_CFG);
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, LCD_CMD_GPIO_PORT, LCD_CMD_GPIO_PIN);
Chip_GPIO_SetPinOutHigh(LPC_GPIO_PORT, LCD_CMD_GPIO_PORT, LCD_CMD_GPIO_PIN);
/* Enable the SSP interface */
Chip_SSP_Init(LCD_SSP);
Chip_SSP_Set_Mode(LCD_SSP, SSP_MODE_MASTER);
Chip_SSP_SetFormat(LCD_SSP, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA1_CPOL1);
Chip_SSP_SetBitRate(LCD_SSP, LCD_BIT_RATE);
Chip_SSP_Enable(LCD_SSP);
lcd_cfg_val = LCD_SSP->CR0 & 0xFFFF;
LCD_SSP->CR0 = val;
}
void Board_SSP_config(uint8_t bits, uint8_t clockMode, uint32_t bitrate)
{
uint32_t bitsConfig= SSP_BITS_8;
switch(bits)
{
case 4: bitsConfig=SSP_BITS_4;break;
case 8: bitsConfig=SSP_BITS_8;break;
case 16: bitsConfig=SSP_BITS_16;break;
}
uint32_t clockModeConfig = SSP_CLOCK_CPHA0_CPOL0;
switch(clockMode)
{
case 0: clockModeConfig = SSP_CLOCK_CPHA0_CPOL0;break;
case 1: clockModeConfig = SSP_CLOCK_CPHA1_CPOL0;break;
case 2: clockModeConfig = SSP_CLOCK_CPHA0_CPOL1;break;
case 3: clockModeConfig = SSP_CLOCK_CPHA1_CPOL1;break;
}
Chip_SSP_Init(LPC_SSP1);
Chip_SSP_SetFormat(LPC_SSP1, bitsConfig, SSP_FRAMEFORMAT_SPI, clockModeConfig);
Chip_SSP_SetBitRate(LPC_SSP1, bitrate);
Chip_SSP_Enable(LPC_SSP1);
}
void ssp_init( uint8_t id, uint32_t bitrate, uint8_t frame_sz, bool master_mode, bool poll )
{
ssp_cfg[id].polling = poll;
ssp_cfg[id].frame_size = frame_sz;
ssp_cfg[id].master_mode = master_mode;
ssp_cfg[id].bitrate = bitrate;
/* Set up clock and muxing for SSP0/1 interface */
/* Slave Select (SSEL/FCS_B) is left as GPIO so we can send more than one byte without this pin going high (default operation of SSP interface) */
Chip_IOCON_Init(LPC_IOCON);
Chip_IOCON_PinMux(LPC_IOCON, ssp_pins[id].port, ssp_pins[id].sck_pin, IOCON_MODE_PULLDOWN, ssp_pins[id].sck_func);
Chip_IOCON_PinMux(LPC_IOCON, ssp_pins[id].port, ssp_pins[id].ssel_pin, IOCON_MODE_PULLUP, ssp_pins[id].ssel_func);
Chip_IOCON_PinMux(LPC_IOCON, ssp_pins[id].port, ssp_pins[id].mosi_pin, IOCON_MODE_INACT, ssp_pins[id].mosi_func);
Chip_IOCON_PinMux(LPC_IOCON, ssp_pins[id].port, ssp_pins[id].miso_pin, IOCON_MODE_INACT, ssp_pins[id].miso_func);
if (ssp_pins[id].ssel_func == 0) {
gpio_set_pin_dir( ssp_pins[id].port, ssp_pins[id].ssel_pin, OUTPUT);
gpio_set_pin_state( ssp_pins[id].port, ssp_pins[id].ssel_pin, HIGH);
}
Chip_SSP_Init(ssp_cfg[id].lpc_id);
Chip_SSP_SetBitRate(ssp_cfg[id].lpc_id, bitrate);
Chip_SSP_SetMaster(ssp_cfg[id].lpc_id, master_mode);
Chip_SSP_SetFormat(ssp_cfg[id].lpc_id, (frame_sz-1), SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA0_CPOL0);
Chip_SSP_Enable(ssp_cfg[id].lpc_id);
if (!poll) {
/* Configure interruption priority and enable it */
NVIC_SetPriority( ssp_cfg[id].irq, configMAX_SYSCALL_INTERRUPT_PRIORITY );
NVIC_EnableIRQ( ssp_cfg[id].irq );
}
if (ssp_cfg[id].lpc_id == LPC_SSP0) {
active_SSP0 = id;
}
}
void spi_init(LPC_SSP_T* id_in) {
// Set up global state
spi_id = id_in;
// Set up pins
spi_pin_mux();
// Setup format
ssp_format.bits = SSP_BITS_8;
ssp_format.frameFormat = SSP_FRAMEFORMAT_SPI;
ssp_format.clockMode = SSP_CLOCK_MODE0;
// Set up buffers
xf_setup.rx_data = spi_rx_buf;
xf_setup.tx_data = spi_tx_buf;
// Chip library calls
Chip_SSP_Init(spi_id);
Chip_SSP_SetMaster(spi_id, 1);
Chip_SSP_SetFormat(spi_id, ssp_format.bits, ssp_format.frameFormat, ssp_format.clockMode);
Chip_SSP_Enable(spi_id);
Chip_SSP_SetBitRate(spi_id, SPI_SPEED_LOW);
}
void spi_set_bit_rate(spi_device_t* device, uint32_t bit_rate) {
Chip_SSP_SetBitRate(device->ssp_device, bit_rate);
}
