/* Set the SSP operating modes, master or slave */
void Chip_SSP_SetMaster(LPC_SSP_T *pSSP, bool master)
{
if (master) {
Chip_SSP_Set_Mode(pSSP, SSP_MODE_MASTER);
}
else {
Chip_SSP_Set_Mode(pSSP, SSP_MODE_SLAVE);
}
}
/* Initialize the SSP */
void Chip_SSP_Init(LPC_SSP_T *pSSP)
{
Chip_Clock_Enable(Chip_SSP_GetClockIndex(pSSP));
Chip_SSP_Set_Mode(pSSP, SSP_MODE_MASTER);
Chip_SSP_SetFormat(pSSP, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA0_CPOL0);
Chip_SSP_SetBitRate(pSSP, 100000);
}
/**
* Methods
*/
void nRF24L01PInit(unsigned char transmitMode) {
Chip_GPIO_SetPinOutHigh(LPC_GPIO, CSN_PORT, CSN_PIN);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, CSN_PORT, CSN_PIN);
Chip_GPIO_SetPinOutLow(LPC_GPIO, NORDIC_CE_PORT, NORDIC_CE_PIN);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, NORDIC_CE_PORT, NORDIC_CE_PIN);
Chip_GPIO_SetPinDIRInput(LPC_GPIO, NORDIC_IRQ_PORT, NORDIC_IRQ_PIN);
nRF24L01P.mode = NRF24L01P_MODE_UNKNOWN;
nRF24L01P.transmissionTimeout = -1;
nRF24L01P.payloadsinTXFIFO = 0;
RFdisable();
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SSP1);
Chip_SSP_Set_Mode(LPC_SSP1, SSP_MODE_MASTER);
Chip_SSP_SetFormat(LPC_SSP1, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA0_CPOL0); // 8-bit, ClockPhase = 0, ClockPolarity = 0
Chip_SSP_SetBitRate(LPC_SSP1, NRF24L01P_SPI_MAX_DATA_RATE / 2); // 2Mbit, 1/5th the maximum transfer rate for the SPI bus
Chip_SSP_Enable(LPC_SSP1);
RingBuffer_Init(&nordicTxBuffer, nordictxBufferArray, 1, TX_BUFFER_SIZE);
memset(&spi, 0, sizeof(spi));
spi.tx_data = spiBufferTx;
spi.rx_data = spiBufferRx;
timerDelayUs(NRF24L01P_TIMING_Tundef2pd_us); // Wait for Power-on reset
RFsetRegister(NRF24L01P_REG_CONFIG, 0); // Power Down
RFsetRegister(NRF24L01P_REG_STATUS, NRF24L01P_STATUS_MAX_RT | NRF24L01P_STATUS_TX_DS | NRF24L01P_STATUS_RX_DR); // Clear any pending interrupts
RFsetRegister(NRF24L01P_REG_FEATURE, NRF24L01P_EN_DYN_ACK | NRF24L01P_EN_ACK_PAY | NRF24L01P_EN_DPL); //Enabled no ack packages
RFsetRegister(NRF24L01P_REG_DYNPD, NRF24L01P_DPL_P0);
RFsetRegister(NRF24L01P_REG_RF_SETUP, 0); // Clear this register
//
// Setup default configuration
//
RFdisableAllRxPipes();
RFsetFrequency(DEFAULTNRF24L01P_RF_FREQUENCY);
RFsetAirDataRate(DEFAULTNRF24L01P_DATARATE);
RFsetRfOutputPower(DEFAULTNRF24L01P_TX_PWR);
RFsetCrcWidth(DEFAULTNRF24L01P_CRC);
RFsetTxAddress(DEFAULTNRF24L01P_ADDRESS, DEFAULTNRF24L01P_ADDRESS_WIDTH);
RFsetRxAddress(DEFAULTNRF24L01P_ADDRESS, DEFAULTNRF24L01P_ADDRESS_WIDTH, NRF24L01P_PIPE_P0);
RFenableAutoRetransmit(250, 3);
RFdisableAutoAcknowledge();
RFenableAutoAcknowledge(NRF24L01P_PIPE_P0);
RFsetTransferSize(DEFAULTNRF24L01P_TRANSFER_SIZE, NRF24L01P_PIPE_P0);
nRF24L01P.mode = NRF24L01P_MODE_POWER_DOWN;
if (transmitMode) {
RFsetTransmitMode();
} else {
RFsetReceiveMode();
}
RFenable();
}
void InitSPI ()
{
Chip_IOCON_PinMux(LPC_IOCON,TOUCH_E,IOCON_MODE_PULLUP,IOCON_FUNC0);
Chip_GPIO_SetPinDIROutput(LPC_GPIO,TOUCH_E);
Chip_IOCON_DisableOD(LPC_IOCON,TOUCH_E);
Chip_GPIO_SetPinOutHigh(LPC_GPIO,TOUCH_E);
Chip_IOCON_PinMux(LPC_IOCON,TOUCH_CLK,IOCON_MODE_INACT,IOCON_FUNC2);
Chip_IOCON_PinMux(LPC_IOCON,TOUCH_MOSI,IOCON_MODE_INACT,IOCON_FUNC2);
Chip_IOCON_PinMux(LPC_IOCON,TOUCH_MISO,IOCON_MODE_INACT,IOCON_FUNC2);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SSP0);
Chip_SSP_Set_Mode(LPC_SSP0,SSP_MASTER_MODE);
Chip_SSP_SetFormat(LPC_SSP0,SSP_BITS_8,SSP_FRAMEFORMAT_SPI,SSP_CLOCK_CPHA0_CPOL0);
Chip_SSP_SetBitRate(LPC_SSP0,1000000 );
Chip_SSP_Enable(LPC_SSP0);
}
/* Initialize Pin Muxing for LCD */
void Board_LCD_Init(void)
{
uint32_t val;
Board_SSP_Init(LCD_SSP);
val = LCD_SSP->CR0 & 0xFFFF;
Chip_SCU_PinMuxSet(LCD_CDM_PORT, LCD_CMD_PIN, LCD_CMD_CFG);
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, LCD_CMD_GPIO_PORT, LCD_CMD_GPIO_PIN);
Chip_GPIO_SetPinOutHigh(LPC_GPIO_PORT, LCD_CMD_GPIO_PORT, LCD_CMD_GPIO_PIN);
/* Enable the SSP interface */
Chip_SSP_Init(LCD_SSP);
Chip_SSP_Set_Mode(LCD_SSP, SSP_MODE_MASTER);
Chip_SSP_SetFormat(LCD_SSP, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA1_CPOL1);
Chip_SSP_SetBitRate(LCD_SSP, LCD_BIT_RATE);
Chip_SSP_Enable(LCD_SSP);
lcd_cfg_val = LCD_SSP->CR0 & 0xFFFF;
LCD_SSP->CR0 = val;
}
void Chip_ADS1248_Init()
{
Chip_SSP_DeInit(ADS_SSP); //Clear previous setup
Chip_GPIO_Init(LPC_GPIO); //Init GPIO
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_SCLK, IOCON_FUNC2); //SCLK
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_MOSI, IOCON_FUNC2); //MOSI
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_MISO, IOCON_FUNC2); //MISO
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nSSEL1, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_START1, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nRESET1,IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nSSEL0, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_START0, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nRESET0,IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nDRDY0, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nDRDY1, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nSSEL1);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_START1);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nRESET1);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nSSEL0);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_START0);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nRESET0);
Chip_GPIO_SetPinDIRInput(LPC_GPIO, ADS_nDRDY0);
Chip_GPIO_SetPinDIRInput(LPC_GPIO, ADS_nDRDY1);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nSSEL1);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nRESET1);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_START1);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nSSEL0);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nRESET0);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_START0);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_PINT);
Chip_SYSCTL_SetPinInterrupt(0, ADS_nDRDY0);
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(0));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(0));
Chip_SYSCTL_EnablePINTWakeup(0);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_PINT);
Chip_SYSCTL_SetPinInterrupt(1, ADS_nDRDY1);
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(1));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(1));
Chip_SYSCTL_EnablePINTWakeup(1);
Chip_SSP_Init(ADS_SSP);
ssp_format.frameFormat = SSP_FRAMEFORMAT_SPI; //SPI Frame
ssp_format.bits = SSP_BITS_8; //8bits
ssp_format.clockMode = SSP_CLOCK_CPHA1_CPOL0; //CPHA=1, CPOL=0
Chip_SSP_SetFormat(ADS_SSP, ssp_format.bits, ssp_format.frameFormat, ssp_format.clockMode);
Chip_SSP_Set_Mode(ADS_SSP, SSP_MODE_MASTER);
Chip_SSP_SetClockRate(ADS_SSP, 1, 16);
Chip_Clock_SetSSP1ClockDiv(1);
Chip_SSP_Enable(ADS_SSP);
ADS1248_PeriphInit(CHIP_U1);
ADS1248_PeriphInit(CHIP_U3);
}
