static void init(void) {
const Pin pinsDbgu[] = {PINS_DBGU};
PMC_EnablePeripheral(AT91C_ID_DBGU);
PIO_Configure(pinsDbgu, PIO_LISTSIZE(pinsDbgu));
DBGU_Configure(AT91C_US_PAR_NONE, 115200, BOARD_MCK);
SysTick_Configure(1, BOARD_MCK / 1000, SysTick_Handler);
}
/**
* Initializes the DBGU Console
*
* \param dwBaudRate U(S)ART baudrate.
* \param dwMCk Master clock frequency.
*/
extern void TRACE_CONFIGURE( uint32_t dwBaudRate, uint32_t dwMCk )
{
const Pin pinsDBUG[] = { PINS_DBGU } ;
PIO_Configure( pinsDBUG, PIO_LISTSIZE( pinsDBUG ) ) ;
DBGU_Configure( dwBaudRate, dwMCk ) ;
}
/**
* \brief Check if there is Input from DBGU line.
*
* \return true if there is Input.
*/
extern uint32_t DBGU_IsRxReady( void )
{
if ( !_bConsoleIsInitialized )
{
DBGU_Configure( CONSOLE_BAUDRATE, BOARD_MCK ) ;
}
return (CONSOLE_DBGU->DBGU_SR & DBGU_SR_RXRDY) > 0 ;
}
/**
* \brief Input a character from the DBGU line.
*
* \note This function is synchronous
* \return character received.
*/
extern uint32_t DBGU_GetChar( void )
{
if ( !_bConsoleIsInitialized )
{
DBGU_Configure(CONSOLE_BAUDRATE, BOARD_MCK);
}
while ( (CONSOLE_DBGU->DBGU_SR & DBGU_SR_RXRDY) == 0 ) ;
return CONSOLE_DBGU->DBGU_RHR ;
}
/**
* \brief Outputs a character on the DBGU line.
*
* \note This function is synchronous (i.e. uses polling).
* \param c Character to send.
*/
extern void DBGU_PutChar( uint8_t c )
{
if ( !_bConsoleIsInitialized )
{
DBGU_Configure(CONSOLE_BAUDRATE, BOARD_MCK);
}
/* Wait for the transmitter to be ready */
while ( (CONSOLE_DBGU->DBGU_SR & DBGU_SR_TXEMPTY) == 0 ) ;
/* Send character */
CONSOLE_DBGU->DBGU_THR=c ;
}
//------------------------------------------------------------------------------
/// Sets the specified clock configuration.
/// \param configuration Index of the configuration to set.
//------------------------------------------------------------------------------
void CLOCK_SetConfig(unsigned char configuration)
{
printf("Setting clock configuration #%d ... ", configuration);
currentConfig = configuration;
// Switch to main oscillator in two operations
PMC->PMC_MCKR = (PMC->PMC_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
while ((PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0);
// Configure PLL
*AT91C_CKGR_PLLAR = clockConfigurations[configuration].pllr;
while ((PMC->PMC_SR & AT91C_PMC_LOCKA) == 0);
// Configure master clock in two operations
PMC->PMC_MCKR = (clockConfigurations[configuration].mckr & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
while ((PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0);
PMC->PMC_MCKR = clockConfigurations[configuration].mckr;
while ((PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0);
// DBGU reconfiguration
DBGU_Configure(DBGU_STANDARD, 115200, clockConfigurations[configuration].mck*1000000);
printf("done.\n\r");
}
/* main ***********************************************************************/
int main(void) {
CO_NMT_reset_cmd_t reset = CO_RESET_NOT;
InitCanLeds();
DBGU_Configure(115200);
TRACE_INFO_WP("\n\rCanOpenNode %s (%s %s)\n\r", cVer, __DATE__, __TIME__);
/* Configure Timer interrupt function for execution every 1 millisecond */
if (SysTick_Config(SysTick_1ms))
TRACE_FATAL("SysTick_Config\n\r");
initTimer(getTimer_us);
/* Todo: initialize EEPROM */
/* Todo: Loading COD */
TRACE_INFO("Loading COD\n\r");
/* Verify, if OD structures have proper alignment of initial values */
TRACE_DEBUG("Checking COD in RAM (size=%d)\n\r", &CO_OD_RAM.LastWord - &CO_OD_RAM.FirstWord);
if (CO_OD_RAM.FirstWord != CO_OD_RAM.LastWord)
TRACE_FATAL("Err COD in RAM\n\r");
TRACE_DEBUG("Checking COD in EEPROM (size=%d)\n\r", &CO_OD_EEPROM.LastWord - &CO_OD_EEPROM.FirstWord);
if (CO_OD_EEPROM.FirstWord != CO_OD_EEPROM.LastWord)
TRACE_FATAL("Err COD in EEPROM\n\r");
TRACE_DEBUG("Checking COD in ROM (size=%d)\n\r", &CO_OD_ROM.LastWord - &CO_OD_ROM.FirstWord);
if (CO_OD_ROM.FirstWord != CO_OD_ROM.LastWord)
TRACE_FATAL("Err COD in ROM\n\r");
/* increase variable each startup. Variable is stored in eeprom. */
OD_powerOnCounter++;
TRACE_INFO("CO power-on (BTR=%dk Node=0x%x)\n\r", CO_OD_ROM.CANBitRate, CO_OD_ROM.CANNodeID);
ttimer tprof;
while (reset != CO_RESET_APP) {
/* CANopen communication reset - initialize CANopen objects *******************/
static uint32_t timer1msPrevious;
CO_ReturnError_t err;
/* disable timer interrupts, turn on red LED */
canTimerOff = 1;
CanLedsSet(eCoLed_Red);
/* initialize CANopen */
err = CO_init();
if (err) {
TRACE_FATAL("CO_init\n\r");
/* CO_errorReport(CO->em, CO_EM_MEMORY_ALLOCATION_ERROR, CO_EMC_SOFTWARE_INTERNAL, err); */
}
/* start Timer */
canTimerOff = 0;
reset = CO_RESET_NOT;
timer1msPrevious = CO_timer1ms;
TRACE_INFO("CO (re)start\n\r");
while (reset == CO_RESET_NOT) {
saveTime(&tprof);
/* loop for normal program execution ******************************************/
uint32_t timer1msDiff;
timer1msDiff = CO_timer1ms - timer1msPrevious;
timer1msPrevious = CO_timer1ms;
ClearWDT();
/* CANopen process */
reset = CO_process(CO, timer1msDiff);
CanLedsSet((LED_GREEN_RUN(CO->NMT)>0 ? eCoLed_Green : 0) | (LED_RED_ERROR(CO->NMT)>0 ? eCoLed_Red : 0));
ClearWDT();
/* (not implemented) eeprom_process(&eeprom); */
uint32_t t = getTime_us(&tprof);
OD_performance[ODA_performance_mainCycleTime] = t;
if (t > OD_performance[ODA_performance_mainCycleMaxTime])
OD_performance[ODA_performance_mainCycleMaxTime] = t;
} /* while (reset != 0) */
} /* while (reset != 2) */
/* program exit ***************************************************************/
/* save variables to eeprom */
CO_DISABLE_INTERRUPTS();
CanLedsSet(eCoLed_None);
/* (not implemented) eeprom_saveAll(&eeprom); */
CanLedsSet(eCoLed_Red);
/* delete CANopen object from memory */
CO_delete();
/* reset - by WD */
return 0;
}
//------------------------------------------------------------------------------
/// Main function
//------------------------------------------------------------------------------
int main(void)
{
unsigned char key;
unsigned char isValid;
// Configure all pins
PIO_Configure(pins, PIO_LISTSIZE(pins));
LED_Configure(0);
LED_Set(0);
LED_Configure(1);
LED_Set(1);
// Initialize the DBGU
TRACE_CONFIGURE(DBGU_STANDARD, 115200, BOARD_MCK);
// Switch to Main clock
AT91C_BASE_PMC->PMC_MCKR = (AT91C_BASE_PMC->PMC_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0);
// Configure PLL to 98.285MHz
*AT91C_CKGR_PLLR = ((1 << 29) | (171 << AT91C_CKGR_MUL_SHIFT) \
| (0x0 << AT91C_CKGR_OUT_SHIFT) |(0x3f << AT91C_CKGR_PLLCOUNT_SHIFT) \
| (21 << AT91C_CKGR_DIV_SHIFT));
while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK) == 0);
// Configure master clock in two operations
AT91C_BASE_PMC->PMC_MCKR = (( AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_PLLA_CLK) & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0);
AT91C_BASE_PMC->PMC_MCKR = ( AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_PLLA_CLK);
while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0);
// DBGU reconfiguration
DBGU_Configure(DBGU_STANDARD, 115200, SSC_MCK);
// Configure and enable the TWI (required for accessing the DAC)
*AT91C_PMC_PCER = (1<< AT91C_ID_TWI0);
TWI_ConfigureMaster(AT91C_BASE_TWI0, TWI_CLOCK, SSC_MCK);
TWID_Initialize(&twid, AT91C_BASE_TWI0);
printf("-- OsmoSDR firmware (" BOARD_NAME ") " GIT_REVISION " --\n\r");
printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
req_ctx_init();
PIO_InitializeInterrupts(0);
cmd_state.out = vprintf;
uart_cmd_reset(&cmd_state);
uart_cmds_register(cmds, sizeof(cmds)/sizeof(cmds[0]));
fastsource_init();
VBus_Configure();
power_peripherals(1);
si570_init(&si570, &twid, SI570_I2C_ADDR);
set_si570_freq(30000000);
sam3u_e4k_init(&e4k, &twid, E4K_I2C_ADDR);
e4k.vco.fosc = 30000000;
osdr_fpga_init(SSC_MCK);
//osdr_fpga_reg_write(OSDR_FPGA_REG_ADC_TIMING, (1 << 8) | 255);
//osdr_fpga_reg_write(OSDR_FPGA_REG_PWM1, (1 << 400) | 800);
osdr_fpga_set_iq_swap(0);
ssc_init();
e4k_init(&e4k);
e4k_init(&e4k);
// Enter menu loop
while (1) {
if (DBGU_IsRxReady()) {
key = DBGU_GetChar();
// Process user input
if (uart_cmd_char(&cmd_state, key) == 1) {
//ssc_stats();
}
}
ssc_dma_start();
fastsource_start();
}
}
//------------------------------------------------------------------------------
/// Applet code for initializing the external RAM.
//------------------------------------------------------------------------------
int main(int argc, char **argv)
{
struct _Mailbox *pMailbox = (struct _Mailbox *) argv;
unsigned int ramType = 0;
unsigned int dataBusWidth = 0;
unsigned int ddrModel = 0;
unsigned int baseAddress = 0;
unsigned int *ramAddr = (unsigned int *) EXTRAM_ADDR;
unsigned int comType = 0;
TRACE_CONFIGURE_ISP(DBGU_STANDARD, 115200, BOARD_MCK);
// ----------------------------------------------------------
// INIT:
// ----------------------------------------------------------
if (pMailbox->command == APPLET_CMD_INIT) {
// Save info of communication link
comType = pMailbox->argument.inputInit.comType;
#if (TRACE_LEVEL==0) && (DYN_TRACES==0)
if (comType == DBGU_COM_TYPE){
// Function TRACE_CONFIGURE_ISP wiil be bypass due to the 0 TRACE_LEVEL. We shall reconfigure the baut rate.
DBGU_Configure(DBGU_STANDARD, 115200, BOARD_MCK);
}
#endif
// Enable User Reset
AT91C_BASE_RSTC->RSTC_RMR |= AT91C_RSTC_URSTEN | (0xA5<<24);
ramType = pMailbox->argument.inputInit.ramType;
dataBusWidth = pMailbox->argument.inputInit.dataBusWidth;
ddrModel = pMailbox->argument.inputInit.ddrModel;
baseAddress = pMailbox->argument.inputInit.baseAddress;
#if (DYN_TRACES == 1)
traceLevel = pMailbox->argument.inputInit.traceLevel;
#endif
TRACE_INFO("-- EXTRAM Applet %s --\n\r", SAM_BA_APPLETS_VERSION);
TRACE_INFO("-- %s\n\r", BOARD_NAME);
TRACE_INFO("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
TRACE_INFO("INIT command:\n\r");
TRACE_INFO("\tCommunication link type : %d\n\r", pMailbox->argument.inputInit.comType);
TRACE_INFO("\tData bus width : %d bits\n\r", dataBusWidth);
if (ramType == TYPE_SDRAM) {
TRACE_INFO("\tExternal RAM type : %s\n\r", "SDRAM");
}
else {
if (ramType == TYPE_DDRAM) {
TRACE_INFO("\tExternal RAM type : %s\n\r", "DDRAM");
}
else {
TRACE_INFO("\tExternal RAM type : %s\n\r", "PSRAM");
}
}
#if defined(at91cap7) || defined(at91cap9) || defined(at91sam9m10) || defined(at91sam9g45)
TRACE_INFO("\tInit EBI Vdd : %s\n\r", (pMailbox->argument.inputInit.VddMemSel)?"3.3V":"1.8V");
BOARD_ConfigureVddMemSel(pMailbox->argument.inputInit.VddMemSel);
#endif //defined(at91cap9)
if (pMailbox->argument.inputInit.ramType == TYPE_SDRAM) {
// Configure SDRAM controller
TRACE_INFO("\tInit SDRAM...\n\r");
#if defined(PINS_SDRAM)
BOARD_ConfigureSdram(dataBusWidth);
#endif
}
else if (pMailbox->argument.inputInit.ramType == TYPE_PSRAM) {
TRACE_INFO("\tInit PSRAM...\n\r");
#if defined(at91sam3u)
BOARD_ConfigurePsram();
#endif
}
else {
// Configure DDRAM controller
#if defined(at91sam9m10) || defined(at91sam9g45)
TRACE_INFO("\tInit DDRAM ... (model : %d)\n\r", ddrModel);
BOARD_ConfigureDdram(baseAddress, ddrModel, dataBusWidth);
if (baseAddress != (unsigned int)AT91C_BASE_DDR2C) {
ramAddr = (unsigned int *)EXTRAM_ADDR_2;
}
#elif defined(at91cap9dk)
TRACE_INFO("\tInit DDRAM ... (model : %d)\n\r", ddrModel);
BOARD_ConfigureDdram(ddrModel, dataBusWidth);
#endif
}
// Test external RAM access
if (ExtRAM_TestOk(ramAddr)) {
pMailbox->status = APPLET_SUCCESS;
}
else {
pMailbox->status = APPLET_FAIL;
}
pMailbox->argument.outputInit.bufferAddress = ((unsigned int) &end);
pMailbox->argument.outputInit.bufferSize = 0;
pMailbox->argument.outputInit.memorySize = EXTRAM_SIZE;
TRACE_INFO("\tInit successful.\n\r");
}
// Acknowledge the end of command
TRACE_INFO("\tEnd of applet (command : %x --- status : %x)\n\r", pMailbox->command, pMailbox->status);
// Notify the host application of the end of the command processing
pMailbox->command = ~(pMailbox->command);
// Send ACK character
if (comType == DBGU_COM_TYPE) {
DBGU_PutChar(0x6);
}
return 0;
}
