{ "usr_lr", (long *)&DDB_REGS->tf_usr_lr, FCN_NULL, NULL },
{ "svc_sp", (long *)&DDB_REGS->tf_svc_sp, FCN_NULL, NULL },
{ "svc_lr", (long *)&DDB_REGS->tf_svc_lr, FCN_NULL, NULL },
{ "pc", (long *)&DDB_REGS->tf_pc, FCN_NULL, NULL },
#ifdef _KERNEL
{ "und_sp", &nil, db_access_und_sp, NULL },
{ "abt_sp", &nil, db_access_abt_sp, NULL },
{ "irq_sp", &nil, db_access_irq_sp, NULL },
#endif
};
const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]);
const struct db_command db_machine_command_table[] = {
{ DDB_ADD_CMD("frame", db_show_frame_cmd, 0,
"Displays the contents of a trapframe",
"[address]",
" address:\taddress of trapfame to display")},
#ifdef _KERNEL
{ DDB_ADD_CMD("fault", db_show_fault_cmd, 0,
"Displays the fault registers",
NULL,NULL) },
#endif
#ifdef ARM32_DB_COMMANDS
ARM32_DB_COMMANDS,
#endif
{ DDB_ADD_CMD(NULL, NULL, 0,NULL,NULL,NULL) }
};
#ifdef _KERNEL
int
db_access_und_sp(const struct db_variable *vp, db_expr_t *valp, int rw)
static void db_pool_print_cmd(db_expr_t, bool, db_expr_t, const char *);
static void db_reboot_cmd(db_expr_t, bool, db_expr_t, const char *);
static void db_sifting_cmd(db_expr_t, bool, db_expr_t, const char *);
static void db_stack_trace_cmd(db_expr_t, bool, db_expr_t, const char *);
static void db_sync_cmd(db_expr_t, bool, db_expr_t, const char *);
static void db_whatis_cmd(db_expr_t, bool, db_expr_t, const char *);
static void db_uvmexp_print_cmd(db_expr_t, bool, db_expr_t, const char *);
#ifdef KERNHIST
static void db_kernhist_print_cmd(db_expr_t, bool, db_expr_t, const char *);
#endif
static void db_vnode_print_cmd(db_expr_t, bool, db_expr_t, const char *);
static void db_vmem_print_cmd(db_expr_t, bool, db_expr_t, const char *);
static const struct db_command db_show_cmds[] = {
/*added from all sub cmds*/
{ DDB_ADD_CMD("callout", db_show_callout,
0 ,"List all used callout functions.",NULL,NULL) },
{ DDB_ADD_CMD("pages", db_show_all_pages,
0 ,"List all used memory pages.",NULL,NULL) },
{ DDB_ADD_CMD("proc", db_show_proc,
0 ,"Print process information.",NULL,NULL) },
{ DDB_ADD_CMD("procs", db_show_all_procs,
0 ,"List all processes.",NULL,NULL) },
{ DDB_ADD_CMD("pools", db_show_all_pools,
0 ,"Show all pools",NULL,NULL) },
#ifdef AIO
/*added from all sub cmds*/
{ DDB_ADD_CMD("aio_jobs", db_show_aio_jobs, 0,
"Show aio jobs",NULL,NULL) },
#endif
{ DDB_ADD_CMD("all", NULL,
CS_COMPAT, NULL,NULL,NULL) },
{ "svc_sp", XO(tf_svc_sp), ddb_reg_var, NULL },
{ "svc_lr", XO(tf_svc_lr), ddb_reg_var, NULL },
{ "pc", XO(tf_pc), ddb_reg_var, NULL },
#ifdef _KERNEL
{ "und_sp", &nil, db_access_und_sp, NULL },
{ "abt_sp", &nil, db_access_abt_sp, NULL },
{ "irq_sp", &nil, db_access_irq_sp, NULL },
#endif
};
#undef XO
const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]);
const struct db_command db_machine_command_table[] = {
{ DDB_ADD_CMD("frame", db_show_frame_cmd, 0,
"Displays the contents of a trapframe",
"[address]",
" address:\taddress of trapfame to display")},
#ifdef _KERNEL
{ DDB_ADD_CMD("fault", db_show_fault_cmd, 0,
"Displays the fault registers",
NULL,NULL) },
#endif
#if defined(_KERNEL) && (defined(CPU_CORTEXA5) || defined(CPU_CORTEXA7))
{ DDB_ADD_CMD("tlb", db_show_tlb_cmd, 0,
"Displays the TLB",
NULL,NULL) },
#endif
#if defined(_KERNEL) && defined(MULTIPROCESSOR)
{ DDB_ADD_CMD("cpu", db_switch_cpu_cmd, 0,
"switch to a different cpu",
NULL,NULL) },
}
db_printf("using CPU %ld", addr);
ddb_regp = __UNVOLATILE(ci->ci_ddb_regs);
ddb_cpuinfo = ci;
}
void
db_xcall_cmd(db_expr_t addr, bool have_addr, db_expr_t count, const char *modif)
{
cpu_xcall_dump();
}
#endif /* MULTIPROCESSOR */
const struct db_command db_machine_command_table[] = {
{ DDB_ADD_CMD("prom", db_prom_cmd, 0,
"Enter the Sun PROM monitor.",NULL,NULL) },
{ DDB_ADD_CMD("proc", db_proc_cmd, 0,
"Display some information about an LWP",
"[addr]"," addr:\tstruct lwp address (curlwp otherwise)") },
{ DDB_ADD_CMD("pcb", db_dump_pcb, 0,
"Display information about a struct pcb",
"[address]",
" address:\tthe struct pcb to print (curpcb otherwise)") },
{ DDB_ADD_CMD("page", db_page_cmd, 0,
"Display the address of a struct vm_page given a physical address",
"pa", " pa:\tphysical address to look up") },
#ifdef MULTIPROCESSOR
{ DDB_ADD_CMD("cpu", db_cpu_cmd, 0,
"switch to another cpu's registers", "cpu-no", NULL) },
{ DDB_ADD_CMD("xcall", db_xcall_cmd, 0,
"show xcall information on all cpus", NULL, NULL) },
return;
}
}
if (ci->ci_ddb_regs == 0) {
db_printf("CPU %ld has no saved regs\n", addr);
return;
}
db_printf("using CPU %ld", addr);
ddb_regp = __UNVOLATILE(ci->ci_ddb_regs);
ddb_cpuinfo = ci;
}
#endif /* MULTIPROCESSOR */
const struct db_command db_machine_command_table[] = {
{ DDB_ADD_CMD("prom", db_prom_cmd, 0, NULL,NULL,NULL) },
{ DDB_ADD_CMD("proc", db_proc_cmd, 0, NULL,NULL,NULL) },
{ DDB_ADD_CMD("pcb", db_dump_pcb, 0, NULL,NULL,NULL) },
{ DDB_ADD_CMD("page", db_page_cmd, 0, NULL,NULL,NULL) },
#ifdef MULTIPROCESSOR
{ DDB_ADD_CMD("cpu", db_cpu_cmd, 0, NULL,NULL,NULL) },
#endif
{ DDB_ADD_CMD(NULL, NULL, 0,NULL,NULL,NULL) }
};
#endif /* DDB */
/*
* support for SOFTWARE_SSTEP:
* return the next pc if the given branch is taken.
*
{ "pidr3", (long *)&ddb_regs.tf_pidr3, FCN_NULL, NULL },
{ "pidr4", (long *)&ddb_regs.tf_pidr4, FCN_NULL, NULL },
#endif
{ "vtop", (long *)&ddb_regs.tf_vtop, FCN_NULL, NULL },
{ "cr24", (long *)&ddb_regs.tf_cr24, FCN_NULL, NULL },
{ "cr27", (long *)&ddb_regs.tf_cr27, FCN_NULL, NULL },
{ "cr28", (long *)&ddb_regs.tf_cr28, FCN_NULL, NULL },
{ "cr30", (long *)&ddb_regs.tf_cr30, FCN_NULL, NULL },
};
const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]);
const struct db_command db_machine_command_table[] = {
{ DDB_ADD_CMD("frame", db_dump_trap, 0,
"Displays the contents of a trapframe",
"[/l] [addr]",
" addr:\tdisplay this trap frame (current kernel frame otherwise)\n"
" /l:\tdisplay the trap frame from lwp") },
{ DDB_ADD_CMD(NULL, NULL, 0, NULL, NULL, NULL) }
};
void
db_dump_trap(db_expr_t addr, bool have_addr, db_expr_t count, const char *modif)
{
struct trapframe *tf, *ktf, ltf;
const char *cp = modif;
bool lwpaddr = false;
char c;
char buf[64];
tf = DDB_REGS;
#if 0
extern char *trap_type[];
extern int trap_types;
#endif
int db_active = 0;
db_regs_t *ddb_regp;
#if defined(MULTIPROCESSOR)
void db_mach_cpu __P((db_expr_t, bool, db_expr_t, const char *));
#endif
const struct db_command db_machine_command_table[] = {
#if defined(MULTIPROCESSOR)
{ DDB_ADD_CMD("cpu", db_mach_cpu, 0,NULL,NULL,NULL) },
#endif
{ DDB_ADD_CMD(NULL, NULL, 0,NULL,NULL,NULL) },
};
static int db_alpha_regop __P((const struct db_variable *, db_expr_t *, int));
#define dbreg(xx) ((long *)(xx))
const struct db_variable db_regs[] = {
{ "v0", dbreg(FRAME_V0), db_alpha_regop },
{ "t0", dbreg(FRAME_T0), db_alpha_regop },
{ "t1", dbreg(FRAME_T1), db_alpha_regop },
{ "t2", dbreg(FRAME_T2), db_alpha_regop },
{ "t3", dbreg(FRAME_T3), db_alpha_regop },
{ "t4", dbreg(FRAME_T4), db_alpha_regop },
#endif
static void db_frame_cmd(db_expr_t, bool, db_expr_t, const char *);
static void __db_print_symbol(db_expr_t);
static void __db_print_tfstack(struct trapframe *, struct trapframe *);
static void db_reset_cmd(db_expr_t, bool, db_expr_t, const char *);
#ifdef KSTACK_DEBUG
static void db_stackcheck_cmd(db_expr_t, bool, db_expr_t, const char *);
#endif
const struct db_command db_machine_command_table[] = {
{ DDB_ADD_CMD("cache", db_cachedump_cmd, 0,
"Dump contents of the cache address array.",
"[address]",
" address: if specified, dump only matching entries" ) },
{ DDB_ADD_CMD("frame", db_frame_cmd, 0,
"Dump switch frame and trap frames of curlwp.",
NULL, NULL) },
{ DDB_ADD_CMD("reset", db_reset_cmd, 0,
"Reset machine (by taking a trap with exceptions disabled).",
NULL, NULL) },
#ifdef KSTACK_DEBUG
{ DDB_ADD_CMD("stack", db_stackcheck_cmd, 0,
"Dump kernel stacks of all lwps.",
NULL, NULL) },
#endif
{ DDB_ADD_CMD("tlb", db_tlbdump_cmd, 0,
