/* Check if all uses in DEF_INSN can be used in TARGET_INSN. This
would require full computation of available expressions;
we check only restricted conditions, see use_killed_between. */
static bool
all_uses_available_at (rtx_insn *def_insn, rtx_insn *target_insn)
{
df_ref use;
struct df_insn_info *insn_info = DF_INSN_INFO_GET (def_insn);
rtx def_set = single_set (def_insn);
rtx_insn *next;
gcc_assert (def_set);
/* If target_insn comes right after def_insn, which is very common
for addresses, we can use a quicker test. Ignore debug insns
other than target insns for this. */
next = NEXT_INSN (def_insn);
while (next && next != target_insn && DEBUG_INSN_P (next))
next = NEXT_INSN (next);
if (next == target_insn && REG_P (SET_DEST (def_set)))
{
rtx def_reg = SET_DEST (def_set);
/* If the insn uses the reg that it defines, the substitution is
invalid. */
FOR_EACH_INSN_INFO_USE (use, insn_info)
if (rtx_equal_p (DF_REF_REG (use), def_reg))
return false;
FOR_EACH_INSN_INFO_EQ_USE (use, insn_info)
if (rtx_equal_p (DF_REF_REG (use), def_reg))
return false;
}
static struct df_link *
get_defs (rtx_insn *insn, rtx reg, vec<rtx_insn *> *dest)
{
df_ref use;
struct df_link *ref_chain, *ref_link;
FOR_EACH_INSN_USE (use, insn)
{
if (GET_CODE (DF_REF_REG (use)) == SUBREG)
return NULL;
if (REGNO (DF_REF_REG (use)) == REGNO (reg))
break;
}
gcc_assert (use != NULL);
ref_chain = DF_REF_CHAIN (use);
for (ref_link = ref_chain; ref_link; ref_link = ref_link->next)
{
/* Problem getting some definition for this instruction. */
if (ref_link->ref == NULL)
return NULL;
if (DF_REF_INSN_INFO (ref_link->ref) == NULL)
return NULL;
}
if (dest)
for (ref_link = ref_chain; ref_link; ref_link = ref_link->next)
dest->safe_push (DF_REF_INSN (ref_link->ref));
return ref_chain;
}
/* Return true if INSN requires the stack frame to be set up.
PROLOGUE_USED contains the hard registers used in the function
prologue. SET_UP_BY_PROLOGUE is the set of registers we expect the
prologue to set up for the function. */
bool
requires_stack_frame_p (rtx_insn *insn, HARD_REG_SET prologue_used,
HARD_REG_SET set_up_by_prologue)
{
df_ref def, use;
HARD_REG_SET hardregs;
unsigned regno;
if (CALL_P (insn))
return !SIBLING_CALL_P (insn);
/* We need a frame to get the unique CFA expected by the unwinder. */
if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn))
return true;
CLEAR_HARD_REG_SET (hardregs);
FOR_EACH_INSN_DEF (def, insn)
{
rtx dreg = DF_REF_REG (def);
if (!REG_P (dreg))
continue;
add_to_hard_reg_set (&hardregs, GET_MODE (dreg),
REGNO (dreg));
}
static struct df_link *
get_uses (rtx_insn *insn, rtx reg)
{
df_ref def;
struct df_link *ref_chain, *ref_link;
FOR_EACH_INSN_DEF (def, insn)
if (REGNO (DF_REF_REG (def)) == REGNO (reg))
break;
gcc_assert (def != NULL);
ref_chain = DF_REF_CHAIN (def);
for (ref_link = ref_chain; ref_link; ref_link = ref_link->next)
{
/* Problem getting some use for this instruction. */
if (ref_link->ref == NULL)
return NULL;
if (DF_REF_CLASS (ref_link->ref) != DF_REF_REGULAR)
return NULL;
}
return ref_chain;
}
static struct df_link *
get_defs (rtx_insn *insn, rtx reg, vec<rtx_insn *> *dest)
{
df_ref use;
struct df_link *ref_chain, *ref_link;
FOR_EACH_INSN_USE (use, insn)
{
if (GET_CODE (DF_REF_REG (use)) == SUBREG)
return NULL;
if (REGNO (DF_REF_REG (use)) == REGNO (reg))
break;
}
gcc_assert (use != NULL);
ref_chain = DF_REF_CHAIN (use);
for (ref_link = ref_chain; ref_link; ref_link = ref_link->next)
{
/* Problem getting some definition for this instruction. */
if (ref_link->ref == NULL)
return NULL;
if (DF_REF_INSN_INFO (ref_link->ref) == NULL)
return NULL;
/* As global regs are assumed to be defined at each function call
dataflow can report a call_insn as being a definition of REG.
But we can't do anything with that in this pass so proceed only
if the instruction really sets REG in a way that can be deduced
from the RTL structure. */
if (global_regs[REGNO (reg)]
&& !set_of (reg, DF_REF_INSN (ref_link->ref)))
return NULL;
}
if (dest)
for (ref_link = ref_chain; ref_link; ref_link = ref_link->next)
dest->safe_push (DF_REF_INSN (ref_link->ref));
return ref_chain;
}
static struct df_link *
get_defs (rtx insn, rtx reg, vec<rtx> *dest)
{
df_ref reg_info, *uses;
struct df_link *ref_chain, *ref_link;
reg_info = NULL;
for (uses = DF_INSN_USES (insn); *uses; uses++)
{
reg_info = *uses;
if (GET_CODE (DF_REF_REG (reg_info)) == SUBREG)
return NULL;
if (REGNO (DF_REF_REG (reg_info)) == REGNO (reg))
break;
}
gcc_assert (reg_info != NULL && uses != NULL);
ref_chain = DF_REF_CHAIN (reg_info);
for (ref_link = ref_chain; ref_link; ref_link = ref_link->next)
{
/* Problem getting some definition for this instruction. */
if (ref_link->ref == NULL)
return NULL;
if (DF_REF_INSN_INFO (ref_link->ref) == NULL)
return NULL;
}
if (dest)
for (ref_link = ref_chain; ref_link; ref_link = ref_link->next)
dest->safe_push (DF_REF_INSN (ref_link->ref));
return ref_chain;
}
static void
union_defs (struct df *df, struct ref *use, struct web_entry *def_entry,
struct web_entry *use_entry)
{
rtx insn = DF_REF_INSN (use);
struct df_link *link = DF_REF_CHAIN (use);
struct df_link *use_link = DF_INSN_USES (df, insn);
struct df_link *def_link = DF_INSN_DEFS (df, insn);
rtx set = single_set (insn);
/* Some instructions may use match_dup for their operands. In case the
operands are dead, we will assign them different pseudos, creating
invalid instructions, so union all uses of the same operand for each
insn. */
while (use_link)
{
if (use != use_link->ref
&& DF_REF_REAL_REG (use) == DF_REF_REAL_REG (use_link->ref))
unionfind_union (use_entry + DF_REF_ID (use),
use_entry + DF_REF_ID (use_link->ref));
use_link = use_link->next;
}
/* Recognize trivial noop moves and attempt to keep them as noop.
While most of noop moves should be removed, we still keep some
of them at libcall boundaries and such. */
if (set
&& SET_SRC (set) == DF_REF_REG (use)
&& SET_SRC (set) == SET_DEST (set))
{
while (def_link)
{
if (DF_REF_REAL_REG (use) == DF_REF_REAL_REG (def_link->ref))
unionfind_union (use_entry + DF_REF_ID (use),
def_entry + DF_REF_ID (def_link->ref));
def_link = def_link->next;
}
}
while (link)
{
unionfind_union (use_entry + DF_REF_ID (use),
def_entry + DF_REF_ID (link->ref));
link = link->next;
}
/* A READ_WRITE use requires the corresponding def to be in the same
register. Find it and union. */
if (use->flags & DF_REF_READ_WRITE)
{
struct df_link *link = DF_INSN_DEFS (df, DF_REF_INSN (use));
while (link)
{
if (DF_REF_REAL_REG (link->ref) == DF_REF_REAL_REG (use))
unionfind_union (use_entry + DF_REF_ID (use),
def_entry + DF_REF_ID (link->ref));
link = link->next;
}
}
}
static bool
find_call_stack_args (rtx_call_insn *call_insn, bool do_mark, bool fast,
bitmap arg_stores)
{
rtx p;
rtx_insn *insn, *prev_insn;
bool ret;
HOST_WIDE_INT min_sp_off, max_sp_off;
bitmap sp_bytes;
gcc_assert (CALL_P (call_insn));
if (!ACCUMULATE_OUTGOING_ARGS)
return true;
if (!do_mark)
{
gcc_assert (arg_stores);
bitmap_clear (arg_stores);
}
min_sp_off = INTTYPE_MAXIMUM (HOST_WIDE_INT);
max_sp_off = 0;
/* First determine the minimum and maximum offset from sp for
stored arguments. */
for (p = CALL_INSN_FUNCTION_USAGE (call_insn); p; p = XEXP (p, 1))
if (GET_CODE (XEXP (p, 0)) == USE
&& MEM_P (XEXP (XEXP (p, 0), 0)))
{
rtx mem = XEXP (XEXP (p, 0), 0), addr;
HOST_WIDE_INT off = 0, size;
if (!MEM_SIZE_KNOWN_P (mem))
return false;
size = MEM_SIZE (mem);
addr = XEXP (mem, 0);
if (GET_CODE (addr) == PLUS
&& REG_P (XEXP (addr, 0))
&& CONST_INT_P (XEXP (addr, 1)))
{
off = INTVAL (XEXP (addr, 1));
addr = XEXP (addr, 0);
}
if (addr != stack_pointer_rtx)
{
if (!REG_P (addr))
return false;
/* If not fast, use chains to see if addr wasn't set to
sp + offset. */
if (!fast)
{
df_ref use;
struct df_link *defs;
rtx set;
FOR_EACH_INSN_USE (use, call_insn)
if (rtx_equal_p (addr, DF_REF_REG (use)))
break;
if (use == NULL)
return false;
for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
if (! DF_REF_IS_ARTIFICIAL (defs->ref))
break;
if (defs == NULL)
return false;
set = single_set (DF_REF_INSN (defs->ref));
if (!set)
return false;
if (GET_CODE (SET_SRC (set)) != PLUS
|| XEXP (SET_SRC (set), 0) != stack_pointer_rtx
|| !CONST_INT_P (XEXP (SET_SRC (set), 1)))
return false;
off += INTVAL (XEXP (SET_SRC (set), 1));
}
else
return false;
static bool
deletable_insn_p (rtx_insn *insn, bool fast, bitmap arg_stores)
{
rtx body, x;
int i;
df_ref def;
if (CALL_P (insn)
/* We cannot delete calls inside of the recursive dce because
this may cause basic blocks to be deleted and this messes up
the rest of the stack of optimization passes. */
&& (!df_in_progress)
/* We cannot delete pure or const sibling calls because it is
hard to see the result. */
&& (!SIBLING_CALL_P (insn))
/* We can delete dead const or pure calls as long as they do not
infinite loop. */
&& (RTL_CONST_OR_PURE_CALL_P (insn)
&& !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)))
return find_call_stack_args (as_a <rtx_call_insn *> (insn), false,
fast, arg_stores);
/* Don't delete jumps, notes and the like. */
if (!NONJUMP_INSN_P (insn))
return false;
/* Don't delete insns that may throw if we cannot do so. */
if (!(cfun->can_delete_dead_exceptions && can_alter_cfg)
&& !insn_nothrow_p (insn))
return false;
/* If INSN sets a global_reg, leave it untouched. */
FOR_EACH_INSN_DEF (def, insn)
if (HARD_REGISTER_NUM_P (DF_REF_REGNO (def))
&& global_regs[DF_REF_REGNO (def)])
return false;
/* Initialization of pseudo PIC register should never be removed. */
else if (DF_REF_REG (def) == pic_offset_table_rtx
&& REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
return false;
body = PATTERN (insn);
switch (GET_CODE (body))
{
case USE:
case VAR_LOCATION:
return false;
case CLOBBER:
if (fast)
{
/* A CLOBBER of a dead pseudo register serves no purpose.
That is not necessarily true for hard registers until
after reload. */
x = XEXP (body, 0);
return REG_P (x) && (!HARD_REGISTER_P (x) || reload_completed);
}
else
/* Because of the way that use-def chains are built, it is not
possible to tell if the clobber is dead because it can
never be the target of a use-def chain. */
return false;
case PARALLEL:
for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
if (!deletable_insn_p_1 (XVECEXP (body, 0, i)))
return false;
return true;
default:
return deletable_insn_p_1 (body);
}
}
