void exynos5_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
unsigned int gpio;
/* Set all the necessary GPC2[0:1] pins to special-function 2 */
for (gpio = EXYNOS5_GPC2(0); gpio < EXYNOS5_GPC2(2); gpio++) {
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
for (gpio = EXYNOS5_GPC2(3); gpio <= EXYNOS5_GPC2(6); gpio++) {
/* Data pin GPC2[3:6] to special-function 2 */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
s3c_gpio_cfgpin(EXYNOS5_GPC2(2), S3C_GPIO_SFN(2));
s3c_gpio_setpull(EXYNOS5_GPC2(2), S3C_GPIO_PULL_UP);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
}
void exynos5_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
unsigned int gpio;
/* Set all the necessary GPK2[0:1] pins to special-function 2 */
for (gpio = EXYNOS5_GPC2(0); gpio < EXYNOS5_GPC2(2); gpio++) {
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
switch (width) {
case 8:
for (gpio = EXYNOS5_GPC3(3); gpio <= EXYNOS5_GPC3(6); gpio++) {
/* Data pin GPK3[3:6] to special-function 3 */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
case 4:
for (gpio = EXYNOS5_GPC2(3); gpio <= EXYNOS5_GPC2(6); gpio++) {
/* Data pin GPK2[3:6] to special-function 2 */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
default:
break;
}
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
s3c_gpio_cfgpin(EXYNOS5_GPC2(2), S3C_GPIO_SFN(2));
s3c_gpio_setpull(EXYNOS5_GPC2(2), S3C_GPIO_PULL_UP);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
/* In SMDK5210 Rev0.0 Board, SD_CDn Pin connection have been changed by Jumper
Therfore, the following GPX2[0] configuration is requiered. */
/*
s3c_gpio_cfgpin(EXYNOS5_GPX2(0), S3C_GPIO_SFN(0));
s3c_gpio_setpull(EXYNOS5_GPX2(0), S3C_GPIO_PULL_NONE);
*/
}
}
{EXYNOS5_GPC1(0), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* NC */
{EXYNOS5_GPC1(1), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* NC */
{EXYNOS5_GPC1(2), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* NC */
{EXYNOS5_GPC1(3), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* NAND_D(4) */
{EXYNOS5_GPC1(4), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* NAND_D(5) */
{EXYNOS5_GPC1(5), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* NAND_D(6) */
{EXYNOS5_GPC1(6), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* NAND_D(7) */
{EXYNOS5_GPC2(0), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* T_FLASH_CLK */
{EXYNOS5_GPC2(1), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* T_FLASH_CMD */
{EXYNOS5_GPC2(2), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* NC */
{EXYNOS5_GPC2(3), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* T_FLASH_D(0) */
{EXYNOS5_GPC2(4), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* T_FLASH_D(1) */
{EXYNOS5_GPC2(5), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* T_FLASH_D(2) */
{EXYNOS5_GPC2(6), S3C_GPIO_SLP_INPUT,
S3C_GPIO_PULL_DOWN}, /* T_FLASH_D(3) */
{EXYNOS5_GPC3(0), S3C_GPIO_SLP_OUT0,
