/*
* post processing after Flash ROM write completed
*/
EXPORT void flashwr_done( void )
{
/* restore the page table setting to the original. */
flashwr_pagetable(FALSE);
/* validate cache */
EnableCache();
}
void CRepositoryCacheManager::EnableCache(TInt aDefaultTimeout, TInt aCacheSize)
{
if (aDefaultTimeout>0)
{
iDefaultTimeout = aDefaultTimeout;
}
if (aCacheSize>0)
{
iCacheSize = aCacheSize;
}
EnableCache();
}
// Application entry point
extern "C" void AppMain()
{
// Fill the free memory with a pattern so that we can check for stack usage and memory corruption
char* heapend = sbrk(0);
register const char * stack_ptr asm ("sp");
while (heapend + 16 < stack_ptr)
{
*heapend++ = memPattern;
}
// Trap integer divide-by-zero.
// We could also trap unaligned memory access, if we change the gcc options to not generate code that uses unaligned memory access.
SCB->CCR |= SCB_CCR_DIV_0_TRP_Msk;
// When doing a software reset, we disable the NRST input (User reset) to prevent the negative-going pulse that gets generated on it
// being held in the capacitor and changing the reset reason from Software to User. So enable it again here. We hope that the reset signal
// will have gone away by now.
#ifndef RSTC_MR_KEY_PASSWD
// Definition of RSTC_MR_KEY_PASSWD is missing in the SAM3X ASF files
# define RSTC_MR_KEY_PASSWD (0xA5u << 24)
#endif
RSTC->RSTC_MR = RSTC_MR_KEY_PASSWD | RSTC_MR_URSTEN; // ignore any signal on the NRST pin for now so that the reset reason will show as Software
#if USE_CACHE
// Enable the cache
cmcc_config g_cmcc_cfg;
cmcc_get_config_defaults(&g_cmcc_cfg);
cmcc_init(CMCC, &g_cmcc_cfg);
EnableCache();
#endif
#ifdef RTOS
// Add the FreeRTOS internal tasks to the task list
idleTask.AddToList();
#if configUSE_TIMERS
timerTask.AddToList();
#endif
// Create the startup task
mainTask.Create(MainTask, "MAIN", nullptr, TaskBase::SpinPriority);
vTaskStartScheduler(); // doesn't return
}
