/**
* fm10k_update_hw_stats_tx_q - Updates TX queue statistics counters
* @hw: pointer to the hardware structure
* @q: pointer to the ring of hardware statistics queue
* @idx: index pointing to the start of the ring iteration
*
* Function updates the TX queue statistics counters that are related to the
* hardware.
**/
static void fm10k_update_hw_stats_tx_q(struct fm10k_hw *hw,
struct fm10k_hw_stats_q *q,
u32 idx)
{
u32 id_tx, id_tx_prev, tx_packets;
u64 tx_bytes = 0;
/* Retrieve TX Owner Data */
id_tx = fm10k_read_reg(hw, FM10K_TXQCTL(idx));
/* Process TX Ring */
do {
tx_packets = fm10k_read_hw_stats_32b(hw, FM10K_QPTC(idx),
&q->tx_packets);
if (tx_packets)
tx_bytes = fm10k_read_hw_stats_48b(hw,
FM10K_QBTC_L(idx),
&q->tx_bytes);
/* Re-Check Owner Data */
id_tx_prev = id_tx;
id_tx = fm10k_read_reg(hw, FM10K_TXQCTL(idx));
} while ((id_tx ^ id_tx_prev) & FM10K_TXQCTL_ID_MASK);
/* drop non-ID bits and set VALID ID bit */
id_tx &= FM10K_TXQCTL_ID_MASK;
id_tx |= FM10K_STAT_VALID;
/* update packet counts */
if (q->tx_stats_idx == id_tx) {
q->tx_packets.count += tx_packets;
q->tx_bytes.count += tx_bytes;
}
/* update bases and record ID */
fm10k_update_hw_base_32b(&q->tx_packets, tx_packets);
fm10k_update_hw_base_48b(&q->tx_bytes, tx_bytes);
q->tx_stats_idx = id_tx;
}
static void fm10k_get_reg_q(struct fm10k_hw *hw, u32 *buff, int i)
{
int idx = 0;
buff[idx++] = fm10k_read_reg(hw, FM10K_RDBAL(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_RDBAH(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_RDLEN(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TPH_RXCTRL(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_RDH(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_RDT(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_RXQCTL(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_RXDCTL(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_RXINT(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_SRRCTL(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_QPRC(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_QPRDC(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_QBRC_L(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_QBRC_H(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TDBAL(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TDBAH(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TDLEN(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TPH_TXCTRL(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TDH(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TDT(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TXDCTL(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TXQCTL(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TXINT(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_QPTC(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_QBTC_L(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_QBTC_H(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TQDLOC(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_TX_SGLORT(i));
buff[idx++] = fm10k_read_reg(hw, FM10K_PFVTCTL(i));
BUG_ON(idx != FM10K_REGS_LEN_Q);
}
