/**
* In this function, the hardware should be initialized.
* Called from ethernetif_init().
*
* @param pxNetIf the already initialized lwip network interface structure
* for this etherpxNetIf
*/
static void prvLowLevelInit( struct xFtmac100If *priv )
{
err_t xStatus;
unsigned portBASE_TYPE uxOriginalPriority;
unsigned int maddr, laddr;
/* Hardware initialisation can take some time, so temporarily lower the
task priority to ensure other functionality is not adversely effected.
The priority will get raised again before this function exits. */
uxOriginalPriority = uxTaskPriorityGet( NULL );
vTaskPrioritySet( NULL, tskIDLE_PRIORITY );
/* Reset the mac */
xStatus = ftMac100_reset_hw();
if( xStatus == ERR_OK )
{
/* setup ring buffer base registers */
FTMAC100_OFFSET_RXR_BADR = (int) gRxDes;
FTMAC100_OFFSET_TXR_BADR = (int) gTxDes;
FTMAC100_OFFSET_APTC = FTMAC100_APTC_RXPOLL_CNT(1);
/* Set mac address */
maddr = priv->hwaddr[0] << 8 | priv->hwaddr[1];
laddr = priv->hwaddr[2] << 24 | priv->hwaddr[3] << 16 |
priv->hwaddr[4] << 8 | priv->hwaddr[5];
FTMAC100_OFFSET_MAC_MADR = maddr;
FTMAC100_OFFSET_MAC_LADR = laddr;
FTMAC100_OFFSET_MACCR = MACCR_ENABLE_ALL;
/* Set Rx, Tx interrupt handlers */
VICVectAddr25 = ( long ) vFtMac100_ISR_Wrapper;
/* Enable Rx, Tx interrupts */
FTMAC100_OFFSET_IMR = INT_MASK_ALL_ENABLED;
VICIRQMask |= ( 1 << 25 );
VICIRQMode &= ~( 1 << 25 );
VICIRQLevel &= ~( 1 << 25 );
}
/* Reset the task priority back to its original value. */
vTaskPrioritySet( NULL, uxOriginalPriority );
configASSERT( xStatus == ERR_OK );
}
static int ftmac100_start_hw(struct ftmac100 *priv)
{
struct net_device *netdev = priv->netdev;
if (ftmac100_reset(priv))
return -EIO;
/* setup ring buffer base registers */
ftmac100_set_rx_ring_base(priv,
priv->descs_dma_addr +
offsetof(struct ftmac100_descs, rxdes));
ftmac100_set_tx_ring_base(priv,
priv->descs_dma_addr +
offsetof(struct ftmac100_descs, txdes));
iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
ftmac100_set_mac(priv, netdev->dev_addr);
iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
return 0;
}
static int ftmac100_init (struct eth_device *dev, bd_t *bd)
{
struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase;
struct ftmac100_data *priv = dev->priv;
volatile struct ftmac100_txdes *txdes = priv->txdes;
volatile struct ftmac100_rxdes *rxdes = priv->rxdes;
unsigned int maccr;
int i;
debug ("%s()\n", __func__);
ftmac100_reset (dev);
/* set the ethernet address */
ftmac100_set_mac_from_env (dev);
/* disable all interrupts */
writel (0, &ftmac100->imr);
/* initialize descriptors */
priv->rx_index = 0;
txdes[0].txdes1 = FTMAC100_TXDES1_EDOTR;
rxdes[PKTBUFSRX - 1].rxdes1 = FTMAC100_RXDES1_EDORR;
for (i = 0; i < PKTBUFSRX; i++) {
/* RXBUF_BADR */
rxdes[i].rxdes2 = (unsigned int)NetRxPackets[i];
rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE (PKTSIZE_ALIGN);
rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN;
}
/* transmit ring */
writel ((unsigned int)txdes, &ftmac100->txr_badr);
/* receive ring */
writel ((unsigned int)rxdes, &ftmac100->rxr_badr);
/* poll receive descriptor automatically */
writel (FTMAC100_APTC_RXPOLL_CNT (1), &ftmac100->aptc);
/* enable transmitter, receiver */
maccr = FTMAC100_MACCR_XMT_EN |
FTMAC100_MACCR_RCV_EN |
FTMAC100_MACCR_XDMA_EN |
FTMAC100_MACCR_RDMA_EN |
FTMAC100_MACCR_CRC_APD |
FTMAC100_MACCR_ENRX_IN_HALFTX |
FTMAC100_MACCR_RX_RUNT |
FTMAC100_MACCR_RX_BROADPKT;
writel (maccr, &ftmac100->maccr);
return 0;
}
