/*!
* @brief FTM interrupt handler.
*/
void BOARD_FTM_IRQ_HANDLER(void)
{
// The overflow interrupt is the start of each cycle and is handled first.
if(FTM_HAL_HasTimerOverflowed(BOARD_FTM_BASE))
{
// Clear the interrupt.
FTM_HAL_ClearTimerOverflow(BOARD_FTM_BASE);
// Update LED state/duty cycle for the X-axis.
FTM_HAL_SetChnCountVal(BOARD_FTM_BASE, BOARD_FTM_X_CHANNEL, g_xValue);
// Only turn on the LED if the new duty cycle is not 0.
if(g_xValue)
{
LED3_ON;
FTM_HAL_EnableChnInt(BOARD_FTM_BASE, BOARD_FTM_X_CHANNEL);
}
else
{
LED3_OFF;
FTM_HAL_DisableChnInt(BOARD_FTM_BASE, BOARD_FTM_X_CHANNEL);
}
// Update LED state/duty cycle for the Y-axis.
FTM_HAL_SetChnCountVal(BOARD_FTM_BASE, BOARD_FTM_Y_CHANNEL, g_yValue);
// Only turn on the LED if the new duty cycle is not 0.
if(g_yValue)
{
LED2_ON;
FTM_HAL_EnableChnInt(BOARD_FTM_BASE, BOARD_FTM_Y_CHANNEL);
}
else
{
LED2_OFF;
FTM_HAL_DisableChnInt(BOARD_FTM_BASE, BOARD_FTM_Y_CHANNEL);
}
// Perform a software sync to update the counter registers.
FTM_HAL_SetSoftwareTriggerCmd(BOARD_FTM_BASE, true);
}
// X-axis match: Clear interrupt and turn LED off.
if(FTM_HAL_HasChnEventOccurred(BOARD_FTM_BASE, BOARD_FTM_X_CHANNEL))
{
FTM_HAL_ClearChnEventFlag(BOARD_FTM_BASE, BOARD_FTM_X_CHANNEL);
LED3_OFF;
}
// Y-axis match: Clear interrupt and turn LED off.
if(FTM_HAL_HasChnEventOccurred(BOARD_FTM_BASE, BOARD_FTM_Y_CHANNEL))
{
FTM_HAL_ClearChnEventFlag(BOARD_FTM_BASE, BOARD_FTM_Y_CHANNEL);
LED2_OFF;
}
}
/*************************************************************************
* Function Name: FTM2_init
* Parameters: none
* Return: none
* Description: FlexTimer 2 initialization
*************************************************************************/
void FTM2_init(void)
{
FTM_HAL_SetWriteProtectionCmd(FTM2_BASE_PTR, false);//false: Write-protection is disabled
FTM_HAL_Enable(FTM2_BASE_PTR, true);//true: all registers including FTM-specific registers are available
FTM_HAL_SetMod(FTM2_BASE_PTR, (uint16_t)0xffff);// Free running timer
FTM_HAL_SetClockSource(FTM2_BASE_PTR, kClock_source_FTM_SystemClk);//clock The FTM peripheral clock selection\n
FTM_HAL_SetClockPs(FTM2_BASE_PTR, kFtmDividedBy2); // system clock, divide by 2
FTM_HAL_EnableChnInt(FTM2_BASE_PTR, 0);//Enables the FTM peripheral timer channel(n) interrupt.
FTM_HAL_SetChnMSnBAMode(FTM2_BASE_PTR, 0, 1);//Sets the FTM peripheral timer channel mode.
INT_SYS_EnableIRQ(FTM2_IRQn);
set_irq_priority(FTM2_IRQn, ISR_PRIORITY_SLOW_TIMER);
}
static void ResetFTM(uint32_t instance) {
FTM_Type *ftmBase = g_ftmBase[instance];
uint8_t channel;
/* reset all values */
FTM_HAL_SetCounter(ftmBase, 0); /* reset FTM counter */
FTM_HAL_ClearTimerOverflow(ftmBase); /* clear timer overflow flag (if any) */
for(channel=0; channel<NOF_FTM_CHANNELS; channel++) {
FTM_HAL_ClearChnEventFlag(ftmBase, channel); /* clear channel flag */
FTM_HAL_SetChnDmaCmd(ftmBase, channel, true); /* enable DMA request */
FTM_HAL_EnableChnInt(ftmBase, channel); /* enable channel interrupt: need to have both DMA and CHnIE set for DMA transfers! See RM 40.4.23 */
}
}
