static inline void __set_direction(unsigned pin, int input) { u32 u; u = readl(GPIO_IO_CONF(pin)); if (input) u |= 1 << (pin & 31); else u &= ~(1 << (pin & 31)); writel(u, GPIO_IO_CONF(pin)); }
static int gpio_irq_set_type(u32 irq, u32 type) { int pin = irq_to_gpio(irq); struct irq_desc *desc; u32 u; u = readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31)); if (!u) { printk(KERN_ERR "orion gpio_irq_set_type failed " "(irq %d, pin %d).\n", irq, pin); return -EINVAL; } desc = irq_desc + irq; /* * Set edge/level type. */ if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { desc->handle_irq = handle_edge_irq; } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { desc->handle_irq = handle_level_irq; } else { printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type); return -EINVAL; } /* * Configure interrupt polarity. */ if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH) { u = readl(GPIO_IN_POL(pin)); u &= ~(1 << (pin & 31)); writel(u, GPIO_IN_POL(pin)); } else if (type == IRQ_TYPE_EDGE_FALLING || type == IRQ_TYPE_LEVEL_LOW) { u = readl(GPIO_IN_POL(pin)); u |= 1 << (pin & 31); writel(u, GPIO_IN_POL(pin)); } else if (type == IRQ_TYPE_EDGE_BOTH) { u32 v; v = readl(GPIO_IN_POL(pin)) ^ readl(GPIO_DATA_IN(pin)); /* * set initial polarity based on current input level */ u = readl(GPIO_IN_POL(pin)); if (v & (1 << (pin & 31))) u |= 1 << (pin & 31); /* falling */ else u &= ~(1 << (pin & 31)); /* rising */ writel(u, GPIO_IN_POL(pin)); } desc->status = (desc->status & ~IRQ_TYPE_SENSE_MASK) | type; return 0; }
int kw_gpio_get_value(unsigned pin) { int val; if (readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31))) val = readl(GPIO_DATA_IN(pin)) ^ readl(GPIO_IN_POL(pin)); else val = readl(GPIO_OUT(pin)); return (val >> (pin & 31)) & 1; }
static int orion_gpio_get_value(struct gpio_chip *chip, unsigned pin) { int val; if (readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31))) val = readl(GPIO_DATA_IN(pin)) ^ readl(GPIO_IN_POL(pin)); else val = readl(GPIO_OUT(pin)); return (val >> (pin & 31)) & 1; }