/********************************************************************//**
* @brief Initializes the I2Cx peripheral with specified parameter.
* @param[in] I2Cx I2C peripheral selected, should be
* - LPC_I2C0
* - LPC_I2C1
* - LPC_I2C2
* @param[in] clockrate Target clock rate value to initialized I2C
* peripheral (Hz)
* @return None
*********************************************************************/
void I2C_Init(en_I2C_unitId i2cId, uint32_t clockrate)
{
uint32_t clkSetting;
LPC_I2C_TypeDef* I2Cx = I2C_GetPointer(i2cId);
switch (i2cId)
{
case I2C_0:
clkSetting = CLKPWR_PCONP_PCI2C0;
break;
case I2C_1:
clkSetting = CLKPWR_PCONP_PCI2C1;
break;
case I2C_2:
clkSetting = CLKPWR_PCONP_PCI2C2;
break;
default:
return;
}
CLKPWR_ConfigPPWR (clkSetting, ENABLE);
/* Set clock rate */
I2C_SetClock(I2Cx,clockrate);
/* Set I2C operation to default */
I2Cx->CONCLR = (I2C_I2CONCLR_AAC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_I2ENC);
}
/********************************************************************//**
* @brief Initializes the i2c peripheral with specified parameter.
* @param[in] i2c I2C peripheral
* @param[in] clockrate Target clock rate value to initialized I2C
* peripheral
* @return None
*********************************************************************/
void I2C_Init(LPC_I2C_Type *i2c, uint32_t clockrate)
{
LPC_SYSCON->PRESETCTRL |= (0x1<<1);
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<5);
/* Set clock rate */
I2C_SetClock(i2c, clockrate);
/* Set I2C operation to default */
i2c->CONCLR = (I2C_I2CONCLR_AAC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_I2ENC);
}
bool I2C_InitMaster(I2C_CHANNEL eCh, I2C_PRESCALER ePrescaler, unsigned int nPrescaler)
{
I2C_SetGPIO(eCh, TRUE);
I2C_SetClock(eCh, ePrescaler, nPrescaler);
I2C_SetFilter(eCh, TRUE);
// I2C_SetOutputDelay(eCh, 0x0);
I2C_SetAckGeneration(eCh, FALSE);
return TRUE;
}
bool I2C_InitSlave(I2C_CHANNEL eCh, unsigned int uSlaveAddr, I2C_PRESCALER ePrescaler, unsigned int nPrescaler)
{
I2C_SetGPIO(eCh, TRUE);
I2C_SetClock(eCh, ePrescaler, nPrescaler);
I2C_SetSlaveAddress(eCh, uSlaveAddr);
I2C_SetFilter(eCh, TRUE);
// I2C_SetOutputDelay(eCh, 0x0);
I2C_SetAckGeneration(eCh, TRUE);
return TRUE;
}
/**
* @brief Initializes the i2c peripheral with specified parameter.
*
* @param i2C_InitStruct: pointer to a I2C_InitStruct structure that
* contains the configuration information for the I2C peripheral.
* @retval None
*/
void I2C_Init(I2C_InitTypeDef* I2C_InitStuct)
{
CHECK_PARAM(PARAM_I2C_MODE(I2C_InitStuct->Mode));
CHECK_PARAM(PARAM_I2C_INTERRUPT_MODE(I2C_InitStuct->InterruptMode));
/* Enable I2C clock and de-assert reset */
LPC_SYSCON->PRESETCTRL |= (0x1<<1);
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<5);
/* I2C I/O config */
LPC_IOCON->PIO0_10 &= ~0x3F; /* I2C I/O config */
LPC_IOCON->PIO0_10 |= 0x02; /* I2C SCL */
LPC_IOCON->PIO0_11 &= ~0x3F;
LPC_IOCON->PIO0_11 |= 0x02; /* I2C SDA */
/*--- Clear flags ---*/
LPC_I2C->CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_I2ENC;
/*--- Enable Ture Open Drain mode ---*/
LPC_IOCON->PIO0_10 |= (0x1<<10);
LPC_IOCON->PIO0_11 |= (0x1<<10);
/*--- Set Clock rate ---*/
I2C_SetClock( I2C_InitStuct -> ClockRate );
if ( I2C_InitStuct -> Mode == I2C_SLAVE )
{
LPC_I2C->ADR0 = I2C_InitStuct -> SlaveAddress;
}
/* Enable the I2C Interrupt */
if (I2C_InitStuct -> InterruptMode == I2C_INTERRUPT_MODE )
{
NVIC_EnableIRQ(I2C_IRQn);
}
else if (I2C_InitStuct -> InterruptMode == I2C_POLLING_MODE )
{
NVIC_DisableIRQ(I2C_IRQn); /* Disable the I2C Interrupt */
}
if ( I2C_InitStuct -> Mode == I2C_MASTER )
{
LPC_I2C->CONSET = I2C_I2CONSET_I2EN;
}
else if (I2C_InitStuct -> Mode == I2C_SLAVE)
{
LPC_I2C->CONSET = I2C_I2CONSET_I2EN | I2C_I2CONSET_SI;
}
}
/********************************************************************//**
* @brief Initializes the I2Cx peripheral with specified parameter.
* @param[in] I2Cx I2C peripheral selected, should be I2C0, I2C1 or I2C2
* @param[in] clockrate Target clock rate value to initialized I2C
* peripheral
* @return None
*********************************************************************/
void I2C_Init(LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
{
//CHECK_PARAM(PARAM_I2Cx(I2Cx));
if (I2Cx==LPC_I2C0)
{
/* Set up clock and power for I2C0 module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C0, ENABLE);
/* As default, peripheral clock for I2C0 module
* is set to FCCLK / 2 */
CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C0, CLKPWR_PCLKSEL_CCLK_DIV_2);
}
else if (I2Cx==LPC_I2C1)
{
/* Set up clock and power for I2C1 module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C1, ENABLE);
/* As default, peripheral clock for I2C1 module
* is set to FCCLK / 2 */
CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C1, CLKPWR_PCLKSEL_CCLK_DIV_2);
}
else if (I2Cx==LPC_I2C2)
{
/* Set up clock and power for I2C2 module */
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C2, ENABLE);
/* As default, peripheral clock for I2C2 module
* is set to FCCLK / 2 */
CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C2, CLKPWR_PCLKSEL_CCLK_DIV_2);
}
else {
// Up-Support this device
return;
}
/* Set clock rate */
I2C_SetClock(I2Cx, clockrate);
/* Set I2C operation to default */
I2Cx->I2CONCLR = (I2C_I2CONCLR_AAC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_I2ENC);
}
portBASE_TYPE FreeRTOS_I2C_ioctl( Peripheral_Descriptor_t const pxPeripheral, uint32_t ulRequest, void *pvValue )
{
Peripheral_Control_t * const pxPeripheralControl = ( Peripheral_Control_t * const ) pxPeripheral;
uint32_t ulValue = ( uint32_t ) pvValue;
const int8_t cPeripheralNumber = diGET_PERIPHERAL_NUMBER( ( ( Peripheral_Control_t * const ) pxPeripheral ) );
portBASE_TYPE xReturn = pdPASS;
LPC_I2C_TypeDef * pxI2C = ( LPC_I2C_TypeDef * ) diGET_PERIPHERAL_BASE_ADDRESS( ( ( Peripheral_Control_t * const ) pxPeripheral ) );
/* Sanity check the array index. */
configASSERT( cPeripheralNumber < ( int8_t ) ( sizeof( xIRQ ) / sizeof( IRQn_Type ) ) );
taskENTER_CRITICAL();
{
switch( ulRequest )
{
case ioctlSET_I2C_SLAVE_ADDRESS :
ucSlaveAddresses[ cPeripheralNumber ] = ( uint8_t ) ulValue;
break;
case ioctlUSE_INTERRUPTS :
if( ulValue == pdFALSE )
{
NVIC_DisableIRQ( xIRQ[ cPeripheralNumber ] );
}
else
{
/* Ensure the interrupt is not already enabled. */
I2C_IntCmd( pxI2C, DISABLE );
/* Clear any pending interrupts in the peripheral and
NVIC. */
pxI2C->I2CONCLR = I2C_I2CONCLR_SIC;
NVIC_ClearPendingIRQ( xIRQ[ cPeripheralNumber ] );
/* Set the priority of the interrupt to the minimum
interrupt priority. A separate command can be issued to
raise the priority if desired. The interrupt is only
enabled when a transfer is started. */
NVIC_SetPriority( xIRQ[ cPeripheralNumber ], configMIN_LIBRARY_INTERRUPT_PRIORITY );
/* Remember the transfer control structure that should
be used for Rx. A reference to the Tx transfer control
structure is taken when a write() operation is actually
performed. */
pxRxTransferControlStructs[ cPeripheralNumber ] = pxPeripheralControl->pxRxControl;
}
break;
case ioctlSET_SPEED :
/* Set up the default I2C configuration. */
I2C_SetClock( pxI2C, ulValue );
break;
case ioctlSET_INTERRUPT_PRIORITY :
/* The ISR uses ISR safe FreeRTOS API functions, so the priority
being set must be lower than or equal to (ie numerically larger
than or equal to) configMAX_LIBRARY_INTERRUPT_PRIORITY. */
configASSERT( ulValue >= configMAX_LIBRARY_INTERRUPT_PRIORITY );
NVIC_SetPriority( xIRQ[ cPeripheralNumber ], ulValue );
break;
default :
xReturn = pdFAIL;
break;
}
}
taskEXIT_CRITICAL();
return xReturn;
}