// Is called for every instruction and instruments reads and writes
VOID Instruction(INS ins, VOID *v)
{
BOOL hasReadSegmentedMemAccess = FALSE;
BOOL hasWriteSegmentedMemAccess = FALSE;
if (INS_SegmentRegPrefix(ins) == TESTED_SEG_REG)
//INS_OperandMemorySegmentReg, INS_SegPrefixIsMemoryRead, INS_OperandMemoryDisplacement
{
if (INS_IsMemoryRead(ins))
{
HandleAccess (ins, TRUE /* isRead*/, &hasReadSegmentedMemAccess) ;
}
if (INS_IsMemoryWrite(ins))
{
HandleAccess (ins, FALSE /* isRead*/, &hasWriteSegmentedMemAccess);
}
if (!hasReadSegmentedMemAccess && !hasWriteSegmentedMemAccess)
{
fprintf(trace, "**ERROR SegMemAccess-Lies %p %s\n", INS_Address(ins), INS_Disassemble(ins).c_str());
hadError = TRUE;
}
}
/*fprintf(trace, "%p %s\n", INS_Address(ins), INS_Disassemble(ins).c_str());
fflush (trace);*/
}
void Instruction(INS ins, VOID *v)
{
RTN rtn = INS_Rtn(ins);
if (RTN_Valid(rtn) && ((RTN_Name(rtn) == "SegAccessRtn") || (RTN_Name(rtn) == "SegAccessStrRtn")))
{
REG segReg = INS_SegmentRegPrefix(ins);
if ((segReg != REG_SEG_GS) && (segReg != REG_SEG_FS))
return;
REG baseReg = (segReg == REG_SEG_GS)? REG_SEG_GS_BASE : REG_SEG_FS_BASE;
for (UINT32 memopIdx=0; memopIdx<INS_MemoryOperandCount(ins); memopIdx++)
{
REG scratchReg = REG(int(REG_INST_G0)+memopIdx);
INS_RewriteMemoryOperand(ins, memopIdx, scratchReg);
INS_InsertCall(ins, IPOINT_BEFORE,
AFUNPTR(ProcessAddress),
IARG_REG_VALUE,
baseReg,
IARG_MEMORYOP_EA, memopIdx,
IARG_INST_PTR,
IARG_RETURN_REGS, scratchReg, IARG_END);
}
}
}
INT32 RecordRegisters(BBL bbl,
UINT16 * stats,
UINT32 max_stats)
{
UINT32 count = 0;
for (INS ins = BBL_InsHead(bbl); INS_Valid(ins); ins = INS_Next(ins))
{
if (count >= max_stats)
{
cerr << "Too many stats in this block" << endl;
exit(1);
}
bool rmem = INS_IsMemoryRead(ins) || INS_HasMemoryRead2(ins);
bool wmem = INS_IsMemoryWrite(ins);
bool rw_mem = rmem & wmem;
if (rw_mem)
stats[count++] = PATTERN_MEM_RW;
else if (rmem)
stats[count++] = PATTERN_MEM_R;
else if (wmem)
stats[count++] = PATTERN_MEM_W;
else if (INS_SegmentRegPrefix(ins) != REG_INVALID())
stats[count++] = PATTERN_NO_MEM_LIES;
else
stats[count++] = PATTERN_NO_MEM;
}
stats[count++] = 0;
return count;
}
static VOID Instruction(INS ins, VOID *v)
{
IARG_TYPE ea;
if (INS_SegmentPrefix(ins))
{
if (INS_IsMemoryRead(ins))
ea = IARG_MEMORYREAD_EA;
else
ea = IARG_MEMORYWRITE_EA;
INS_InsertCall(ins, IPOINT_BEFORE, AFUNPTR(OnSegReference), IARG_UINT32, INS_SegmentRegPrefix(ins),
IARG_REG_VALUE, INS_SegmentRegPrefix(ins), IARG_INST_PTR, IARG_THREAD_ID, ea, IARG_END);
}
REG seg;
if (WritesSegment(ins, &seg))
{
INS_InsertCall(ins, IPOINT_AFTER, AFUNPTR(OnSegWrite), IARG_UINT32, seg, IARG_REG_VALUE, seg,
IARG_INST_PTR, IARG_THREAD_ID, IARG_END);
}
}
void Instruction(INS ins, VOID *v)
{
RTN rtn = INS_Rtn(ins);
if (RTN_Valid(rtn) && ((RTN_Name(rtn) == "SegAccessRtn") || (RTN_Name(rtn) == "SegAccessStrRtn")))
{
REG segReg = INS_SegmentRegPrefix(ins);
if ((segReg != REG_SEG_GS) && (segReg != REG_SEG_FS))
return;
REG baseReg = (segReg == REG_SEG_GS)? REG_SEG_GS_BASE : REG_SEG_FS_BASE;
if (INS_RewriteMemoryAddressingToBaseRegisterOnly(ins, MEMORY_TYPE_READ, REG_INST_G0))
{
INS_InsertCall(ins, IPOINT_BEFORE,
AFUNPTR(ProcessAddress),
IARG_REG_VALUE,
baseReg,
IARG_MEMORYREAD_EA,
IARG_INST_PTR,
IARG_RETURN_REGS, REG_INST_G0, IARG_END);
}
if (INS_RewriteMemoryAddressingToBaseRegisterOnly(ins, MEMORY_TYPE_WRITE, REG_INST_G1))
{
INS_InsertCall(ins, IPOINT_BEFORE,
AFUNPTR(ProcessAddress),
IARG_REG_VALUE,
baseReg,
IARG_MEMORYWRITE_EA,
IARG_INST_PTR,
IARG_RETURN_REGS, REG_INST_G1, IARG_END);
}
if (INS_RewriteMemoryAddressingToBaseRegisterOnly(ins, MEMORY_TYPE_READ2, REG_INST_G2))
{
INS_InsertCall(ins, IPOINT_BEFORE,
AFUNPTR(ProcessAddress),
IARG_REG_VALUE,
baseReg,
IARG_MEMORYREAD2_EA,
IARG_INST_PTR,
IARG_RETURN_REGS, REG_INST_G2, IARG_END);
}
}
}
// Is called for every instruction and instruments reads and writes
VOID Instruction(INS ins, VOID *v)
{
BOOL readsMemory, writesMemory, hasReadSegmentedMemAccess, hasWriteSegmentedMemAccess;
if (INS_EffectiveAddressWidth(ins)==16)
{
if (INS_SegmentRegPrefix(ins) == TESTED_SEG_REG)
{
readsMemory = INS_SegPrefixIsMemoryRead(ins);
writesMemory = INS_SegPrefixIsMemoryWrite(ins);
if(readsMemory)
{
if (INS_IsMemoryRead(ins))
{
HandleSegmentedAccess (ins, TRUE /* isRead*/, &hasReadSegmentedMemAccess) ;
}
}
if (writesMemory)
{
if (INS_IsMemoryWrite(ins))
{
HandleSegmentedAccess (ins, FALSE /* isRead*/, &hasWriteSegmentedMemAccess);
}
}
if (!hasReadSegmentedMemAccess && !hasWriteSegmentedMemAccess)
{
fprintf(trace, "**ERROR SegMemAccess-Lies %p %s\n", INS_Address(ins), INS_Disassemble(ins).c_str());
hadError = TRUE;
}
else
{
fprintf (trace, "Instrumented ins: %x %s\n",
INS_Address(ins), INS_Disassemble(ins).c_str());
}
fflush(trace);
}
else if (INS_IsMemoryRead(ins) || INS_IsMemoryWrite(ins))
{
fprintf (trace, "Instrumented ins: %x %s\n",
INS_Address(ins), INS_Disassemble(ins).c_str());
fflush (trace);
HandleAccess (ins, INS_IsMemoryRead(ins)) ;
}
}
#ifndef TARGET_LINUX
UINT32 operandCount = INS_OperandCount (ins);
UINT32 i;
for (i=0; i<operandCount; i++)
{
if (INS_OperandIsReg (ins, i) && REG_is_seg(INS_OperandReg (ins, i)) && INS_OperandWritten(ins, i))
{
fprintf(trace, "**ERROR SegOperand-WRITE, not supported %p %s\n", INS_Address(ins), INS_Disassemble(ins).c_str());
fflush(trace);
hadError = TRUE;
}
}
#endif
/*fprintf(trace, "%p %s\n", INS_Address(ins), INS_Disassemble(ins).c_str());
fflush (trace);*/
}