void InitEncoders() { CM_ICLKEN_PER|=EN_GPIO6|EN_GPIO5; GPIO5_CTRL=2; SetPadMultiplexer(PADNUM_BEAGLE_EXT_3,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); SetPadMultiplexer(PADNUM_BEAGLE_EXT_4,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); SetPadMultiplexer(PADNUM_BEAGLE_EXT_4_ALT,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); SetPadMultiplexer(PADNUM_BEAGLE_EXT_5,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); SetPadMultiplexer(PADNUM_BEAGLE_EXT_6,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); SetPadMultiplexer(PADNUM_BEAGLE_EXT_6_ALT,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); SetPadMultiplexer(PADNUM_BEAGLE_EXT_7,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); SetPadMultiplexer(PADNUM_BEAGLE_EXT_8,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); SetPadMultiplexer(PADNUM_BEAGLE_EXT_9,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); SetPadMultiplexer(PADNUM_BEAGLE_EXT_10,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); SetPadMultiplexer(PADNUM_BEAGLE_EXT_10_ALT,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); SetPadMultiplexer(PADNUM_BEAGLE_EXT_15,PADCONF_MODE_4|PADCONF_INPUTENABLE|PADCONF_PULLUDENABLE|PADCONF_PULLTYPESELECT); GPIO5_OE|=(1<<5)|(1<<8)|(1<<9)|(1<<10)|(1<<13)|(1<<15)|(1<<17) | (1<<11)|(1<<12)|(1<<14)|(1<<16)|(1<<18); GPIO5_FALLINGDETECT|=(1<<5)|(1<<8)|(1<<9)|(1<<10)|(1<<13)|(1<<15)|(1<<17); GPIO5_RISINGDETECT|=(1<<5)|(1<<8)|(1<<9)|(1<<10)|(1<<13)|(1<<15)|(1<<17); GPIO5_SETIRQENABLE1=(1<<5)|(1<<8)|(1<<9)|(1<<10)|(1<<13)|(1<<15)|(1<<17); INTCPS_MIR_CLEAR(1)=(1<<1); SetIRQHandler(33,Handler); EnableInterrupts(); for(int i=0;i<3;i++) { position[i]=lastposition[i]=0; fullposition[i]=3; lastdirection[i]=0; } }
VOID EnableInterruptSource ( VOID ) { UINTN Bank; UINTN Bit; // Map vector to FIQ, IRQ is default MmioWrite32 (INTCPS_ILR (gVector), 1); Bank = gVector / 32; Bit = 1UL << (gVector % 32); MmioWrite32 (INTCPS_MIR_CLEAR(Bank), Bit); }
/** Enable interrupt source Source. @param This Instance pointer for this protocol @param Source Hardware source of the interrupt @retval EFI_SUCCESS Source interrupt enabled. @retval EFI_DEVICE_ERROR Hardware could not be programmed. **/ EFI_STATUS EFIAPI EnableInterruptSource ( IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This, IN HARDWARE_INTERRUPT_SOURCE Source ) { UINTN Bank; UINTN Bit; if (Source > MAX_VECTOR) { ASSERT(FALSE); return EFI_UNSUPPORTED; } Bank = Source / 32; Bit = 1UL << (Source % 32); MmioWrite32 (INTCPS_MIR_CLEAR(Bank), Bit); return EFI_SUCCESS; }