static int ks8695_irq_set_type(unsigned int irqno, unsigned int type) { unsigned long ctrl, mode; unsigned short level_triggered = 0; ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC); switch (type) { case IRQT_HIGH: mode = IOPC_TM_HIGH; level_triggered = 1; break; case IRQT_LOW: mode = IOPC_TM_LOW; level_triggered = 1; break; case IRQT_RISING: mode = IOPC_TM_RISING; break; case IRQT_FALLING: mode = IOPC_TM_FALLING; break; case IRQT_BOTHEDGE: mode = IOPC_TM_EDGE; break; default: return -EINVAL; } switch (irqno) { case KS8695_IRQ_EXTERN0: ctrl &= ~IOPC_IOEINT0TM; ctrl |= IOPC_IOEINT0_MODE(mode); break; case KS8695_IRQ_EXTERN1: ctrl &= ~IOPC_IOEINT1TM; ctrl |= IOPC_IOEINT1_MODE(mode); break; case KS8695_IRQ_EXTERN2: ctrl &= ~IOPC_IOEINT2TM; ctrl |= IOPC_IOEINT2_MODE(mode); break; case KS8695_IRQ_EXTERN3: ctrl &= ~IOPC_IOEINT3TM; ctrl |= IOPC_IOEINT3_MODE(mode); break; default: return -EINVAL; } if (level_triggered) { set_irq_chip(irqno, &ks8695_irq_level_chip); set_irq_handler(irqno, handle_level_irq); } else { set_irq_chip(irqno, &ks8695_irq_edge_chip); set_irq_handler(irqno, handle_edge_irq); } __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC); return 0; }
static int ks8695_irq_set_type(struct irq_data *d, unsigned int type) { unsigned long ctrl, mode; unsigned short level_triggered = 0; ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC); switch (type) { case IRQ_TYPE_LEVEL_HIGH: mode = IOPC_TM_HIGH; level_triggered = 1; break; case IRQ_TYPE_LEVEL_LOW: mode = IOPC_TM_LOW; level_triggered = 1; break; case IRQ_TYPE_EDGE_RISING: mode = IOPC_TM_RISING; break; case IRQ_TYPE_EDGE_FALLING: mode = IOPC_TM_FALLING; break; case IRQ_TYPE_EDGE_BOTH: mode = IOPC_TM_EDGE; break; default: return -EINVAL; } switch (d->irq) { case KS8695_IRQ_EXTERN0: ctrl &= ~IOPC_IOEINT0TM; ctrl |= IOPC_IOEINT0_MODE(mode); break; case KS8695_IRQ_EXTERN1: ctrl &= ~IOPC_IOEINT1TM; ctrl |= IOPC_IOEINT1_MODE(mode); break; case KS8695_IRQ_EXTERN2: ctrl &= ~IOPC_IOEINT2TM; ctrl |= IOPC_IOEINT2_MODE(mode); break; case KS8695_IRQ_EXTERN3: ctrl &= ~IOPC_IOEINT3TM; ctrl |= IOPC_IOEINT3_MODE(mode); break; default: return -EINVAL; } if (level_triggered) { irq_set_chip_and_handler(d->irq, &ks8695_irq_level_chip, handle_level_irq); } else { irq_set_chip_and_handler(d->irq, &ks8695_irq_edge_chip, handle_edge_irq); } __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC); return 0; }