static inline void uart_stm32_set_parity(struct device *dev, u32_t parity)
{
USART_TypeDef *UartInstance = UART_STRUCT(dev);
#ifdef CONFIG_LPUART_1
if (IS_LPUART_INSTANCE(UartInstance)) {
LL_LPUART_SetParity(UartInstance, parity);
} else {
LL_USART_SetParity(UartInstance, parity);
}
#else
LL_USART_SetParity(UartInstance, parity);
#endif /* CONFIG_LPUART_1 */
}
static inline u32_t uart_stm32_get_databits(struct device *dev)
{
USART_TypeDef *UartInstance = UART_STRUCT(dev);
#ifdef CONFIG_LPUART_1
if (IS_LPUART_INSTANCE(UartInstance)) {
return LL_LPUART_GetDataWidth(UartInstance);
} else {
return LL_USART_GetDataWidth(UartInstance);
}
#else
return LL_USART_GetDataWidth(UartInstance);
#endif /* CONFIG_LPUART_1 */
}
static inline void uart_stm32_set_databits(struct device *dev, u32_t databits)
{
USART_TypeDef *UartInstance = UART_STRUCT(dev);
#ifdef CONFIG_LPUART_1
if (IS_LPUART_INSTANCE(UartInstance)) {
LL_LPUART_SetDataWidth(UartInstance, databits);
} else {
LL_USART_SetDataWidth(UartInstance, databits);
}
#else
LL_USART_SetDataWidth(UartInstance, databits);
#endif /* CONFIG_LPUART_1 */
}
static inline void uart_stm32_set_baudrate(struct device *dev, u32_t baud_rate)
{
const struct uart_stm32_config *config = DEV_CFG(dev);
struct uart_stm32_data *data = DEV_DATA(dev);
USART_TypeDef *UartInstance = UART_STRUCT(dev);
u32_t clock_rate;
/* Get clock rate */
clock_control_get_rate(data->clock,
(clock_control_subsys_t *)&config->pclken,
&clock_rate);
#ifdef CONFIG_LPUART_1
if (IS_LPUART_INSTANCE(UartInstance)) {
LL_LPUART_SetBaudRate(UartInstance,
clock_rate,
#ifdef USART_PRESC_PRESCALER
LL_USART_PRESCALER_DIV1,
#endif
baud_rate);
} else {
#endif /* CONFIG_LPUART_1 */
LL_USART_SetBaudRate(UartInstance,
clock_rate,
#ifdef USART_PRESC_PRESCALER
LL_USART_PRESCALER_DIV1,
#endif
#ifdef USART_CR1_OVER8
LL_USART_OVERSAMPLING_16,
#endif
baud_rate);
#ifdef CONFIG_LPUART_1
}
#endif /* CONFIG_LPUART_1 */
}
/**
* @brief De-initialize LPUART registers (Registers restored to their default values).
* @param LPUARTx LPUART Instance
* @retval An ErrorStatus enumeration value:
* - SUCCESS: LPUART registers are de-initialized
* - ERROR: not applicable
*/
ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx)
{
ErrorStatus status = SUCCESS;
/* Check the parameters */
assert_param(IS_LPUART_INSTANCE(LPUARTx));
if (LPUARTx == LPUART1)
{
/* Force reset of LPUART peripheral */
LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_LPUART1);
/* Release reset of LPUART peripheral */
LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_LPUART1);
}
else
{
status = ERROR;
}
return (status);
}
static inline void uart_stm32_set_baudrate(struct device *dev, u32_t baud_rate)
{
const struct uart_stm32_config *config = DEV_CFG(dev);
struct uart_stm32_data *data = DEV_DATA(dev);
#ifdef CONFIG_LPUART_1
USART_TypeDef *UartInstance = UART_STRUCT(dev);
#endif
u32_t clock_rate;
/* Get clock rate */
clock_control_get_rate(data->clock,
(clock_control_subsys_t *)&config->pclken,
&clock_rate);
#ifdef CONFIG_LPUART_1
if (IS_LPUART_INSTANCE(UartInstance)) {
uart_stm32_lpuart_set_baud_rate(dev, clock_rate, baud_rate);
} else {
uart_stm32_usart_set_baud_rate(dev, clock_rate, baud_rate);
}
#else
uart_stm32_usart_set_baud_rate(dev, clock_rate, baud_rate);
#endif
}
/**
* @brief Initialize LPUART registers according to the specified
* parameters in LPUART_InitStruct.
* @note As some bits in LPUART configuration registers can only be written when the LPUART is disabled (USART_CR1_UE bit =0),
* LPUART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
* @note Baud rate value stored in LPUART_InitStruct BaudRate field, should be valid (different from 0).
* @param LPUARTx LPUART Instance
* @param LPUART_InitStruct pointer to a @ref LL_LPUART_InitTypeDef structure
* that contains the configuration information for the specified LPUART peripheral.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: LPUART registers are initialized according to LPUART_InitStruct content
* - ERROR: Problem occurred during LPUART Registers initialization
*/
ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct)
{
ErrorStatus status = ERROR;
uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
/* Check the parameters */
assert_param(IS_LPUART_INSTANCE(LPUARTx));
assert_param(IS_LL_LPUART_BAUDRATE(LPUART_InitStruct->BaudRate));
assert_param(IS_LL_LPUART_DATAWIDTH(LPUART_InitStruct->DataWidth));
assert_param(IS_LL_LPUART_STOPBITS(LPUART_InitStruct->StopBits));
assert_param(IS_LL_LPUART_PARITY(LPUART_InitStruct->Parity));
assert_param(IS_LL_LPUART_DIRECTION(LPUART_InitStruct->TransferDirection));
assert_param(IS_LL_LPUART_HWCONTROL(LPUART_InitStruct->HardwareFlowControl));
/* LPUART needs to be in disabled state, in order to be able to configure some bits in
CRx registers. Otherwise (LPUART not in Disabled state) => return ERROR */
if (LL_LPUART_IsEnabled(LPUARTx) == 0U)
{
/*---------------------------- LPUART CR1 Configuration -----------------------
* Configure LPUARTx CR1 (LPUART Word Length, Parity and Transfer Direction bits) with parameters:
* - DataWidth: USART_CR1_M bits according to LPUART_InitStruct->DataWidth value
* - Parity: USART_CR1_PCE, USART_CR1_PS bits according to LPUART_InitStruct->Parity value
* - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to LPUART_InitStruct->TransferDirection value
*/
MODIFY_REG(LPUARTx->CR1,
(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE),
(LPUART_InitStruct->DataWidth | LPUART_InitStruct->Parity | LPUART_InitStruct->TransferDirection));
/*---------------------------- LPUART CR2 Configuration -----------------------
* Configure LPUARTx CR2 (Stop bits) with parameters:
* - Stop Bits: USART_CR2_STOP bits according to LPUART_InitStruct->StopBits value.
*/
LL_LPUART_SetStopBitsLength(LPUARTx, LPUART_InitStruct->StopBits);
/*---------------------------- LPUART CR3 Configuration -----------------------
* Configure LPUARTx CR3 (Hardware Flow Control) with parameters:
* - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to LPUART_InitStruct->HardwareFlowControl value.
*/
LL_LPUART_SetHWFlowCtrl(LPUARTx, LPUART_InitStruct->HardwareFlowControl);
/*---------------------------- LPUART BRR Configuration -----------------------
* Retrieve Clock frequency used for LPUART Peripheral
*/
periphclk = LL_RCC_GetLPUARTClockFreq(LL_RCC_LPUART1_CLKSOURCE);
/* Configure the LPUART Baud Rate :
- valid baud rate value (different from 0) is required
- Peripheral clock as returned by RCC service, should be valid (different from 0).
*/
if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
&& (LPUART_InitStruct->BaudRate != 0U))
{
status = SUCCESS;
LL_LPUART_SetBaudRate(LPUARTx,
periphclk,
LPUART_InitStruct->BaudRate);
/* Check BRR is greater than or equal to 0x300 */
assert_param(IS_LL_LPUART_BRR(LPUARTx->BRR));
}
}
return (status);
}
static int uart_stm32_configure(struct device *dev,
const struct uart_config *cfg)
{
struct uart_stm32_data *data = DEV_DATA(dev);
USART_TypeDef *UartInstance = UART_STRUCT(dev);
const u32_t parity = uart_stm32_cfg2ll_parity(cfg->parity);
const u32_t stopbits = uart_stm32_cfg2ll_stopbits(cfg->stop_bits);
const u32_t databits = uart_stm32_cfg2ll_databits(cfg->data_bits);
const u32_t flowctrl = uart_stm32_cfg2ll_hwctrl(cfg->flow_ctrl);
/* Hardware doesn't support mark or space parity */
if ((UART_CFG_PARITY_MARK == cfg->parity) ||
(UART_CFG_PARITY_SPACE == cfg->parity)) {
return -ENOTSUP;
}
#if defined(LL_USART_STOPBITS_0_5) && defined(CONFIG_LPUART_1)
if (IS_LPUART_INSTANCE(UartInstance) &&
UART_CFG_STOP_BITS_0_5 == cfg->stop_bits) {
return -ENOTSUP;
}
#else
if (UART_CFG_STOP_BITS_0_5 == cfg->stop_bits) {
return -ENOTSUP;
}
#endif
#if defined(LL_USART_STOPBITS_1_5) && defined(CONFIG_LPUART_1)
if (IS_LPUART_INSTANCE(UartInstance) &&
UART_CFG_STOP_BITS_1_5 == cfg->stop_bits) {
return -ENOTSUP;
}
#else
if (UART_CFG_STOP_BITS_1_5 == cfg->stop_bits) {
return -ENOTSUP;
}
#endif
/* Driver doesn't support 5 or 6 databits and potentially 7 or 9 */
if ((UART_CFG_DATA_BITS_5 == cfg->data_bits) ||
(UART_CFG_DATA_BITS_6 == cfg->data_bits)
#ifndef LL_USART_DATAWIDTH_7B
|| (UART_CFG_DATA_BITS_7 == cfg->data_bits)
#endif /* LL_USART_DATAWIDTH_7B */
#ifndef LL_USART_DATAWIDTH_9B
|| (UART_CFG_DATA_BITS_9 == cfg->data_bits)
#endif /* LL_USART_DATAWIDTH_9B */
) {
return -ENOTSUP;
}
/* Driver supports only RTS CTS flow control */
if (UART_CFG_FLOW_CTRL_NONE != cfg->flow_ctrl) {
if (!IS_UART_HWFLOW_INSTANCE(UartInstance) ||
UART_CFG_FLOW_CTRL_RTS_CTS != cfg->flow_ctrl) {
return -ENOTSUP;
}
}
LL_USART_Disable(UartInstance);
if (parity != uart_stm32_get_parity(dev)) {
uart_stm32_set_parity(dev, parity);
}
if (stopbits != uart_stm32_get_stopbits(dev)) {
uart_stm32_set_stopbits(dev, stopbits);
}
if (databits != uart_stm32_get_databits(dev)) {
uart_stm32_set_databits(dev, databits);
}
if (flowctrl != uart_stm32_get_hwctrl(dev)) {
uart_stm32_set_hwctrl(dev, flowctrl);
}
if (cfg->baudrate != data->baud_rate) {
uart_stm32_set_baudrate(dev, cfg->baudrate);
data->baud_rate = cfg->baudrate;
}
LL_USART_Enable(UartInstance);
return 0;
};
