static VOID
ReadChannelPlan(
IN PADAPTER Adapter,
IN u8* PROMContent,
IN BOOLEAN AutoLoadFail
)
{
#define EEPROM_TEST_CHANNEL_PLAN (0x7D)
#define EEPROM_NORMAL_CHANNEL_PLAN (0x75)
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
struct registry_priv *pregistrypriv = &Adapter->registrypriv;
u8 channelPlan;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
if(AutoLoadFail){
channelPlan = CHPL_FCC;
}
else{
#if (DEV_BUS_TYPE==DEV_BUS_USB_INTERFACE)
if(IS_NORMAL_CHIP(pHalData->VersionID))
channelPlan = PROMContent[EEPROM_NORMAL_CHANNEL_PLAN];
else
channelPlan = PROMContent[EEPROM_TEST_CHANNEL_PLAN];
#else
channelPlan = PROMContent[EEPROM_CHANNEL_PLAN];
#endif
}
if((pregistrypriv->channel_plan>= RT_CHANNEL_DOMAIN_MAX) || (channelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
{
pmlmepriv->ChannelPlan = _HalMapChannelPlan8192C(Adapter, (channelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
//pMgntInfo->bChnlPlanFromHW = (channelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? _TRUE : _FALSE; // User cannot change channel plan.
}
else
{
pmlmepriv->ChannelPlan = (RT_CHANNEL_DOMAIN)pregistrypriv->channel_plan;
}
#if 0 //todo:
switch(pMgntInfo->ChannelPlan)
{
case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
{
PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
pDot11dInfo->bEnabled = _TRUE;
}
//RT_TRACE(COMP_INIT, DBG_LOUD, ("Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
break;
}
#endif
//RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%ld)", pMgntInfo->RegChannelPlan, (u4Byte)channelPlan));
//RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
MSG_8192C("RT_ChannelPlan: 0x%02x\n", pmlmepriv->ChannelPlan);
}
//============================================================
// functions
//============================================================
static void Init_ODM_ComInfo_8723b(PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
u8 cut_ver,fab_ver;
//
// Init Value
//
_rtw_memset(pDM_Odm,0,sizeof(*pDM_Odm));
pDM_Odm->Adapter = Adapter;
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PLATFORM,ODM_CE);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,Adapter->interface_type);//RTL871X_HCI_TYPE
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PACKAGE_TYPE, pHalData->PackageType);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_IC_TYPE, ODM_RTL8723B);
fab_ver = ODM_TSMC;
cut_ver = ODM_CUT_A;
DBG_871X("%s(): fab_ver=%d cut_ver=%d\n", __func__, fab_ver, cut_ver);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_MP_TEST_CHIP,IS_NORMAL_CHIP(pHalData->VersionID));
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BOARD_TYPE,pHalData->BoardType);
if(pHalData->BoardType == BOARD_USB_High_PA){
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_LNA,_TRUE);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_PA,_TRUE);
}
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PATCH_ID,pHalData->CustomerID);
// ODM_CMNINFO_BINHCT_TEST only for MP Team
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BWIFI_TEST,Adapter->registrypriv.wifi_spec);
if(pHalData->rf_type == RF_1T1R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T1R);
}
else if(pHalData->rf_type == RF_2T2R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_2T2R);
}
else if(pHalData->rf_type == RF_1T2R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T2R);
}
#ifdef CONFIG_DISABLE_ODM
pdmpriv->InitODMFlag = 0;
#else
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK //|
;
//if(pHalData->AntDivCfg)
// pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
#endif
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag);
}
void dump_chip_info(HAL_VERSION ChipVersion)
{
if(IS_81XXC(ChipVersion)){
DBG_871X("Chip Version Info: %s_",IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C");
}
else if(IS_92D(ChipVersion)){
DBG_871X("Chip Version Info: CHIP_8192D_");
}
else if(IS_8723_SERIES(ChipVersion)){
DBG_871X("Chip Version Info: CHIP_8723A_");
}
else if(IS_8188E(ChipVersion)){
DBG_871X("Chip Version Info: CHIP_8188E_");
}
DBG_871X("%s_",IS_NORMAL_CHIP(ChipVersion)?"Normal_Chip":"Test_Chip");
DBG_871X("%s_",IS_CHIP_VENDOR_TSMC(ChipVersion)?"TSMC":"UMC");
if(IS_A_CUT(ChipVersion)) DBG_871X("A_CUT_");
else if(IS_B_CUT(ChipVersion)) DBG_871X("B_CUT_");
else if(IS_C_CUT(ChipVersion)) DBG_871X("C_CUT_");
else if(IS_D_CUT(ChipVersion)) DBG_871X("D_CUT_");
else if(IS_E_CUT(ChipVersion)) DBG_871X("E_CUT_");
else DBG_871X("UNKNOWN_CUT(%d)_",ChipVersion.CUTVersion);
if(IS_1T1R(ChipVersion)) DBG_871X("1T1R_");
else if(IS_1T2R(ChipVersion)) DBG_871X("1T2R_");
else if(IS_2T2R(ChipVersion)) DBG_871X("2T2R_");
else DBG_871X("UNKNOWN_RFTYPE(%d)_",ChipVersion.RFType);
DBG_871X("RomVer(%d)\n",ChipVersion.ROMVer);
}
static void _restore_network_status(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
unsigned short caps;
#if 1
//=======================================================
// reset related register of Beacon control
//set MSR to nolink
Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_);
// reject all data frame
rtw_write16(padapter, REG_RXFLTMAP2,0x00);
//reset TSF
rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
//disable update TSF
if(IS_NORMAL_CHIP(pHalData->VersionID))
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4));
else
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)|BIT(5));
//=======================================================
rtw_joinbss_reset(padapter);
set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
//pmlmeinfo->assoc_AP_vendor = maxAP;
if (padapter->registrypriv.wifi_spec) {
// for WiFi test, follow WMM test plan spec
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549);
// for WiFi test, mixed mode with intel STA under bg mode throughput issue
if (padapter->mlmepriv.htpriv.ht_option == 0)
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320);
} else {
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444);
}
//disable dynamic functions, such as high power, DIG
//Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
#endif
mlmeext_joinbss_event_callback(padapter);
//restore Sequence No.
rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn);
}
void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
enum version_8192c version)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);/* ms */
rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*ms*/
rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
if (IS_NORMAL_CHIP(rtlhal->version))
rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
else
rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
}
static void Init_ODM_ComInfo_8723b(PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
u8 cut_ver, fab_ver;
/* */
/* Init Value */
/* */
memset(pDM_Odm, 0, sizeof(*pDM_Odm));
pDM_Odm->Adapter = Adapter;
#define ODM_CE 0x04
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, RTW_SDIO);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PACKAGE_TYPE, pHalData->PackageType);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8723B);
fab_ver = ODM_TSMC;
cut_ver = ODM_CUT_A;
DBG_871X("%s(): fab_ver =%d cut_ver =%d\n", __func__, fab_ver, cut_ver);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_FAB_VER, fab_ver);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_CUT_VER, cut_ver);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->VersionID));
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID);
/* ODM_CMNINFO_BINHCT_TEST only for MP Team */
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec);
if (pHalData->rf_type == RF_1T1R){
ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
}
else if (pHalData->rf_type == RF_2T2R){
ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
}
else if (pHalData->rf_type == RF_1T2R){
ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
}
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK /* */
;
ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag);
}
static void PHY_GetTxPowerIndexByRateArray_8812A(struct rtl_priv *rtlpriv,
uint8_t RFPath, enum CHANNEL_WIDTH BandWidth,
uint8_t Channel, uint8_t *Rate, uint8_t *power_index,
uint8_t ArraySize)
{
struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
struct _rtw_hal *pHalData = GET_HAL_DATA(rtlpriv);
uint8_t i;
for (i = 0; i < ArraySize; i++) {
power_index[i] = _rtl8821au_get_txpower_index(rtlpriv, RFPath, Rate[i], BandWidth, Channel);
if ((power_index[i] % 2 == 1) && !IS_NORMAL_CHIP(rtlhal->version))
power_index[i] -= 1;
}
}
/* functions */
static void Init_ODM_ComInfo_8723a(struct rtw_adapter *Adapter)
{
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
struct dm_odm_t *pDM_Odm = &pHalData->odmpriv;
u8 cut_ver, fab_ver;
/* */
/* Init Value */
/* */
memset(pDM_Odm, 0, sizeof(*pDM_Odm));
pDM_Odm->Adapter = Adapter;
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_PLATFORM, 0x04);
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_INTERFACE, RTW_USB);/* RTL871X_HCI_TYPE */
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8723A);
if (IS_8723A_A_CUT(pHalData->VersionID)) {
fab_ver = ODM_UMC;
cut_ver = ODM_CUT_A;
} else if (IS_8723A_B_CUT(pHalData->VersionID)) {
fab_ver = ODM_UMC;
cut_ver = ODM_CUT_B;
} else {
fab_ver = ODM_TSMC;
cut_ver = ODM_CUT_A;
}
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_FAB_VER, fab_ver);
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_CUT_VER, cut_ver);
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->VersionID));
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, pHalData->BoardType);
if (pHalData->BoardType == BOARD_USB_High_PA) {
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_EXT_LNA, true);
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_EXT_PA, true);
}
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID);
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec);
if (pHalData->rf_type == RF_1T1R)
ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
else if (pHalData->rf_type == RF_2T2R)
ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
else if (pHalData->rf_type == RF_1T2R)
ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
}
static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct odm_dm_struct *dm_odm = &(hal_data->odmpriv);
u8 cut_ver, fab_ver;
/* Init Value */
_rtw_memset(dm_odm, 0, sizeof(dm_odm));
dm_odm->Adapter = Adapter;
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PLATFORM, ODM_CE);
if (Adapter->interface_type == RTW_GSPI)
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO);
else
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, Adapter->interface_type);/* RTL871X_HCI_TYPE */
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8188E);
fab_ver = ODM_TSMC;
cut_ver = ODM_CUT_A;
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_FAB_VER, fab_ver);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_CUT_VER, cut_ver);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(hal_data->VersionID));
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PATCH_ID, hal_data->CustomerID);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec);
if (hal_data->rf_type == RF_1T1R)
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
else if (hal_data->rf_type == RF_2T2R)
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
else if (hal_data->rf_type == RF_1T2R)
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType);
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK;
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag);
}
void dump_chip_info(HAL_VERSION ChipVersion)
{
int cnt = 0;
u8 buf[128];
cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723B_");
cnt += sprintf((buf+cnt), "%s_", IS_NORMAL_CHIP(ChipVersion) ? "Normal_Chip" : "Test_Chip");
if (IS_CHIP_VENDOR_TSMC(ChipVersion))
cnt += sprintf((buf+cnt), "%s_", "TSMC");
else if (IS_CHIP_VENDOR_UMC(ChipVersion))
cnt += sprintf((buf+cnt), "%s_", "UMC");
else if (IS_CHIP_VENDOR_SMIC(ChipVersion))
cnt += sprintf((buf+cnt), "%s_", "SMIC");
if (IS_A_CUT(ChipVersion))
cnt += sprintf((buf+cnt), "A_CUT_");
else if (IS_B_CUT(ChipVersion))
cnt += sprintf((buf+cnt), "B_CUT_");
else if (IS_C_CUT(ChipVersion))
cnt += sprintf((buf+cnt), "C_CUT_");
else if (IS_D_CUT(ChipVersion))
cnt += sprintf((buf+cnt), "D_CUT_");
else if (IS_E_CUT(ChipVersion))
cnt += sprintf((buf+cnt), "E_CUT_");
else if (IS_I_CUT(ChipVersion))
cnt += sprintf((buf+cnt), "I_CUT_");
else if (IS_J_CUT(ChipVersion))
cnt += sprintf((buf+cnt), "J_CUT_");
else if (IS_K_CUT(ChipVersion))
cnt += sprintf((buf+cnt), "K_CUT_");
else
cnt += sprintf((buf+cnt), "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
if (IS_1T1R(ChipVersion))
cnt += sprintf((buf+cnt), "1T1R_");
else if (IS_1T2R(ChipVersion))
cnt += sprintf((buf+cnt), "1T2R_");
else if (IS_2T2R(ChipVersion))
cnt += sprintf((buf+cnt), "2T2R_");
else
cnt += sprintf((buf+cnt), "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType);
cnt += sprintf((buf+cnt), "RomVer(%d)\n", ChipVersion.ROMVer);
DBG_871X("%s", buf);
}
void ODM_ConfigRFWithHeaderFile(struct rtl_priv *rtlpriv,
ODM_RF_Config_Type ConfigType, enum radio_path eRFPath)
{
struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
RT_TRACE(rtlpriv, ODM_COMP_INIT, ODM_DBG_LOUD,
"===>ODM_ConfigRFWithHeaderFile (%s)\n", (IS_NORMAL_CHIP(rtlhal->version)) ? "MPChip" : "TestChip");
RT_TRACE(rtlpriv, ODM_COMP_INIT, ODM_DBG_LOUD,
"pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
rtlhal->interface, rtlhal->board_type);
if (IS_HARDWARE_TYPE_8812AU(rtlhal))
rtl8812au_phy_config_rf_with_headerfile(rtlpriv, eRFPath);
if (IS_HARDWARE_TYPE_8821U(rtlhal)) {
rtl8821au_phy_config_rf_with_headerfile(rtlpriv, RF90_PATH_A);
}
}
static VOID
_WriteFW(
IN PADAPTER Adapter,
IN PVOID buffer,
IN u32 size
)
{
// Since we need dynamic decide method of dwonload fw, so we call this function to get chip version.
// We can remove _ReadChipVersion from ReadAdapterInfo8192C later.
BOOLEAN isNormalChip;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
isNormalChip = IS_NORMAL_CHIP(pHalData->VersionID);
if(isNormalChip){
u32 pageNums,remainSize ;
u32 page,offset;
u8* bufferPtr = (u8*)buffer;
pageNums = size / MAX_PAGE_SIZE ;
//RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n"));
remainSize = size % MAX_PAGE_SIZE;
for(page = 0; page < pageNums; page++){
offset = page *MAX_PAGE_SIZE;
_PageWrite(Adapter,page, (bufferPtr+offset),MAX_PAGE_SIZE);
}
if(remainSize){
offset = pageNums *MAX_PAGE_SIZE;
page = pageNums;
_PageWrite(Adapter,page, (bufferPtr+offset),remainSize);
}
//RT_TRACE(COMP_INIT, DBG_LOUD, ("_WriteFW Done- for Normal chip.\n"));
}
else {
_BlockWrite(Adapter,buffer,size);
//RT_TRACE(COMP_INIT, DBG_LOUD, ("_WriteFW Done- for Test chip.\n"));
}
}
void _ReadBluetoothCoexistInfo(
IN PADAPTER Adapter,
IN u8* PROMContent,
IN BOOLEAN AutoloadFail
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID);
struct btcoexist_priv *pbtpriv = &pHalData->bt_coexist;
u8 rf_opt4;
_rtw_memset(pbtpriv, 0,sizeof(struct btcoexist_priv));
if(AutoloadFail){
pbtpriv->BT_Coexist = _FALSE;
pbtpriv->BT_CoexistType= BT_2Wire;
pbtpriv->BT_Ant_Num = Ant_x2;
pbtpriv->BT_Ant_isolation= 0;
pbtpriv->BT_RadioSharedType = BT_Radio_Shared;
return;
}
if(isNormal)
{
if(pHalData->BoardType == BOARD_USB_COMBO)
pbtpriv->BT_Coexist = _TRUE;
else
pbtpriv->BT_Coexist = ((PROMContent[EEPROM_RF_OPT3]&0x20)>>5); //bit[5]
rf_opt4 = PROMContent[EEPROM_RF_OPT4];
pbtpriv->BT_CoexistType = ((rf_opt4&0xe)>>1); // bit [3:1]
pbtpriv->BT_Ant_Num = (rf_opt4&0x1); // bit [0]
pbtpriv->BT_Ant_isolation = ((rf_opt4&0x10)>>4); // bit [4]
pbtpriv->BT_RadioSharedType = ((rf_opt4&0x20)>>5); // bit [5]
}
else
{
static BOOLEAN CheckFwReadLastMSG(
IN PADAPTER Adapter,
IN u8 BoxNum
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u8 valHMETFR, valMCUTST_1;
BOOLEAN Result = _FALSE;
valHMETFR = rtw_read8(Adapter, REG_HMETFR);
valMCUTST_1 = rtw_read8(Adapter, (REG_MCUTST_1+BoxNum));
//DbgPrint("REG[%x] = %x, REG[%x] = %x\n",
// REG_HMETFR, valHMETFR, REG_MCUTST_1+BoxNum, valMCUTST_1 );
// Do not seperate to 91C and 88C, we use the same setting. Suggested by SD4 Filen. 2009.12.03.
if(IS_NORMAL_CHIP(pHalData->VersionID))
{
if(((valHMETFR>>BoxNum)&BIT0) == 0)
Result = _TRUE;
}
else
{
if((((valHMETFR>>BoxNum)&BIT0) == 0) && (valMCUTST_1 == 0))
//============================================================
// functions
//============================================================
static void Init_ODM_ComInfo_8723a(PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
u8 cut_ver,fab_ver;
//
// Init Value
//
_rtw_memset(pDM_Odm,0,sizeof(pDM_Odm));
pDM_Odm->Adapter = Adapter;
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PLATFORM,ODM_CE);
if(Adapter->interface_type == RTW_GSPI )
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,ODM_ITRF_SDIO);
else
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,Adapter->interface_type);//RTL871X_HCI_TYPE
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_IC_TYPE,ODM_RTL8723A);
if(IS_8723A_A_CUT(pHalData->VersionID))
{
fab_ver = ODM_UMC;
cut_ver = ODM_CUT_A;
}
else if(IS_8723A_B_CUT(pHalData->VersionID))
{
fab_ver = ODM_UMC;
cut_ver = ODM_CUT_B;
}
else
{
fab_ver = ODM_TSMC;
cut_ver = ODM_CUT_A;
}
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_MP_TEST_CHIP,IS_NORMAL_CHIP(pHalData->VersionID));
#ifdef CONFIG_USB_HCI
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BOARD_TYPE,pHalData->BoardType);
if(pHalData->BoardType == BOARD_USB_High_PA){
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_LNA,_TRUE);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_PA,_TRUE);
}
#endif
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PATCH_ID,pHalData->CustomerID);
// ODM_CMNINFO_BINHCT_TEST only for MP Team
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BWIFI_TEST,Adapter->registrypriv.wifi_spec);
if(pHalData->rf_type == RF_1T1R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T1R);
}
else if(pHalData->rf_type == RF_2T2R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_2T2R);
}
else if(pHalData->rf_type == RF_1T2R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T2R);
}
}
void Init_ODM_ComInfo(_adapter *adapter)
{
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
int i;
_rtw_memset(pDM_Odm,0,sizeof(*pDM_Odm));
pDM_Odm->Adapter = adapter;
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE);
if (adapter->interface_type == RTW_GSPI)
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO);
else
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, adapter->interface_type);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->VersionID));
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PATCH_ID, pEEPROM->CustomerID);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, adapter->registrypriv.wifi_spec);
if (pHalData->rf_type == RF_1T1R) {
ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
}
else if (pHalData->rf_type == RF_2T2R){
ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
}
else if (pHalData->rf_type == RF_1T2R){
ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
}
{
//1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE =======
u8 odm_board_type = ODM_BOARD_DEFAULT;
if (!IS_HARDWARE_TYPE_OLDER_THAN_8723A(adapter))
{
if (pHalData->ExternalLNA_2G != 0) {
odm_board_type |= ODM_BOARD_EXT_LNA;
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1);
}
if (pHalData->ExternalLNA_5G != 0) {
odm_board_type |= ODM_BOARD_EXT_LNA_5G;
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_LNA, 1);
}
if (pHalData->ExternalPA_2G != 0) {
odm_board_type |= ODM_BOARD_EXT_PA;
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, 1);
}
if (pHalData->ExternalPA_5G != 0) {
odm_board_type |= ODM_BOARD_EXT_PA_5G;
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_PA, 1);
}
if (pHalData->EEPROMBluetoothCoexist)
odm_board_type |= ODM_BOARD_BT;
} else {
#ifdef CONFIG_USB_HCI
if (pHalData->InterfaceSel == INTF_SEL1_USB_High_Power
|| pHalData->BoardType == BOARD_USB_High_PA /* This is legacy code for hal_data.BoardType */
) {
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_LNA, 1);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_PA, 1);
} else
#endif
{
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, pHalData->ExternalPA_2G);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, pHalData->ExternalLNA_2G);
}
odm_board_type = boardType(pHalData->InterfaceSel);
}
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, odm_board_type);
//1 ============== End of BoardType ==============
}
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_APA, pHalData->TypeAPA);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GLNA, pHalData->TypeGLNA);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->RFEType);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0);
/* Pointer reference */
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_UNI, &(dvobj->traffic_stat.tx_bytes));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_UNI, &(dvobj->traffic_stat.rx_bytes));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BAND, &(pHalData->CurrentBandType));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_RATE, &(pHalData->ForcedDataRate));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(pHalData->nCur40MhzPrimeSC));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_MODE, &(adapter->securitypriv.dot11PrivacyAlgrthm));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BW, &(pHalData->CurrentChannelBW));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_CHNL, &( pHalData->CurrentChannel));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_NET_CLOSED, &(adapter->net_closed));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_POWER_SAVING, &(pwrctl->bpower_saving));
for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
ODM_CmnInfoPtrArrayHook(pDM_Odm, ODM_CMNINFO_STA_STATUS, i, NULL);
/* TODO */
//ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BT_OPERATION, _FALSE);
//ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BT_DISABLE_EDCA, _FALSE);
}
void getTxPowerWriteValByRegulatory(
IN PADAPTER Adapter,
IN u8 Channel,
IN u8 index,
IN u32* powerBase0,
IN u32* powerBase1,
OUT u32* pOutWriteVal
)
{
EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &Adapter->dmpriv;
u8 i, chnlGroup, pwr_diff_limit[CHANNEL_GROUP_MAX+1];
u32 writeVal, customer_limit, rf;
//
// Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate
//
for(rf=0; rf<2; rf++)
{
switch(pEEPROM->EEPROMRegulatory)
{
case 0: // Realtek better performance
// increase power diff defined by Realtek for large power
chnlGroup = 0;
//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n",
// chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] +
((index<2)?powerBase0[rf]:powerBase1[rf]);
//RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
break;
case 1: // Realtek regulatory
// increase power diff defined by Realtek for regulatory
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
{
writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]);
//RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 40MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
}
else
{
if(pHalData->pwrGroupCnt == 1)
chnlGroup = 0;
if(pHalData->pwrGroupCnt >= CHANNEL_GROUP_MAX)
{
chnlGroup = getChnlGroupfromArray(Channel-1);
if(pHalData->pwrGroupCnt == CHANNEL_GROUP_MAX+1)
chnlGroup++;
}
//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n",
//chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] +
((index<2)?powerBase0[rf]:powerBase1[rf]);
//RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
}
break;
case 2: // Better regulatory
// don't increase any power diff
writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]);
//RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
break;
case 3: // Customer defined power diff.
// increase power diff defined by customer.
chnlGroup = 0;
//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n",
// chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
{
//RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n",
// ((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1]));
}
else
{
//RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n",
// ((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1]));
}
for (i=0; i<(CHANNEL_GROUP_MAX+1); i++)
{
pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8));
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
{
if(pwr_diff_limit[i] > pEEPROM->PwrGroupHT40[rf][Channel-1])
pwr_diff_limit[i] = pEEPROM->PwrGroupHT40[rf][Channel-1];
}
else
{
if(pwr_diff_limit[i] > pEEPROM->PwrGroupHT20[rf][Channel-1])
pwr_diff_limit[i] = pEEPROM->PwrGroupHT20[rf][Channel-1];
}
}
customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
(pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]);
//RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit));
writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]);
//RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal));
break;
default:
chnlGroup = 0;
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] +
((index<2)?powerBase0[rf]:powerBase1[rf]);
//RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
break;
}
#if 1
if(!IS_NORMAL_CHIP(pHalData->VersionID))
{
if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
writeVal = 0x12121212;
else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
writeVal = 0x12121212;
}
#endif
*(pOutWriteVal+rf) = writeVal;
}
}
static int
phy_RF6052_Config_ParaFile(
IN PADAPTER Adapter
)
{
u32 u4RegValue;
u8 eRFPath;
BB_REGISTER_DEFINITION_T *pPhyReg;
int rtStatus = _SUCCESS;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
static char sz88CRadioAFile[] = RTL8188C_PHY_RADIO_A;
static char sz88CRadioBFile[] = RTL8188C_PHY_RADIO_B;
#ifdef CONFIG_USB_HCI
static char sz88CRadioAFile_mCard[] = RTL8188C_PHY_RADIO_A_mCard;
static char sz88CRadioBFile_mCard[] = RTL8188C_PHY_RADIO_B_mCard;
static char sz88CRadioAFile_HP[] = RTL8188C_PHY_RADIO_A_HP;
#endif
static char sz92CRadioAFile[] = RTL8192C_PHY_RADIO_A;
static char sz92CRadioBFile[] = RTL8192C_PHY_RADIO_B;
static char sz8723RadioAFile[] = RTL8723_PHY_RADIO_A;
static char sz8723RadioBFile[] = RTL8723_PHY_RADIO_B;
char *pszRadioAFile, *pszRadioBFile;
if(IS_HARDWARE_TYPE_8192C(Adapter))
{
if(IS_92C_SERIAL( pHalData->VersionID))// 88c's IPA is different from 92c's
{
if(IS_NORMAL_CHIP(pHalData->VersionID))
{
pszRadioAFile = sz92CRadioAFile;
pszRadioBFile = sz92CRadioBFile;
}
else
{
rtStatus = _FAIL;
return rtStatus;
}
}
else
{
if(IS_NORMAL_CHIP(pHalData->VersionID))
{
pszRadioAFile = sz88CRadioAFile;
pszRadioBFile = sz88CRadioBFile;
#ifdef CONFIG_USB_HCI
if( BOARD_MINICARD == pHalData->BoardType)
{
pszRadioAFile = sz88CRadioAFile_mCard;
pszRadioBFile = sz88CRadioBFile_mCard;
}
else if( BOARD_USB_High_PA == pHalData->BoardType)
{
pszRadioAFile = sz88CRadioAFile_HP;
}
#endif
}
else
{
rtStatus = _FAIL;
return rtStatus;
}
}
}
else if(IS_HARDWARE_TYPE_8723(Adapter))
{
pszRadioAFile = sz8723RadioAFile;
pszRadioBFile = sz8723RadioBFile;
}
//3//-----------------------------------------------------------------
//3// <2> Initialize RF
//3//-----------------------------------------------------------------
//for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
{
pPhyReg = &pHalData->PHYRegDef[eRFPath];
/*----Store original RFENV control type----*/
switch(eRFPath)
{
case RF90_PATH_A:
case RF90_PATH_C:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
break;
case RF90_PATH_B :
case RF90_PATH_D:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16);
break;
}
/*----Set RF_ENV enable----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
rtw_udelay_os(1);//PlatformStallExecution(1);
/*----Set RF_ENV output high----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
rtw_udelay_os(1);//PlatformStallExecution(1);
/* Set bit number of Address and Data for RF register */
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255
rtw_udelay_os(1);//PlatformStallExecution(1);
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255
rtw_udelay_os(1);//PlatformStallExecution(1);
/*----Initialize RF fom connfiguration file----*/
switch(eRFPath)
{
case RF90_PATH_A:
#ifdef CONFIG_EMBEDDED_FWIMG
rtStatus= rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath);
#else
rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF90_RADIO_PATH_E)eRFPath);
#endif
break;
case RF90_PATH_B:
#ifdef CONFIG_EMBEDDED_FWIMG
rtStatus = rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath);
#else
rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF90_RADIO_PATH_E)eRFPath);
#endif
break;
case RF90_PATH_C:
break;
case RF90_PATH_D:
break;
}
/*----Restore RFENV control type----*/;
switch(eRFPath)
{
case RF90_PATH_A:
case RF90_PATH_C:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
break;
case RF90_PATH_B :
case RF90_PATH_D:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
break;
}
if(rtStatus != _SUCCESS){
//RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath));
goto phy_RF6052_Config_ParaFile_Fail;
}
}
//RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n"));
return rtStatus;
phy_RF6052_Config_ParaFile_Fail:
return rtStatus;
}
void Init_ODM_ComInfo(_adapter *adapter)
{
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
struct PHY_DM_STRUCT *pDM_Odm = &(pHalData->odmpriv);
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
int i;
_rtw_memset(pDM_Odm, 0, sizeof(*pDM_Odm));
pDM_Odm->adapter = adapter;
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE);
rtw_odm_init_ic_type(adapter);
if (rtw_get_intf_type(adapter) == RTW_GSPI)
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO);
else
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_INTERFACE, rtw_get_intf_type(adapter));
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->version_id));
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, adapter->registrypriv.wifi_spec);
if (pHalData->rf_type == RF_1T1R)
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
else if (pHalData->rf_type == RF_1T2R)
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
else if (pHalData->rf_type == RF_2T2R)
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
else if (pHalData->rf_type == RF_2T2R_GREEN)
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R_GREEN);
else if (pHalData->rf_type == RF_2T3R)
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T3R);
else if (pHalData->rf_type == RF_2T4R)
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T4R);
else if (pHalData->rf_type == RF_3T3R)
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T3R);
else if (pHalData->rf_type == RF_3T4R)
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T4R);
else if (pHalData->rf_type == RF_4T4R)
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_4T4R);
else
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_XTXR);
{
/* 1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE ======= */
u8 odm_board_type = ODM_BOARD_DEFAULT;
if (pHalData->ExternalLNA_2G != 0) {
odm_board_type |= ODM_BOARD_EXT_LNA;
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1);
}
if (pHalData->external_lna_5g != 0) {
odm_board_type |= ODM_BOARD_EXT_LNA_5G;
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_5G_EXT_LNA, 1);
}
if (pHalData->ExternalPA_2G != 0) {
odm_board_type |= ODM_BOARD_EXT_PA;
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EXT_PA, 1);
}
if (pHalData->external_pa_5g != 0) {
odm_board_type |= ODM_BOARD_EXT_PA_5G;
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_5G_EXT_PA, 1);
}
if (pHalData->EEPROMBluetoothCoexist)
odm_board_type |= ODM_BOARD_BT;
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, odm_board_type);
/* 1 ============== End of BoardType ============== */
}
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G);
#ifdef CONFIG_DFS_MASTER
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_DFS_REGION_DOMAIN, adapter->registrypriv.dfs_region_domain);
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_DFS_MASTER_ENABLE, &(adapter_to_rfctl(adapter)->dfs_master_enabled));
#endif
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_APA, pHalData->TypeAPA);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_GLNA, pHalData->TypeGLNA);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->rfe_type);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0);
/*Add by YuChen for kfree init*/
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_REGRFKFREEENABLE, adapter->registrypriv.RegPwrTrimEnable);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RFKFREEENABLE, pHalData->RfKFreeEnable);
/*Antenna diversity relative parameters*/
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ANT_DIV, &(pHalData->AntDivCfg));
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_BE_FIX_TX_ANT, pHalData->b_fix_tx_ant);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH, pHalData->with_extenal_ant_switch);
/* (8822B) efuse 0x3D7 & 0x3D8 for TX PA bias */
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EFUSE0X3D7, pHalData->efuse0x3d7);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EFUSE0X3D8, pHalData->efuse0x3d8);
/*Add by YuChen for adaptivity init*/
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ADAPTIVITY, &(adapter->registrypriv.adaptivity_en));
phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE, (adapter->registrypriv.adaptivity_mode != 0) ? TRUE : FALSE);
phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_DCBACKOFF, adapter->registrypriv.adaptivity_dc_backoff);
phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY, (adapter->registrypriv.adaptivity_dml != 0) ? TRUE : FALSE);
phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_L2H_INI, adapter->registrypriv.adaptivity_th_l2h_ini);
phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF, adapter->registrypriv.adaptivity_th_edcca_hl_diff);
#ifdef CONFIG_IQK_PA_OFF
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_IQKPAOFF, 1);
#endif
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_IQKFWOFFLOAD, pHalData->RegIQKFWOffload);
/* Pointer reference */
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_TX_UNI, &(dvobj->traffic_stat.tx_bytes));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_RX_UNI, &(dvobj->traffic_stat.rx_bytes));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BAND, &(pHalData->current_band_type));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_FORCED_RATE, &(pHalData->ForcedDataRate));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(pHalData->nCur40MhzPrimeSC));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_SEC_MODE, &(adapter->securitypriv.dot11PrivacyAlgrthm));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BW, &(pHalData->current_channel_bw));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_CHNL, &(pHalData->current_channel));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_NET_CLOSED, &(adapter->net_closed));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_POWER_SAVING, &(pwrctl->bpower_saving));
/*Add by Yuchen for phydm beamforming*/
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_TX_TP, &(dvobj->traffic_stat.cur_tx_tp));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_RX_TP, &(dvobj->traffic_stat.cur_rx_tp));
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ANT_TEST, &(pHalData->antenna_test));
#ifdef CONFIG_USB_HCI
odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_HUBUSBMODE, &(dvobj->usb_speed));
#endif
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++)
odm_cmn_info_ptr_array_hook(pDM_Odm, ODM_CMNINFO_STA_STATUS, i, NULL);
phydm_init_debug_setting(pDM_Odm);
/* TODO */
/* odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BT_OPERATION, _FALSE); */
/* odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BT_DISABLE_EDCA, _FALSE); */
}
//============================================================
// functions
//============================================================
static void Init_ODM_ComInfo_8812(PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
u8 cut_ver,fab_ver;
u8 BoardType = ODM_BOARD_DEFAULT;
//
// Init Value
//
memset(pDM_Odm,0,sizeof(*pDM_Odm));
pDM_Odm->Adapter = Adapter;
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PLATFORM,ODM_CE);
if (Adapter->interface_type == RTW_GSPI)
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,ODM_ITRF_SDIO);
else
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,Adapter->interface_type);
if (IS_HARDWARE_TYPE_8812(Adapter))
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8812);
else if (IS_HARDWARE_TYPE_8821(Adapter))
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8821);
fab_ver = ODM_TSMC;
if(IS_A_CUT(pHalData->VersionID))
cut_ver = ODM_CUT_A;
else if(IS_B_CUT(pHalData->VersionID))
cut_ver = ODM_CUT_B;
else if(IS_C_CUT(pHalData->VersionID))
cut_ver = ODM_CUT_C;
else if(IS_D_CUT(pHalData->VersionID))
cut_ver = ODM_CUT_D;
else if(IS_E_CUT(pHalData->VersionID))
cut_ver = ODM_CUT_E;
else
cut_ver = ODM_CUT_A;
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP,IS_NORMAL_CHIP(pHalData->VersionID));
//1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE =======
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
if(pHalData->InterfaceSel == INTF_SEL1_USB_High_Power)
{
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, 1);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1);
}
else
{
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, pHalData->ExternalPA_2G);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 0);
}
#else
// PCIE no external PA now???
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, 0);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 0);
#endif
if (pHalData->ExternalLNA_2G != 0) {
BoardType |= ODM_BOARD_EXT_LNA;
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1);
}
if (pHalData->ExternalLNA_5G != 0) {
BoardType |= ODM_BOARD_EXT_LNA_5G;
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_LNA, 1);
}
if (pHalData->ExternalPA_2G != 0) {
BoardType |= ODM_BOARD_EXT_PA;
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, 1);
}
if (pHalData->ExternalPA_5G != 0) {
BoardType |= ODM_BOARD_EXT_PA_5G;
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_PA, 1);
}
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, BoardType);
//1 ============== End of BoardType ==============
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_APA, pHalData->TypeAPA);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GLNA, pHalData->TypeGLNA);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->RFEType);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PATCH_ID,pEEPROM->CustomerID);
// ODM_CMNINFO_BINHCT_TEST only for MP Team
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BWIFI_TEST,Adapter->registrypriv.wifi_spec);
if(pHalData->rf_type == RF_1T1R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T1R);
}
else if(pHalData->rf_type == RF_2T2R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_2T2R);
}
else if(pHalData->rf_type == RF_1T2R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T2R);
}
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->RFEType);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType);
#ifdef CONFIG_DISABLE_ODM
pdmpriv->InitODMFlag = 0;
#else
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK //|
;
//if(pHalData->AntDivCfg)
// pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
#endif
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag);
}
uint32_t ODM_Get_Rate_Bitmap(struct _rtw_dm *pDM_Odm, uint32_t macid,
uint32_t ra_mask, u8 rssi_level)
{
struct rtl_priv *rtlpriv = pDM_Odm->rtlpriv;
struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
struct sta_info *pEntry;
uint32_t rate_bitmap = 0;
u8 WirelessMode;
/* u8 WirelessMode =*(pDM_Odm->pWirelessMode); */
pEntry = pDM_Odm->pODM_StaInfo[macid];
if (!IS_STA_VALID(pEntry))
return ra_mask;
WirelessMode = pEntry->wireless_mode;
switch (WirelessMode) {
case WIRELESS_MODE_B:
if (ra_mask & 0x0000000c) /* 11M or 5.5M enable */
rate_bitmap = 0x0000000d;
else
rate_bitmap = 0x0000000f;
break;
case WIRELESS_MODE_G:
case WIRELESS_MODE_A:
if (rssi_level == DM_RATR_STA_HIGH)
rate_bitmap = 0x00000f00;
else
rate_bitmap = 0x00000ff0;
break;
case WIRELESS_MODE_B | WIRELESS_MODE_G:
if (rssi_level == DM_RATR_STA_HIGH)
rate_bitmap = 0x00000f00;
else if (rssi_level == DM_RATR_STA_MIDDLE)
rate_bitmap = 0x00000ff0;
else
rate_bitmap = 0x00000ff5;
break;
case WIRELESS_MODE_B | WIRELESS_MODE_G | WIRELESS_MODE_N_24G:
case WIRELESS_MODE_B | WIRELESS_MODE_N_24G:
case WIRELESS_MODE_A | WIRELESS_MODE_N_5G:
if (pDM_Odm->rtlpriv->phy.rf_type == ODM_1T2R || pDM_Odm->rtlpriv->phy.rf_type == ODM_1T1R) {
if (rssi_level == DM_RATR_STA_HIGH) {
rate_bitmap = 0x000f0000;
} else if (rssi_level == DM_RATR_STA_MIDDLE) {
rate_bitmap = 0x000ff000;
} else {
if (rtlpriv->phy.current_chan_bw == ODM_BW40M)
rate_bitmap = 0x000ff015;
else
rate_bitmap = 0x000ff005;
}
} else {
if (rssi_level == DM_RATR_STA_HIGH) {
rate_bitmap = 0x0f8f0000;
} else if (rssi_level == DM_RATR_STA_MIDDLE) {
rate_bitmap = 0x0f8ff000;
} else {
if (rtlpriv->phy.current_chan_bw == ODM_BW40M)
rate_bitmap = 0x0f8ff015;
else
rate_bitmap = 0x0f8ff005;
}
}
break;
case WIRELESS_MODE_AC_5G | WIRELESS_MODE_A:
case WIRELESS_MODE_AC_5G | WIRELESS_MODE_G:
if (pDM_Odm->rtlpriv->phy.rf_type == RF_1T1R) {
if (IS_HARDWARE_TYPE_8811AU(rtlhal) ||
(IS_HARDWARE_TYPE_8812AU(rtlhal) && IS_NORMAL_CHIP(rtlhal->version))) {
if (IS_HARDWARE_TYPE_8821U(rtlhal)
&& (rtlpriv->phy.current_channel >= 149)) {
if (rssi_level == 1) /* add by Gary for ac-series */
rate_bitmap = 0x001f8000;
else if (rssi_level == 2)
rate_bitmap = 0x001ff000;
else
rate_bitmap = 0x001ff010;
} else {
if (rssi_level == 1) /* add by Gary for ac-series */
rate_bitmap = 0x003f8000;
else if (rssi_level == 2)
rate_bitmap = 0x003ff000;
else
rate_bitmap = 0x003ff010;
}
} else {
rate_bitmap = 0x000ff010;
}
} else {
if (IS_NORMAL_CHIP(rtlhal->version)) {
if (rssi_level == 1) /* add by Gary for ac-series */
rate_bitmap = 0xfe3f8000; /* VHT 2SS MCS3~9 */
else if (rssi_level == 2)
rate_bitmap = 0xfffff000; /* VHT 2SS MCS0~9 */
else
rate_bitmap = 0xfffff010; /* All */
} else
rate_bitmap = 0x3fcff010;
}
break;
default:
if (pDM_Odm->rtlpriv->phy.rf_type == RF_1T2R)
rate_bitmap = 0x000fffff;
else
rate_bitmap = 0x0fffffff;
break;
}
/* printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",__FUNCTION__,rssi_level,WirelessMode,rate_bitmap); */
RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, " ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n", rssi_level, WirelessMode, rate_bitmap);
return (ra_mask&rate_bitmap);
}
//
// Description:
// Download 8192C firmware code.
//
//
int FirmwareDownload92C(
IN PADAPTER Adapter
)
{
int rtStatus = _SUCCESS;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
char R92CFwImageFileName_TSMC[] ={RTL8192C_FW_TSMC_IMG};
char R92CFwImageFileName_UMC[] ={RTL8192C_FW_UMC_IMG};
char R8723FwImageFileName_UMC[] ={RTL8723_FW_UMC_IMG};
char * FwImage;
u32 FwImageLen;
char* pFwImageFileName;
//vivi, merge 92c and 92s into one driver, 20090817
//vivi modify this temply, consider it later!!!!!!!!
//PRT_FIRMWARE pFirmware = GET_FIRMWARE_819X(Adapter);
//PRT_FIRMWARE_92C pFirmware = GET_FIRMWARE_8192C(Adapter);
PRT_FIRMWARE_92C pFirmware = NULL;
PRT_8192C_FIRMWARE_HDR pFwHdr = NULL;
u8 *pFirmwareBuf;
u32 FirmwareLen;
pFirmware = (PRT_FIRMWARE_92C)_rtw_malloc(sizeof(RT_FIRMWARE_92C));
if(!pFirmware)
{
rtStatus = _FAIL;
goto Exit;
}
//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> FirmwareDownload91C() fw:%s\n", pFwImageFileName));
#ifdef CONFIG_EMBEDDED_FWIMG
pFirmware->eFWSource = FW_SOURCE_HEADER_FILE;
#else
pFirmware->eFWSource = FW_SOURCE_IMG_FILE;
#endif
if(IS_NORMAL_CHIP(pHalData->VersionID))
{
if(IS_VENDOR_UMC_A_CUT(pHalData->VersionID) && !IS_92C_SERIAL(pHalData->VersionID))// UMC , 8188
{
pFwImageFileName = R92CFwImageFileName_UMC;
FwImage = Rtl819XFwUMCImageArray;
FwImageLen = UMCImgArrayLength;
DBG_871X(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_UMC\n");
}
else
{
pFwImageFileName = R92CFwImageFileName_TSMC;
FwImage = Rtl819XFwTSMCImageArray;
FwImageLen = TSMCImgArrayLength;
DBG_871X(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_TSMC\n");
}
}
else
{
#if 0
pFwImageFileName = TestChipFwFile;
FwImage = Rtl8192CTestFwImg;
FwImageLen = Rtl8192CTestFwImgLen;
RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> FirmwareDownload91C() fw:Rtl8192CTestFwImg\n"));
#endif
}
switch(pFirmware->eFWSource)
{
case FW_SOURCE_IMG_FILE:
//TODO:load fw bin file
break;
case FW_SOURCE_HEADER_FILE:
if(TSMCImgArrayLength > FW_8192C_SIZE){
rtStatus = _FAIL;
//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE) );
DBG_871X("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE);
goto Exit;
}
_rtw_memcpy(pFirmware->szFwBuffer, FwImage, FwImageLen);
pFirmware->ulFwLength = FwImageLen;
break;
}
pFirmwareBuf = pFirmware->szFwBuffer;
FirmwareLen = pFirmware->ulFwLength;
// To Check Fw header.
pFwHdr = (PRT_8192C_FIRMWARE_HDR)pFirmware->szFwBuffer;
pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version);
pHalData->FirmwareSubVersion = le16_to_cpu(pFwHdr->Subversion);
//RT_TRACE(COMP_INIT, DBG_LOUD, (" FirmwareVersion(%#x), Signature(%#x)\n",
// Adapter->MgntInfo.FirmwareVersion, pFwHdr->Signature));
DBG_8192C("fw_ver=v%d, fw_subver=%d, sig=0x%x\n",
pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, le16_to_cpu(pFwHdr->Signature)&0xFFF0);
if(IS_FW_HEADER_EXIST(pFwHdr))
{
//RT_TRACE(COMP_INIT, DBG_LOUD,("Shift 32 bytes for FW header!!\n"));
pFirmwareBuf = pFirmwareBuf + 32;
FirmwareLen = FirmwareLen -32;
}
// Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself,
// or it will cause download Fw fail. 2010.02.01. by tynli.
if(rtw_read8(Adapter, REG_MCUFWDL)&BIT7) //8051 RAM code
{
DBG_8192C("8051 in Ram......prepare to reset by itself\n");
_FirmwareSelfReset(Adapter);
rtw_write8(Adapter, REG_MCUFWDL, 0x00);
}
_FWDownloadEnable(Adapter, _TRUE);
_WriteFW(Adapter, pFirmwareBuf, FirmwareLen);
_FWDownloadEnable(Adapter, _FALSE);
rtStatus = _FWFreeToGo(Adapter);
if(_SUCCESS != rtStatus){
//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("DL Firmware failed!\n") );
goto Exit;
}
//RT_TRACE(COMP_INIT, DBG_LOUD, (" Firmware is ready to run!\n"));
Exit:
if(pFirmware)
_rtw_mfree((u8*)pFirmware, sizeof(RT_FIRMWARE_92C));
//RT_TRACE(COMP_INIT, DBG_LOUD, (" <=== FirmwareDownload91C()\n"));
return rtStatus;
}
int
phy_RF6052_Config_ParaFile(
IN PADAPTER Adapter
)
{
u32 u4RegValue;
u8 eRFPath;
BB_REGISTER_DEFINITION_T *pPhyReg;
int rtStatus = _SUCCESS;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
static char sz88CRadioAFile[] = RTL8188C_PHY_RADIO_A;
static char sz88CRadioBFile[] = RTL8188C_PHY_RADIO_B;
static char sz92CRadioAFile[] = RTL8192C_PHY_RADIO_A;
static char sz92CRadioBFile[] = RTL8192C_PHY_RADIO_B;
static char sz88CTestRadioAFile[] = RTL8188C_PHY_RADIO_A;
static char sz88CTestRadioBFile[] = RTL8188C_PHY_RADIO_B;
static char sz92CTestRadioAFile[] = RTL8192C_PHY_RADIO_A;
static char sz92CTestRadioBFile[] = RTL8192C_PHY_RADIO_B;
static char sz92DRadioAFile[] = RTL8192D_PHY_RADIO_A;
static char sz92DRadioBFile[] = RTL8192D_PHY_RADIO_B;
static char sz92DTestRadioAFile[] = RTL8192D_PHY_RADIO_A;
static char sz92DTestRadioBFile[] = RTL8192D_PHY_RADIO_B;
u8 *pszRadioAFile, *pszRadioBFile;
u8 u1bTmp;
BOOLEAN bMac1NeedInitRadioAFirst = _FALSE;
BOOLEAN bNeedPowerDownRadioA = _FALSE;
// 92D RF config zhiyuan 2010/04/07
// Single phy mode: use radio_a radio_b config path_A path_B seperately by MAC0, and MAC1 needn't configure RF;
// Dual PHY mode:MAC0 use radio_a config 1st phy path_A, MAC1 use radio_b config 2nd PHY path_A.
if(IS_HARDWARE_TYPE_8192D(pHalData)){
if(IS_NORMAL_CHIP(pHalData->VersionID))
{
pszRadioAFile = sz92DRadioAFile;
pszRadioBFile = sz92DRadioBFile;
if(pHalData->interfaceIndex==1)
{
if(pHalData->MacPhyMode92D==DUALMAC_DUALPHY)
pszRadioAFile = sz92DRadioBFile;
else
return rtStatus;
}
}
else
{
pszRadioAFile = sz92DTestRadioAFile;
pszRadioBFile = sz92DTestRadioBFile;
if(pHalData->interfaceIndex==1)
{
//
// when 92D test chip dual mac dual phy mode, if enable MAC1 first, before init RF radio B,
// also init RF radio A, and then let radio A go to power down mode.
// Note: normal chip need do this or not will be considerred later.
//
if(pHalData->MacPhyMode92D==DUALMAC_DUALPHY)
{
u1bTmp = read8(Adapter, REG_MAC0);
if (!(u1bTmp&MAC0_ON))
{
// MAC0 not enabled, also init radio A before init radio B.
// Enable BB and RF
#if (DEV_BUS_TYPE == PCI_INTERFACE)
//PlatformEFIOWrite1Byte(Adapter, REG_SYS_FUNC_EN, 0xE0);
#if 0
MpWritePCIDwordDBI8192C(Adapter,
(REG_SYS_FUNC_EN - 2),
MpReadPCIDwordDBI8192C(Adapter, (REG_SYS_FUNC_EN - 2), BIT3)&0xFFFCFFFF,
BIT3);
#endif
//u2bTmp = PlatformEFIORead2Byte(Adapter, REG_SYS_FUNC_EN);
//PlatformEFIOWrite2Byte(Adapter, REG_SYS_FUNC_EN, u2bTmp|BIT13|BIT0|BIT1);
MpWritePCIDwordDBI8192C(Adapter,
(REG_SYS_FUNC_EN - 2),
MpReadPCIDwordDBI8192C(Adapter, (REG_SYS_FUNC_EN - 2), BIT3)|BIT29|BIT16|BIT17,
BIT3);
#elif (DEV_BUS_TYPE == USB_INTERFACE)
pHalData->bDuringMac1InitRadioA = _TRUE;
write16(Adapter, REG_SYS_FUNC_EN, read16(Adapter, REG_SYS_FUNC_EN)&0xFFFC);
write16(Adapter, REG_SYS_FUNC_EN, read16(Adapter, REG_SYS_FUNC_EN)|BIT13|BIT0|BIT1);
pHalData->bDuringMac1InitRadioA = _FALSE;
#endif
pHalData->NumTotalRFPath = 2;
bMac1NeedInitRadioAFirst = _TRUE;
}
else
{
// MAC0 enabled, only init radia B.
pszRadioAFile = sz92DTestRadioBFile;
}
}
else
{
return rtStatus;
}
}
}
}
else{
if(IS_92C_SERIAL( pHalData->VersionID))// 88c's IPA is different from 92c's
{
if(IS_NORMAL_CHIP(pHalData->VersionID))
{
pszRadioAFile = sz92CRadioAFile;
pszRadioBFile = sz92CRadioBFile;
}
else
{
pszRadioAFile = sz92CTestRadioAFile;
pszRadioBFile = sz92CTestRadioBFile;
}
}
else
{
if(IS_NORMAL_CHIP(pHalData->VersionID))
{
pszRadioAFile = sz88CRadioAFile;
pszRadioBFile = sz88CRadioBFile;
}
else
{
pszRadioAFile = sz88CTestRadioAFile;
pszRadioBFile = sz88CTestRadioBFile;
}
}
}
//3//-----------------------------------------------------------------
//3// <2> Initialize RF
//3//-----------------------------------------------------------------
//for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
{
if (IS_HARDWARE_TYPE_8192D(pHalData) && bMac1NeedInitRadioAFirst)
{
if (eRFPath == RF90_PATH_A)
{
pHalData->bDuringMac1InitRadioA = _TRUE;
bNeedPowerDownRadioA = _TRUE;
}
if (eRFPath == RF90_PATH_B)
{
pHalData->bDuringMac1InitRadioA = _FALSE;
bMac1NeedInitRadioAFirst = _FALSE;
eRFPath = RF90_PATH_A;
pszRadioAFile = sz92DTestRadioBFile;
pHalData->NumTotalRFPath = 1;
}
}
pPhyReg = &pHalData->PHYRegDef[eRFPath];
/*----Store original RFENV control type----*/
switch(eRFPath)
{
case RF90_PATH_A:
case RF90_PATH_C:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
break;
case RF90_PATH_B :
case RF90_PATH_D:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16);
break;
}
/*----Set RF_ENV enable----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
udelay_os(1);//PlatformStallExecution(1);
/*----Set RF_ENV output high----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
udelay_os(1);//PlatformStallExecution(1);
/* Set bit number of Address and Data for RF register */
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255
udelay_os(1);//PlatformStallExecution(1);
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255
udelay_os(1);//PlatformStallExecution(1);
/*----Initialize RF fom connfiguration file----*/
switch(eRFPath)
{
case RF90_PATH_A:
#ifdef CONFIG_EMBEDDED_FWIMG
rtStatus= PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath);
#else
rtStatus = PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF90_RADIO_PATH_E)eRFPath);
#endif
break;
case RF90_PATH_B:
#ifdef CONFIG_EMBEDDED_FWIMG
rtStatus= PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath);
#else
rtStatus = PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF90_RADIO_PATH_E)eRFPath);
#endif
break;
case RF90_PATH_C:
break;
case RF90_PATH_D:
break;
}
/*----Restore RFENV control type----*/;
switch(eRFPath)
{
case RF90_PATH_A:
case RF90_PATH_C:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
break;
case RF90_PATH_B :
case RF90_PATH_D:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
break;
}
if(rtStatus != _SUCCESS){
//RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath));
goto phy_RF6052_Config_ParaFile_Fail;
}
}
if (IS_HARDWARE_TYPE_8192D(pHalData) && bNeedPowerDownRadioA)
{
// check MAC0 enable or not again now, if enabled, not power down radio A.
u1bTmp = read8(Adapter, REG_MAC0);
if (!(u1bTmp&MAC0_ON))
{
// power down RF radio A according to YuNan's advice.
#if (DEV_BUS_TYPE == PCI_INTERFACE)
MpWritePCIDwordDBI8192C(Adapter,
rFPGA0_XA_LSSIParameter,
0x00000000,
BIT3);
#elif (DEV_BUS_TYPE == USB_INTERFACE)
pHalData->bDuringMac1InitRadioA = _TRUE;
write32(Adapter, rFPGA0_XA_LSSIParameter, 0x00000000);
pHalData->bDuringMac1InitRadioA = _FALSE;
#endif
}
bNeedPowerDownRadioA = _FALSE;
}
//RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n"));
return rtStatus;
phy_RF6052_Config_ParaFile_Fail:
return rtStatus;
}
