static u8 _DDCMRead(u8 ucCurAddrMode, u32 u4ClkDiv, u8 ucDev, u32 u4Addr, SIF_BIT_T ucAddrType,
u8 *pucValue, u32 u4Count)
{
u32 u4Ack;
u8 ucReadCount, ucIdx, ucAckCount, ucAckFinal, ucTmpCount;
MT8193_DDC_FUNC();
DDCM_Init();
if ((pucValue == NULL) || (u4Count == 0) || (u4ClkDiv == 0)) {
return 0;
}
ucIdx = 0;
/* check busy/trigger bit */
if (IS_SIF_BIT(DDC_DDCMCTL1, DDCM_TRI)) {
return 0;
}
DDCM_CLK_DIV_WRITE(u4ClkDiv);
DDCM_TrigMode(DDCM_START);
if (ucDev > EDID_ID) { /* Max'0619'04, 4-block EEDID reading */
DDCM_DATA0_WRITE(0x60);
DDCM_DATA1_WRITE(ucDev - EDID_ID);
DDCM_PGLEN_WRITE(0x01);
DDCM_TrigMode(DDCM_WRITE_DATA);
u4Ack = DDCM_ACK_READ();
if (u4Ack != 0x3) {
goto ddc_master_read_end;
}
DDCM_TrigMode(DDCM_START);
ucDev = EDID_ID;
}
if (ucCurAddrMode == 0) {
DDCM_DATA0_WRITE((ucDev << 1));
if (ucAddrType == SIF_8_BIT) {
DDCM_DATA1_WRITE(u4Addr);
DDCM_PGLEN_WRITE(0x01);
DDCM_TrigMode(DDCM_WRITE_DATA);
u4Ack = DDCM_ACK_READ();
if (u4Ack != 0x3) {
goto ddc_master_read_end;
}
} else if (ucAddrType == SIF_16_BIT) {
DDCM_DATA1_WRITE((u4Addr >> 8));
DDCM_DATA2_WRITE(u4Addr);
DDCM_PGLEN_WRITE(0x02);
DDCM_TrigMode(DDCM_WRITE_DATA);
u4Ack = DDCM_ACK_READ();
if (u4Ack != 0x7) {
goto ddc_master_read_end;
}
}
static u32 DDCM_TrigMode(u32 u4Mode)
{
MT8193_DDC_FUNC();
DDCM_SIF_MODE_WRITE(u4Mode);
SIF_SET_BIT(DDC_DDCMCTL1,DDCM_TRI);
while(IS_SIF_BIT(DDC_DDCMCTL1,DDCM_TRI)){udelay(1);}
return (0);
}
