rt_err_t gd32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{
const struct pin_index *index;
rt_base_t level;
rt_int32_t hdr_index = -1;
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_EINVAL;
}
hdr_index = bit2bitno(index->pin);
if (hdr_index < 0 || hdr_index >= ITEM_NUM(pin_irq_map))
{
return RT_EINVAL;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[hdr_index].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_EOK;
}
pin_irq_hdr_tab[hdr_index].pin = -1;
pin_irq_hdr_tab[hdr_index].hdr = RT_NULL;
pin_irq_hdr_tab[hdr_index].mode = 0;
pin_irq_hdr_tab[hdr_index].args = RT_NULL;
rt_hw_interrupt_enable(level);
return RT_EOK;
}
rt_err_t es32f0_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{
const struct pin_index *index;
rt_base_t level;
rt_int32_t irqindex = -1;
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
}
irqindex = index->pin & 0x00FF;
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_EOK;
}
pin_irq_hdr_tab[irqindex].pin = -1;
pin_irq_hdr_tab[irqindex].hdr = RT_NULL;
pin_irq_hdr_tab[irqindex].mode = 0;
pin_irq_hdr_tab[irqindex].args = RT_NULL;
rt_hw_interrupt_enable(level);
return RT_EOK;
}
rt_inline const pin_to_analog_index_t *pin_to_analog(uint8_t pin)
{
if(pin >= ITEM_NUM(pin_to_analog_index))
return RT_NULL;
else
return pin_to_analog_index + pin;
}
rt_inline const struct pin_irq_map *get_pin_irq_map(rt_uint16_t gpio_pin)
{
rt_int32_t mapindex = gpio_pin & 0x00FF;
if (mapindex < 0 || mapindex >= ITEM_NUM(pin_irq_map))
{
return RT_NULL;
}
return &pin_irq_map[mapindex];
};
rt_inline const struct pin_irq_map *get_pin_irq_map(rt_uint32_t pinbit)
{
rt_int32_t mapindex = bit2bitno(pinbit);
if (mapindex < 0 || mapindex >= ITEM_NUM(pin_irq_map))
{
return RT_NULL;
}
return &pin_irq_map[mapindex];
};
const struct pin_index *get_pin(uint8_t pin)
{
const struct pin_index *index;
if (pin < ITEM_NUM(pins))
{
index = &pins[pin];
}
else
{
index = RT_NULL;
}
return index;
};
rt_err_t es32f0_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
{
const struct pin_index *index;
rt_base_t level;
rt_int32_t irqindex;
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
}
/**pin no. convert to dec no.**/
for (irqindex = 0; irqindex < 16; irqindex++)
{
if ((0x01 << irqindex) == index->pin)
{
break;
}
}
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == pin &&
pin_irq_hdr_tab[irqindex].hdr == hdr &&
pin_irq_hdr_tab[irqindex].mode == mode &&
pin_irq_hdr_tab[irqindex].args == args)
{
rt_hw_interrupt_enable(level);
return RT_EOK;
}
if (pin_irq_hdr_tab[irqindex].pin != -1)
{
rt_hw_interrupt_enable(level);
return RT_EBUSY;
}
pin_irq_hdr_tab[irqindex].pin = pin;
pin_irq_hdr_tab[irqindex].hdr = hdr;
pin_irq_hdr_tab[irqindex].mode = mode;
pin_irq_hdr_tab[irqindex].args = args;
rt_hw_interrupt_enable(level);
return RT_EOK;
}
rt_err_t gd32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
{
const struct pin_index *index;
rt_base_t level;
rt_int32_t hdr_index = -1;
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_EINVAL;
}
hdr_index = bit2bitno(index->pin);
if (hdr_index < 0 || hdr_index >= ITEM_NUM(pin_irq_map))
{
return RT_EINVAL;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[hdr_index].pin == pin &&
pin_irq_hdr_tab[hdr_index].hdr == hdr &&
pin_irq_hdr_tab[hdr_index].mode == mode &&
pin_irq_hdr_tab[hdr_index].args == args)
{
rt_hw_interrupt_enable(level);
return RT_EOK;
}
if (pin_irq_hdr_tab[hdr_index].pin != -1)
{
rt_hw_interrupt_enable(level);
return RT_EFULL;
}
pin_irq_hdr_tab[hdr_index].pin = pin;
pin_irq_hdr_tab[hdr_index].hdr = hdr;
pin_irq_hdr_tab[hdr_index].mode = mode;
pin_irq_hdr_tab[hdr_index].args = args;
rt_hw_interrupt_enable(level);
return RT_EOK;
}
rt_err_t es32f0_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_uint32_t enabled)
{
const struct pin_index *index;
const struct pin_irq_map *irqmap;
rt_base_t level;
rt_int32_t irqindex = -1;
/*Configure GPIO_InitStructure & EXTI_InitStructure*/
gpio_init_t gpio_initstruct;
exti_init_t exti_initstruct;
exti_initstruct.filter = DISABLE;
exti_initstruct.cks = EXTI_FILTER_CLOCK_10K;
exti_initstruct.filter_time = 0x0;
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
}
if (enabled == PIN_IRQ_ENABLE)
{
/**pin no. convert to dec no.**/
for (irqindex = 0; irqindex < 16; irqindex++)
{
if ((0x01 << irqindex) == index->pin)
{
break;
}
}
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
}
irqmap = &pin_irq_map[irqindex];
gpio_exti_init(index->gpio, index->pin, &exti_initstruct);
/* Configure GPIO_InitStructure */
gpio_initstruct.mode = GPIO_MODE_INPUT;
gpio_initstruct.func = GPIO_FUNC_1;
switch (pin_irq_hdr_tab[irqindex].mode)
{
case PIN_IRQ_MODE_RISING:
gpio_initstruct.pupd = GPIO_PUSH_DOWN;
gpio_exti_interrupt_config(index->pin, EXTI_TRIGGER_RISING_EDGE, ENABLE);
break;
case PIN_IRQ_MODE_FALLING:
gpio_initstruct.pupd = GPIO_PUSH_UP;
gpio_exti_interrupt_config(index->pin, EXTI_TRIGGER_TRAILING_EDGE, ENABLE);
break;
case PIN_IRQ_MODE_RISING_FALLING:
gpio_initstruct.pupd = GPIO_FLOATING;
gpio_exti_interrupt_config(index->pin, EXTI_TRIGGER_BOTH_EDGE, ENABLE);
break;
}
gpio_init(index->gpio, index->pin, &gpio_initstruct);
NVIC_EnableIRQ(irqmap->irqno);
rt_hw_interrupt_enable(level);
}
else if (enabled == PIN_IRQ_DISABLE)
{
irqmap = get_pin_irq_map(index->pin);
if (irqmap == RT_NULL)
{
return RT_ENOSYS;
}
NVIC_DisableIRQ(irqmap->irqno);
}
else
{
return RT_ENOSYS;
}
return RT_EOK;
}
rt_err_t gd32_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
{
const struct pin_index *index;
const struct pin_irq_map *irqmap;
rt_base_t level;
rt_int32_t hdr_index = -1;
exti_trig_type_enum trigger_mode;
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_EINVAL;
}
if (enabled == PIN_IRQ_ENABLE)
{
hdr_index = bit2bitno(index->pin);
if (hdr_index < 0 || hdr_index >= ITEM_NUM(pin_irq_map))
{
return RT_EINVAL;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[hdr_index].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_EINVAL;
}
irqmap = &pin_irq_map[hdr_index];
switch (pin_irq_hdr_tab[hdr_index].mode)
{
case PIN_IRQ_MODE_RISING:
trigger_mode = EXTI_TRIG_RISING;
break;
case PIN_IRQ_MODE_FALLING:
trigger_mode = EXTI_TRIG_FALLING;
break;
case PIN_IRQ_MODE_RISING_FALLING:
trigger_mode = EXTI_TRIG_BOTH;
break;
default:
rt_hw_interrupt_enable(level);
return RT_EINVAL;
}
//rcu_periph_clock_enable(RCU_AF);
/* enable and set interrupt priority */
nvic_irq_enable(irqmap->irqno, 5U);
/* connect EXTI line to GPIO pin */
syscfg_exti_line_config(index->port_src, index->pin_src);
/* configure EXTI line */
exti_init((exti_line_enum)(index->pin), EXTI_INTERRUPT, trigger_mode);
exti_interrupt_flag_clear((exti_line_enum)(index->pin));
rt_hw_interrupt_enable(level);
}
else if (enabled == PIN_IRQ_DISABLE)
{
irqmap = get_pin_irq_map(index->pin);
if (irqmap == RT_NULL)
{
return RT_EINVAL;
}
nvic_irq_disable(irqmap->irqno);
}
else
{
return RT_EINVAL;
}
return RT_EOK;
}
rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_uint32_t enabled)
{
const struct pin_index *index;
const struct pin_irq_map *irqmap;
rt_base_t level;
rt_int32_t irqindex = -1;
GPIO_InitTypeDef GPIO_InitStruct;
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
}
if (enabled == PIN_IRQ_ENABLE)
{
irqindex = bit2bitno(index->pin);
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
{
return RT_ENOSYS;
}
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
}
irqmap = &pin_irq_map[irqindex];
/* GPIO Periph clock enable */
index->rcc();
/* Configure GPIO_InitStructure */
GPIO_InitStruct.Pin = index->pin;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
switch (pin_irq_hdr_tab[irqindex].mode)
{
case PIN_IRQ_MODE_RISING:
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
break;
case PIN_IRQ_MODE_FALLING:
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
break;
case PIN_IRQ_MODE_RISING_FALLING:
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;
break;
}
HAL_GPIO_Init(index->gpio, &GPIO_InitStruct);
HAL_NVIC_SetPriority(irqmap->irqno, 5, 0);
HAL_NVIC_EnableIRQ(irqmap->irqno);
rt_hw_interrupt_enable(level);
}
else if (enabled == PIN_IRQ_DISABLE)
{
irqmap = get_pin_irq_map(index->pin);
if (irqmap == RT_NULL)
{
return RT_ENOSYS;
}
HAL_NVIC_DisableIRQ(irqmap->irqno);
}
else
{
return RT_ENOSYS;
}
return RT_EOK;
}
