void ZigBee_InitSpi()
{
RCC_APB1PeriphClockCmd(MAKENAME(RCC_APB1Periph_SPI,ZIGBEE_SPI), ENABLE);
// SPI initialization
SPI_InitTypeDef SPI_InitStructure;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(MAKENAME(SPI,ZIGBEE_SPI), &SPI_InitStructure);
SPI_SSOutputCmd(MAKENAME(SPI,ZIGBEE_SPI), ENABLE); // MOST IMPORTANT LINE FOR SPI !!!!
SPI_RxFIFOThresholdConfig(MAKENAME(SPI,ZIGBEE_SPI), SPI_RxFIFOThreshold_QF);
SPI_Cmd(MAKENAME(SPI,ZIGBEE_SPI), ENABLE);
/*
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = MAKENAME(SPI,ZIGBEE_SPI)_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
*/
}
void ZigBee_Reset(void)
{
#ifdef ZIGBEE_RESET_PIN
GPIO_ResetBits(MAKENAME(GPIO,ZIGBEE_RESET_PORT), MAKENAME(GPIO_Pin_,ZIGBEE_RESET_PIN)); // Toggle ATRF reset pin
_delay_ms(10);
GPIO_SetBits(MAKENAME(GPIO,ZIGBEE_RESET_PORT), MAKENAME(GPIO_Pin_,ZIGBEE_RESET_PIN)); // Toggle ATRF reset pin
#endif
}
void ZigBee_WriteReg(uint8_t addr, uint8_t val)
{
SPI_TypeDef* SPI = MAKENAME(SPI,ZIGBEE_SPI);
//read off any remaining bytes
while(SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE))
SPI_ReceiveData8(SPI);
//enable NSS pin
PullDown();
_delay_us(1);
//wait until TX buffer is empty
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_TXE));
uint8_t cmd = addr;
cmd |= 0xC0; // write cmd
SPI_SendData8(SPI, cmd);
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE));
SPI_ReceiveData8(SPI);
SPI_SendData8(SPI, val);
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE));
SPI_ReceiveData8(SPI);
_delay_us(1);
PullUp();
}
void ZigBee_ReadFrame(uint8_t * data, uint8_t * len)
{
uint8_t resp;
SPI_TypeDef* SPI = MAKENAME(SPI,ZIGBEE_SPI);
//read off any bytes in the buffer
while(SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE));
resp = SPI_ReceiveData8(SPI);
//enable select pin
PullDown();
_delay_us(1);
//wait until TX buffer is empty
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_TXE));
//send the read command
SPI_SendData8(SPI, 0x20);
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE));
resp = SPI_ReceiveData8(SPI);
//receive the buffer length
SPI_SendData8(SPI, 0);
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE));
resp = SPI_ReceiveData8(SPI);
uint8_t nbytes = resp+3; //packet + lqi + ed + status (link quality indicatior) (energy detection)
*len = nbytes; //set the return value
// Datasheet says max buffer access is 5 + frame length = 132
// 2 reads come before frame, 3 after
// First 2 reads not included in nbytes
// Therefore, max nbytes size is 132 - 2 = 130
if (nbytes > 130)
{
*len = 0;
_delay_us(1);
PullUp();
return;
}
for (uint8_t ii=0; ii<nbytes; ii++)
{
SPI_SendData8(SPI, 0);
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE));
resp = SPI_ReceiveData8(SPI); //receive data
*data++ = resp;
}
_delay_us(1);
PullUp();
}
IMG_INT PVRSRVDrmUnload(struct drm_device *dev)
{
PVR_TRACE(("PVRSRVDrmUnload"));
#if defined(DISPLAY_CONTROLLER)
MAKENAME(DISPLAY_CONTROLLER, _Cleanup)(dev);
#endif
PVRCore_Cleanup();
#if defined(PDUMP)
dbgdrv_cleanup();
#endif
return 0;
}
static
int
fstest_remove(const char *fs, const char *namesuffix)
{
char name[32];
char buf[32];
int err;
MAKENAME();
strcpy(buf, name);
err = vfs_remove(buf);
if (err) {
kprintf("Could not remove %s: %s\n", name, strerror(err));
return -1;
}
return 0;
}
void ZigBee_InitSpi()
{
// SPI might be on APB1 (36 MHz) or APB2 (72 MHz)
#if defined(STM32F303xC)
#if ZIGBEE_SPI == 1
RCC_APB2PeriphClockCmd(MAKENAME(RCC_APB2Periph_SPI,ZIGBEE_SPI), ENABLE);
uint32_t baud_rate_prescaler = SPI_BaudRatePrescaler_16;
#elif ZIGBEE_SPI == 2 || ZIGBEE_SPI == 3
RCC_APB1PeriphClockCmd(MAKENAME(RCC_APB2Periph_SPI,ZIGBEE_SPI), ENABLE);
uint32_t baud_rate_prescaler = SPI_BaudRatePrescaler_8;
#endif
#elif defined(STM32F37X)
RCC_APB1PeriphClockCmd(MAKENAME(RCC_APB1Periph_SPI,ZIGBEE_SPI), ENABLE);
uint32_t baud_rate_prescaler = SPI_BaudRatePrescaler_8;
#else
#error("Unrecognized target. The Makefile should define one of the following: {STM32F37X, STM32F303xC}")
#endif
// SPI initialization
SPI_InitTypeDef SPI_InitStructure;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = baud_rate_prescaler;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(MAKENAME(SPI,ZIGBEE_SPI), &SPI_InitStructure);
SPI_SSOutputCmd(MAKENAME(SPI,ZIGBEE_SPI), ENABLE); // MOST IMPORTANT LINE FOR SPI !!!!
SPI_RxFIFOThresholdConfig(MAKENAME(SPI,ZIGBEE_SPI), SPI_RxFIFOThreshold_QF);
SPI_Cmd(MAKENAME(SPI,ZIGBEE_SPI), ENABLE);
/*
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = MAKENAME(SPI,ZIGBEE_SPI)_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
*/
}
IMG_INT PVRSRVDrmLoad(struct drm_device *dev, unsigned long flags)
{
IMG_INT iRes;
PVR_TRACE(("PVRSRVDrmLoad"));
gpsPVRDRMDev = dev;
gpsPVRLDMDev = dev->pdev;
#if defined(PDUMP)
iRes = dbgdrv_init();
if (iRes != 0)
{
return iRes;
}
#endif
iRes = PVRCore_Init();
if (iRes != 0)
{
goto exit_dbgdrv_cleanup;
}
#if defined(DISPLAY_CONTROLLER)
iRes = MAKENAME(DISPLAY_CONTROLLER, _Init)(dev);
if (iRes != 0)
{
goto exit_pvrcore_cleanup;
}
#endif
return 0;
#if defined(DISPLAY_CONTROLLER)
exit_pvrcore_cleanup:
PVRCore_Cleanup();
#endif
exit_dbgdrv_cleanup:
#if defined(PDUMP)
dbgdrv_cleanup();
#endif
return iRes;
}
uint8_t ZigBee_WriteFrame(const void* data, uint8_t len)
{
if (len > MAX_ZIGBEE_PACKET_BYTES)
return -1;
SPI_TypeDef* SPI = MAKENAME(SPI,ZIGBEE_SPI);
const uint8_t *tx_ptr = data;
//clear any remaining bytes
while(SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE))
SPI_ReceiveData8(SPI);
PullDown();
_delay_us(1);
//wait until TX buffer is empty
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_TXE));
SPI_SendData8(SPI, 0x60);
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE));
SPI_ReceiveData8(SPI);
SPI_SendData8(SPI, len+2); //two extra bytes for the 16-bit CRC
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE));
SPI_ReceiveData8(SPI);
for(int ii = 0; ii < len; ii++)
{
SPI_SendData8(SPI, tx_ptr[ii]);
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE));
SPI_ReceiveData8(SPI);
}
_delay_us(1);
PullUp();
ZigBee_WriteReg(REG_TRX_STATE, 0x02); //alternate method for signaling to send
return 0;
}
void ZigBee_ReadReg(uint8_t addr, uint8_t len, uint8_t * dest)
{
uint8_t resp;
SPI_TypeDef* SPI = MAKENAME(SPI,ZIGBEE_SPI);
//read off any remaining bytes
while(SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE))
resp = SPI_ReceiveData8(SPI);
PullDown();
_delay_us(1);
for(uint8_t ii=0; ii<len; ii++)
{
//wait until TX buffer is empty
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_TXE));
uint8_t cmd = addr;
cmd |= 0x80; // read cmd
SPI_SendData8(SPI, cmd); //send the command
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE));
resp = SPI_ReceiveData8(SPI); //this is PHY_STATUS byte from ZigBee
SPI_SendData8(SPI, 0); // send dummy
while(!SPI_I2S_GetFlagStatus(SPI, SPI_I2S_FLAG_RXNE));
resp = SPI_ReceiveData8(SPI);
*dest++ = resp;
}
_delay_us(1);
PullUp();
}
void initTimeBase(void)
{
uint16_t PrescalerValue = 0;
#if defined(TIMEBASE_INT1_FREQ)
if ((SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT1_FREQ - 1) < 1)
{
printf("TIMEBASE period 1 is too large. Increase frequency or decrease clock.");
ErrorTrap(ERROR_TIMEBASE_CONFIG);
}
#endif
#if defined(TIMEBASE_INT2_FREQ)
if ((SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT2_FREQ - 1) < 1)
{
printf("TIMEBASE period 2 is too large. Increase frequency or decrease clock.");
ErrorTrap(ERROR_TIMEBASE_CONFIG);
}
#endif
#if defined(TIMEBASE_INT3_FREQ)
if ((SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT3_FREQ - 1) < 1)
{
printf("TIMEBASE period 3 is too large. Increase frequency or decrease clock.");
ErrorTrap(ERROR_TIMEBASE_CONFIG);
}
#endif
#if defined(TIMEBASE_INT4_FREQ)
if ((SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT4_FREQ - 1) < 1)
{
printf("TIMEBASE period 4 is too large. Increase frequency or decrease clock.");
ErrorTrap(ERROR_TIMEBASE_CONFIG);
}
#endif
NVIC_InitTypeDef NVIC_InitStructure;
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
/* TIM clock enable */
#if defined(STM32F303xC)
#if TIMEBASE_TIMER == 2 || TIMEBASE_TIMER == 3 || TIMEBASE_TIMER == 4 || TIMEBASE_TIMER == 6 || TIMEBASE_TIMER == 7
RCC_APB1PeriphClockCmd(MAKENAME(RCC_APB1Periph_TIM,TIMEBASE_TIMER), ENABLE);
#elif TIMEBASE_TIMER == 1 || TIMEBASE_TIMER == 8 || TIMEBASE_TIMER == 15 || TIMEBASE_TIMER == 16 || TIMEBASE_TIMER == 17
RCC_APB2PeriphClockCmd(MAKENAME(RCC_APB2Periph_TIM,TIMEBASE_TIMER), ENABLE);
#endif
#elif defined(STM32F37X)
#if TIMEBASE_TIMER == 15 || TIMEBASE_TIMER == 16 || TIMEBASE_TIMER == 17 || TIMEBASE_TIMER == 19
RCC_APB2PeriphClockCmd(MAKENAME(RCC_APB2Periph_TIM,TIMEBASE_TIMER), ENABLE);
#else
RCC_APB1PeriphClockCmd(MAKENAME(RCC_APB1Periph_TIM,TIMEBASE_TIMER), ENABLE);
#endif
#else
#error("Unrecognized target. The Makefile should define one of the following: {STM32F37X, STM32F303xC}")
#endif
/* Enable the TIM gloabal Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = MAKENAME(TIMER_INTERRUPT,n);
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Compute the prescaler value */
PrescalerValue = (uint16_t) (TIMEBASE_CLOCK_PSC - 1);
/* Time base configuration */
#if TIMEBASE_TIMER == 6 || TIMEBASE_TIMER == 7 || TIMEBASE_TIMER == 18
TIM_TimeBaseStructure.TIM_Period = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT1_FREQ - 1);
/* TIM Interrupts enable */
TIM_ITConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_Update, ENABLE);
#else
#if TIMEBASE_TIMER == 2 || TIMEBASE_TIMER == 5
TIM_TimeBaseStructure.TIM_Period = 4294967295;
#else
TIM_TimeBaseStructure.TIM_Period = 65535;
#endif
#endif
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(MAKENAME(TIM,TIMEBASE_TIMER), &TIM_TimeBaseStructure);
/* Prescaler configuration */
TIM_PrescalerConfig(MAKENAME(TIM,TIMEBASE_TIMER), PrescalerValue, TIM_PSCReloadMode_Immediate);
#if TIMEBASE_TIMER != 6 && TIMEBASE_TIMER != 7 && TIMEBASE_TIMER != 18
/* Output Compare Timing Mode configuration: Channel1 */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Timing;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT1_FREQ - 1);
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OC1Init(MAKENAME(TIM,TIMEBASE_TIMER), &TIM_OCInitStructure);
TIM_OC1PreloadConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_OCPreload_Disable);
/* TIM Interrupts enable */
TIM_ITConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC1, ENABLE);
#if defined(TIMEBASE_INT2_FREQ) && TIMEBASE_TIMER != 13 && TIMEBASE_TIMER != 14 && TIMEBASE_TIMER != 16 && TIMEBASE_TIMER != 17
/* Output Compare Timing Mode configuration: Channel2 */
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT2_FREQ - 1);
TIM_OC2Init(MAKENAME(TIM,TIMEBASE_TIMER), &TIM_OCInitStructure);
TIM_OC2PreloadConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_OCPreload_Disable);
/* TIM Interrupts enable */
TIM_ITConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC2, ENABLE);
#if defined(TIMEBASE_INT3_FREQ) && TIMEBASE_TIMER != 12 && TIMEBASE_TIMER != 15
/* Output Compare Timing Mode configuration: Channel3 */
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT3_FREQ - 1);
TIM_OC3Init(MAKENAME(TIM,TIMEBASE_TIMER), &TIM_OCInitStructure);
TIM_OC3PreloadConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_OCPreload_Disable);
/* TIM Interrupts enable */
TIM_ITConfig(MAKENAME(TIM,TIMEBASE_TIMER),TIM_IT_CC3, ENABLE);
#ifdef TIMEBASE_INT4_FREQ
/* Output Compare Timing Mode configuration: Channel4 */
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT4_FREQ - 1);
TIM_OC4Init(MAKENAME(TIM,TIMEBASE_TIMER), &TIM_OCInitStructure);
TIM_OC4PreloadConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_OCPreload_Disable);
/* TIM Interrupts enable */
TIM_ITConfig(MAKENAME(TIM,TIMEBASE_TIMER),TIM_IT_CC4, ENABLE);
#endif //TIMEBASE_INT4_FREQ
#endif //defined(TIMEBASE_INT3_FREQ) && TIMEBASE_TIMER != 12 && TIMEBASE_TIMER != 15
#endif //defined(TIMEBASE_INT2_FREQ) && TIMEBASE_TIMER != 13 && TIMEBASE_TIMER != 14 && TIMEBASE_TIMER != 16 && TIMEBASE_TIMER != 17
#endif //TIMEBASE_TIMER != 6 || TIMEBASE_TIMER != 7 || TIMEBASE_TIMER != 18
/* TIM enable counter */
//TIM_Cmd(MAKENAME(TIM,TIMEBASE_TIMER), ENABLE); //Don't do this here, require a PlayTimebase call! Everyone loves PlayTime...base. All your base belong to PlayTime?
}
{
#define MATH(A, B, C) MATHF1_2(SUB, A, B, C)
DRAW_TILE();
#undef MATH
}
static void MAKENAME(NAME1, SubS1_2_, NAME2) (ARGS)
{
#define MATH(A, B, C) MATHS1_2(SUB, A, B, C)
DRAW_TILE();
#undef MATH
}
static void (*MAKENAME(Renderers_, NAME1, NAME2)[7]) (ARGS) =
{
MAKENAME(NAME1, _, NAME2),
MAKENAME(NAME1, Add_, NAME2),
MAKENAME(NAME1, AddF1_2_, NAME2),
MAKENAME(NAME1, AddS1_2_, NAME2),
MAKENAME(NAME1, Sub_, NAME2),
MAKENAME(NAME1, SubF1_2_, NAME2),
MAKENAME(NAME1, SubS1_2_, NAME2)
};
#undef MAKENAME
#undef CONCAT3
#endif
#endif
#endif
static
int
fstest_read(const char *fs, const char *namesuffix)
{
struct vnode *vn;
int err;
int i;
size_t bytes=0;
char name[32];
char buf[32];
struct iovec iov;
struct uio ku;
MAKENAME();
/* vfs_open destroys the string it's passed */
strcpy(buf, name);
err = vfs_open(buf, O_RDONLY, 0664, &vn);
if (err) {
kprintf("Could not open test file for read: %s\n",
strerror(err));
return -1;
}
for (i=0; i<NCHUNKS; i++) {
uio_kinit(&iov, &ku, buf, strlen(SLOGAN), bytes, UIO_READ);
err = VOP_READ(vn, &ku);
if (err) {
kprintf("%s: Read error: %s\n", name, strerror(err));
vfs_close(vn);
return -1;
}
if (ku.uio_resid > 0) {
kprintf("%s: Short read: %lu bytes left over\n", name,
(unsigned long) ku.uio_resid);
vfs_close(vn);
return -1;
}
buf[strlen(SLOGAN)] = 0;
rotate(buf, -i);
if (strcmp(buf, SLOGAN)) {
kprintf("%s: Test failed: line %d mismatched: %s\n",
name, i+1, buf);
vfs_close(vn);
return -1;
}
bytes = ku.uio_offset;
}
vfs_close(vn);
if (bytes != NCHUNKS*strlen(SLOGAN)) {
kprintf("%s: %lu bytes read, should have been %lu!\n",
name, (unsigned long) bytes,
(unsigned long) (NCHUNKS*strlen(SLOGAN)));
return -1;
}
kprintf("%s: %lu bytes read\n", name, (unsigned long) bytes);
return 0;
}
static
int
fstest_write(const char *fs, const char *namesuffix,
int stridesize, int stridepos)
{
struct vnode *vn;
int err;
int i;
size_t shouldbytes=0;
size_t bytes=0;
off_t pos=0;
char name[32];
char buf[32];
struct iovec iov;
struct uio ku;
int flags;
KASSERT(sizeof(buf) > strlen(SLOGAN));
MAKENAME();
flags = O_WRONLY|O_CREAT;
if (stridesize == 1) {
flags |= O_TRUNC;
}
/* vfs_open destroys the string it's passed */
strcpy(buf, name);
err = vfs_open(buf, flags, 0664, &vn);
if (err) {
kprintf("Could not open %s for write: %s\n",
name, strerror(err));
return -1;
}
for (i=0; i<NCHUNKS; i++) {
if (i % stridesize != stridepos) {
pos += strlen(SLOGAN);
continue;
}
strcpy(buf, SLOGAN);
rotate(buf, i);
uio_kinit(&iov, &ku, buf, strlen(SLOGAN), pos, UIO_WRITE);
err = VOP_WRITE(vn, &ku);
if (err) {
kprintf("%s: Write error: %s\n", name, strerror(err));
vfs_close(vn);
vfs_remove(name);
return -1;
}
if (ku.uio_resid > 0) {
kprintf("%s: Short write: %lu bytes left over\n",
name, (unsigned long) ku.uio_resid);
vfs_close(vn);
vfs_remove(name);
return -1;
}
bytes += (ku.uio_offset - pos);
shouldbytes += strlen(SLOGAN);
pos = ku.uio_offset;
}
vfs_close(vn);
if (bytes != shouldbytes) {
kprintf("%s: %lu bytes written, should have been %lu!\n",
name, (unsigned long) bytes,
(unsigned long) (NCHUNKS*strlen(SLOGAN)));
vfs_remove(name);
return -1;
}
kprintf("%s: %lu bytes written\n", name, (unsigned long) bytes);
return 0;
}
static inline void PullUp()
{
GPIO_SetBits(MAKENAME(GPIO,ZIGBEE_SS_PORT), MAKENAME(GPIO_Pin_,ZIGBEE_SS_PIN));
}
void TIMER_INTERRUPT_FCN(void)
{
#if TIMEBASE_TIMER == 6 || TIMEBASE_TIMER == 7 || TIMEBASE_TIMER == 18
if (TIM_GetITStatus(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_Update) != RESET)
{
TIM_ClearITPendingBit(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_Update);
timerCallback1();
}
#endif //TIMEBASE_TIMER == 6 || TIMEBASE_TIMER == 7 || TIMEBASE_TIMER == 18
#if TIMEBASE_TIMER != 6 && TIMEBASE_TIMER != 7 && TIMEBASE_TIMER != 18
#ifdef TIMEBASE_SIZE
TIMEBASE_SIZE capture_val = 0;
TIMEBASE_SIZE next_capture_val = 0;
TIMEBASE_SIZE clock_val = 0;
TIMEBASE_SIZE gap_val = 0;
#endif
if (TIM_GetITStatus(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC1) != RESET)
{
TIM_ClearITPendingBit(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC1);
timerCallback1();
capture_val = TIM_GetCapture1(MAKENAME(TIM,TIMEBASE_TIMER));
clock_val = TIM_GetCounter(MAKENAME(TIM,TIMEBASE_TIMER));
gap_val = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT1_FREQ - 1);
next_capture_val = capture_val + gap_val;
while( (((clock_val > next_capture_val) || (clock_val < capture_val)) && (capture_val < next_capture_val)) || ((clock_val > next_capture_val) && (clock_val < capture_val)) )
{
//increment capture and next_capture by gap_val
capture_val += gap_val;
next_capture_val = capture_val + gap_val;
clock_val = TIM_GetCounter(MAKENAME(TIM,TIMEBASE_TIMER));
}
TIM_SetCompare1(MAKENAME(TIM,TIMEBASE_TIMER), next_capture_val);
}
#if defined(TIMEBASE_INT2_FREQ) && TIMEBASE_TIMER != 13 && TIMEBASE_TIMER != 14 && TIMEBASE_TIMER != 16 && TIMEBASE_TIMER != 17
if (TIM_GetITStatus(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC2) != RESET)
{
TIM_ClearITPendingBit(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC2);
timerCallback2();
capture_val = TIM_GetCapture2(MAKENAME(TIM,TIMEBASE_TIMER));
clock_val = TIM_GetCounter(MAKENAME(TIM,TIMEBASE_TIMER));
gap_val = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT2_FREQ - 1);
next_capture_val = capture_val + gap_val;
while( (((clock_val > next_capture_val) || (clock_val < capture_val)) && (capture_val < next_capture_val)) || ((clock_val > next_capture_val) && (clock_val < capture_val)) )
{
//increment capture and next_capture by gap_val
capture_val += gap_val;
next_capture_val = capture_val + gap_val;
clock_val = TIM_GetCounter(MAKENAME(TIM,TIMEBASE_TIMER));
}
TIM_SetCompare2(MAKENAME(TIM,TIMEBASE_TIMER), next_capture_val);
}
#if defined(TIMEBASE_INT3_FREQ) && TIMEBASE_TIMER != 12 && TIMEBASE_TIMER != 15
if (TIM_GetITStatus(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC3) != RESET)
{
TIM_ClearITPendingBit(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC3);
timerCallback3();
capture_val = TIM_GetCapture3(MAKENAME(TIM,TIMEBASE_TIMER));
clock_val = TIM_GetCounter(MAKENAME(TIM,TIMEBASE_TIMER));
gap_val = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT3_FREQ - 1);
next_capture_val = capture_val + gap_val;
while( (((clock_val > next_capture_val) || (clock_val < capture_val)) && (capture_val < next_capture_val)) || ((clock_val > next_capture_val) && (clock_val < capture_val)) )
{
//increment capture and next_capture by gap_val
capture_val += gap_val;
next_capture_val = capture_val + gap_val;
clock_val = TIM_GetCounter(MAKENAME(TIM,TIMEBASE_TIMER));
}
TIM_SetCompare3(MAKENAME(TIM,TIMEBASE_TIMER), next_capture_val);
}
#ifdef TIMEBASE_INT4_FREQ
if (TIM_GetITStatus(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC4) != RESET)
{
TIM_ClearITPendingBit(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC4);
timerCallback4();
capture_val = TIM_GetCapture4(MAKENAME(TIM,TIMEBASE_TIMER));
clock_val = TIM_GetCounter(MAKENAME(TIM,TIMEBASE_TIMER));
gap_val = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT4_FREQ - 1);
next_capture_val = capture_val + gap_val;
while( (((clock_val > next_capture_val) || (clock_val < capture_val)) && (capture_val < next_capture_val)) || ((clock_val > next_capture_val) && (clock_val < capture_val)) )
{
//increment capture and next_capture by gap_val
capture_val += gap_val;
next_capture_val = capture_val + gap_val;
clock_val = TIM_GetCounter(MAKENAME(TIM,TIMEBASE_TIMER));
}
TIM_SetCompare4(MAKENAME(TIM,TIMEBASE_TIMER), next_capture_val);
}
#endif //TIMEBASE_INT4_FREQ
#endif //defined(TIMEBASE_INT3_FREQ) && TIMEBASE_TIMER != 12 && TIMEBASE_TIMER != 15
#endif //defined(TIMEBASE_INT2_FREQ) && TIMEBASE_TIMER != 13 && TIMEBASE_TIMER != 14 && TIMEBASE_TIMER != 16 && TIMEBASE_TIMER != 17
#endif //TIMEBASE_TIMER != 6 || TIMEBASE_TIMER != 7 || TIMEBASE_TIMER != 18
}
void PlayTimebase(void)
{
TIM_Cmd(MAKENAME(TIM,TIMEBASE_TIMER), ENABLE);
}
void PauseTimebase(void)
{
TIM_Cmd(MAKENAME(TIM,TIMEBASE_TIMER), DISABLE);
}
static inline void PullDown()
{
GPIO_ResetBits(MAKENAME(GPIO,ZIGBEE_SS_PORT), MAKENAME(GPIO_Pin_,ZIGBEE_SS_PIN));
}
void ZigBee_InitPins()
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHBPeriphClockCmd(MAKENAME(RCC_AHBPeriph_GPIO,ZIGBEE_SCK_PORT), ENABLE);
RCC_AHBPeriphClockCmd(MAKENAME(RCC_AHBPeriph_GPIO,ZIGBEE_MISO_PORT), ENABLE);
RCC_AHBPeriphClockCmd(MAKENAME(RCC_AHBPeriph_GPIO,ZIGBEE_MOSI_PORT), ENABLE);
RCC_AHBPeriphClockCmd(MAKENAME(RCC_AHBPeriph_GPIO,ZIGBEE_SS_PORT), ENABLE);
//SCK
GPIO_InitStructure.GPIO_Pin = MAKENAME(GPIO_Pin_,ZIGBEE_SCK_PIN);
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(MAKENAME(GPIO,ZIGBEE_SCK_PORT), &GPIO_InitStructure);
//MISO
GPIO_InitStructure.GPIO_Pin = MAKENAME(GPIO_Pin_,ZIGBEE_MISO_PIN);
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(MAKENAME(GPIO,ZIGBEE_MISO_PORT), &GPIO_InitStructure);
//MOSI
GPIO_InitStructure.GPIO_Pin = MAKENAME(GPIO_Pin_,ZIGBEE_MOSI_PIN);
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(MAKENAME(GPIO,ZIGBEE_MOSI_PORT), &GPIO_InitStructure);
// slave select
GPIO_InitStructure.GPIO_Pin = MAKENAME(GPIO_Pin_,ZIGBEE_SS_PIN);
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(MAKENAME(GPIO,ZIGBEE_SS_PORT), &GPIO_InitStructure);
// Configure SPI pins: SCK, MISO and MOSI
GPIO_PinAFConfig(MAKENAME(GPIO,ZIGBEE_SCK_PORT), MAKENAME(GPIO_PinSource,ZIGBEE_SCK_PIN), MAKENAME(GPIO_AF_,ZIGBEE_SCK_AF));
GPIO_PinAFConfig(MAKENAME(GPIO,ZIGBEE_MISO_PORT), MAKENAME(GPIO_PinSource,ZIGBEE_MISO_PIN), MAKENAME(GPIO_AF_,ZIGBEE_MISO_AF));
GPIO_PinAFConfig(MAKENAME(GPIO,ZIGBEE_MOSI_PORT), MAKENAME(GPIO_PinSource,ZIGBEE_MOSI_PIN), MAKENAME(GPIO_AF_,ZIGBEE_MOSI_AF));
#ifdef ZIGBEE_RESET_PIN
GPIO_InitStructure.GPIO_Pin = MAKENAME(GPIO_Pin_,ZIGBEE_RESET_PIN);
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(MAKENAME(GPIO,ZIGBEE_RESET_PORT), &GPIO_InitStructure);
#endif
}
