/******************************************************************************* * mvCpuIfPexRemap - Set CPU remap register for address windows. * * DESCRIPTION: * * INPUT: * pexTarget - Peripheral target enumerator. Must be a PEX target. * pAddrDecWin - CPU target window information data structure. * Note that caller has to fill in the base field only. The * size field is ignored. * * OUTPUT: * None. * * RETURN: * MV_ERROR if target is not a PEX one, MV_OK otherwise. * *******************************************************************************/ MV_U32 mvCpuIfPexRemap(MV_TARGET pexTarget, MV_ADDR_WIN *pAddrDecWin) { MV_U32 winNum; /* Check parameters */ if (mvCtrlPexMaxIfGet() > 1) { if ((!MV_TARGET_IS_PEX1(pexTarget))&&(!MV_TARGET_IS_PEX0(pexTarget))) { mvOsPrintf("mvCpuIfPexRemap: target %d is illegal\n",pexTarget); return 0xffffffff; } } else { if (!MV_TARGET_IS_PEX0(pexTarget)) { mvOsPrintf("mvCpuIfPexRemap: target %d is illegal\n",pexTarget); return 0xffffffff; } } /* get the Window number associated with this target */ winNum = mvAhbToMbusWinTargetGet(pexTarget); if (winNum >= MAX_AHB_TO_MBUS_WINS) { mvOsPrintf("mvCpuIfPexRemap: mvAhbToMbusWinTargetGet Failed\n"); return 0xffffffff; } return mvAhbToMbusWinRemap(winNum , pAddrDecWin); }
/******************************************************************************* * mvCpuIfTargetWinGet - Get CPU-to-peripheral target address window * * DESCRIPTION: * Get the CPU peripheral target address window. * * INPUT: * target - Peripheral target enumerator * * OUTPUT: * pAddrDecWin - CPU target window information data structure. * * RETURN: * MV_OK if target exist, MV_ERROR otherwise. * *******************************************************************************/ MV_STATUS mvCpuIfTargetWinGet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin) { MV_U32 winNum=0xffffffff; MV_AHB_TO_MBUS_DEC_WIN decWin; MV_DRAM_DEC_WIN addrDecWin; target = MV_CHANGE_BOOT_CS(target); /* Check parameters */ if (target >= MAX_TARGETS) { mvOsPrintf("mvCpuIfTargetWinGet: target %d is Illigal\n", target); return MV_ERROR; } /* Only MV88F6282 have 2 PCIe interfaces */ if((mvCtrlModelGet() != MV_6282_DEV_ID) && MV_TARGET_IS_PEX1(target)) return MV_NO_SUCH; if (MV_TARGET_IS_DRAM(target)) { if (mvDramIfWinGet(target,&addrDecWin) != MV_OK) { mvOsPrintf("mvCpuIfTargetWinGet: Failed to get window target %d\n", target); return MV_ERROR; } /* copy relevant data to MV_CPU_DEC_WIN structure */ pAddrDecWin->addrWin.baseLow = addrDecWin.addrWin.baseLow; pAddrDecWin->addrWin.baseHigh = addrDecWin.addrWin.baseHigh; pAddrDecWin->addrWin.size = addrDecWin.addrWin.size; pAddrDecWin->enable = addrDecWin.enable; pAddrDecWin->winNum = 0xffffffff; } else { /* get the Window number associated with this target */ winNum = mvAhbToMbusWinTargetGet(target); if (winNum >= mvAhbToMbusWinNum()) { return MV_NO_SUCH; } if (mvAhbToMbusWinGet(winNum , &decWin) != MV_OK) { mvOsPrintf("%s: mvAhbToMbusWinGet Failed at winNum = %d\n", __FUNCTION__, winNum); return MV_ERROR; } /* copy relevant data to MV_CPU_DEC_WIN structure */ pAddrDecWin->addrWin.baseLow = decWin.addrWin.baseLow; pAddrDecWin->addrWin.baseHigh = decWin.addrWin.baseHigh; pAddrDecWin->addrWin.size = decWin.addrWin.size; pAddrDecWin->enable = decWin.enable; pAddrDecWin->winNum = winNum; } return MV_OK; }
/******************************************************************************* * mvCpuIfInit - Initialize Controller CPU interface * * DESCRIPTION: * This function initialize Controller CPU interface: * 1. Set CPU interface configuration registers. * 2. Set CPU master Pizza arbiter control according to static * configuration described in configuration file. * 3. Opens CPU address decode windows. DRAM windows are assumed to be * already set (auto detection). * * INPUT: * None. * * OUTPUT: * None. * * RETURN: * None. * *******************************************************************************/ MV_STATUS mvCpuIfInit(MV_CPU_DEC_WIN *cpuAddrWinMap) { MV_U32 regVal; MV_TARGET target; MV_ADDR_WIN addrWin; if (cpuAddrWinMap == NULL) { DB(mvOsPrintf("mvCpuIfInit:ERR. cpuAddrWinMap == NULL\n")); return MV_ERROR; } /*Initialize the boot target array according to device type*/ if(mvCtrlModelGet() == MV_6180_DEV_ID || mvCtrlModelGet() == MV_6280_DEV_ID) sampleAtResetTargetArray = sampleAtResetTargetArray6180P; else sampleAtResetTargetArray = sampleAtResetTargetArrayP; /* Set ARM Configuration register */ regVal = MV_REG_READ(CPU_CONFIG_REG); regVal &= ~CPU_CONFIG_DEFAULT_MASK; regVal |= CPU_CONFIG_DEFAULT; MV_REG_WRITE(CPU_CONFIG_REG,regVal); /* First disable all CPU target windows */ for (target = 0; cpuAddrWinMap[target].enable != TBL_TERM; target++) { if ((MV_TARGET_IS_DRAM(target))||(target == INTER_REGS)) { continue; } #if defined(MV_MEM_OVER_PCI_WA) || defined(MV_UART_OVER_PCI_WA) /* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */ if (MV_TARGET_IS_PCI(target)) { continue; } #endif #if defined(MV_MEM_OVER_PEX_WA) || defined(MV_UART_OVER_PEX_WA) /* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */ if (MV_TARGET_IS_PEX(target)) { continue; } #endif #if defined(MV_RUN_FROM_FLASH) /* Don't disable the boot device. */ if (target == DEV_BOOCS) { continue; } #endif /* MV_RUN_FROM_FLASH */ /* Only MV88F6282 have 2 PCIe interfaces */ if((mvCtrlModelGet() != MV_6282_DEV_ID) && MV_TARGET_IS_PEX1(target)) continue; mvCpuIfTargetWinEnable(MV_CHANGE_BOOT_CS(target),MV_FALSE); } #if defined(MV_RUN_FROM_FLASH) /* Resize the bootcs windows before other windows, because this */ /* window is enabled and will cause an overlap if not resized. */ target = DEV_BOOCS; if (MV_OK != mvCpuIfTargetWinSet(target, &cpuAddrWinMap[target])) { DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinSet fail\n")); return MV_ERROR; } addrWin.baseLow = cpuAddrWinMap[target].addrWin.baseLow; addrWin.baseHigh = cpuAddrWinMap[target].addrWin.baseHigh; if (0xffffffff == mvAhbToMbusWinRemap(cpuAddrWinMap[target].winNum ,&addrWin)) { DB(mvOsPrintf("mvCpuIfInit:WARN. mvAhbToMbusWinRemap can't remap winNum=%d\n", cpuAddrWinMap[target].winNum)); } #endif /* MV_RUN_FROM_FLASH */ /* Go through all targets in user table until table terminator */ for (target = 0; cpuAddrWinMap[target].enable != TBL_TERM; target++) { #if defined(MV_RUN_FROM_FLASH) if (target == DEV_BOOCS) { continue; } #endif /* MV_RUN_FROM_FLASH */ /* if DRAM auto sizing is used do not initialized DRAM target windows, */ /* assuming this already has been done earlier. */ #ifdef MV_DRAM_AUTO_SIZE if (MV_TARGET_IS_DRAM(target)) { continue; } #endif #if defined(MV_MEM_OVER_PCI_WA) || defined(MV_UART_OVER_PCI_WA) /* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */ if (MV_TARGET_IS_PCI(target)) { continue; } #endif #if defined(MV_MEM_OVER_PEX_WA) || defined(MV_UART_OVER_PEX_WA) /* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */ if (MV_TARGET_IS_PEX(target)) { continue; } #endif /* If the target attribute is the same as the boot device attribute */ /* then it's stays disable */ if (MV_TARGET_IS_AS_BOOT(target)) { continue; } /* Only MV88F6282 have 2 PCIe interfaces */ if((mvCtrlModelGet() != MV_6282_DEV_ID) && MV_TARGET_IS_PEX1(target)) continue; if((0 == cpuAddrWinMap[target].addrWin.size) || (DIS == cpuAddrWinMap[target].enable)) { if (MV_OK != mvCpuIfTargetWinEnable(target, MV_FALSE)) { DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinEnable fail\n")); return MV_ERROR; } } else { if (MV_OK != mvCpuIfTargetWinSet(target, &cpuAddrWinMap[target])) { DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinSet fail\n")); return MV_ERROR; } addrWin.baseLow = cpuAddrWinMap[target].addrWin.baseLow; addrWin.baseHigh = cpuAddrWinMap[target].addrWin.baseHigh; if (0xffffffff == mvAhbToMbusWinRemap(cpuAddrWinMap[target].winNum ,&addrWin)) { DB(mvOsPrintf("mvCpuIfInit:WARN. mvAhbToMbusWinRemap can't remap winNum=%d\n", cpuAddrWinMap[target].winNum)); } } } return MV_OK; }