/*
** EDMA transfer completion ISR
*/
static void EDMA3CCComplIsr(void)
{
/* Check if transmit DMA completed */
if(EDMA3GetIntrStatus(EDMA_INST_BASE) & (1 << EDMA_CHANNEL_IN_USE))
{
/* Clear the interrupt status for the first channel */
EDMA3ClrIntr(EDMA_INST_BASE, EDMA_CHANNEL_IN_USE);
McASPTxDMAComplHandler();
}
}
/*
** EDMA transfer completion ISR
*/
static void EDMA3CCComplIsr(void)
{
#ifdef _TMS320C6X
IntEventClear(SYS_INT_EDMA3_0_CC0_INT1);
#else
IntSystemStatusClear(SYS_INT_CCINT0);
#endif
/* Check if receive DMA completed */
if(EDMA3GetIntrStatus(SOC_EDMA30CC_0_REGS) & (1 << EDMA3_CHA_MCASP0_RX))
{
/* Clear the interrupt status for the 0th channel */
EDMA3ClrIntr(SOC_EDMA30CC_0_REGS, EDMA3_CHA_MCASP0_RX);
McASPRxDMAComplHandler();
}
/* Check if transmit DMA completed */
if(EDMA3GetIntrStatus(SOC_EDMA30CC_0_REGS) & (1 << EDMA3_CHA_MCASP0_TX))
{
/* Clear the interrupt status for the first channel */
EDMA3ClrIntr(SOC_EDMA30CC_0_REGS, EDMA3_CHA_MCASP0_TX);
McASPTxDMAComplHandler();
}
}
