/*-------------------------------------------------------------------*/
void Map248_Set_PPU_Banks()
{
if( S.NesHeader.ROMSize > 0 ) {
if( Map248_Reg[0] & 0x80 ) {
W.PPUBANK[ 0 ] = VROMPAGE(Map248_Chr4 % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 1 ] = VROMPAGE(Map248_Chr5 % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 2 ] = VROMPAGE(Map248_Chr6 % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 3 ] = VROMPAGE(Map248_Chr7 % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 4 ] = VROMPAGE((Map248_Chr01+0) % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 5 ] = VROMPAGE((Map248_Chr01+1) % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 6 ] = VROMPAGE((Map248_Chr23+0) % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 7 ] = VROMPAGE((Map248_Chr23+1) % (S.NesHeader.VROMSize<<3));
NESCore_Develop_Character_Data();
} else {
W.PPUBANK[ 0 ] = VROMPAGE((Map248_Chr01+0) % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 1 ] = VROMPAGE((Map248_Chr01+1) % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 2 ] = VROMPAGE((Map248_Chr23+0) % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 3 ] = VROMPAGE((Map248_Chr23+1) % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 4 ] = VROMPAGE(Map248_Chr4 % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 5 ] = VROMPAGE(Map248_Chr5 % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 6 ] = VROMPAGE(Map248_Chr6 % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 7 ] = VROMPAGE(Map248_Chr7 % (S.NesHeader.VROMSize<<3));
NESCore_Develop_Character_Data();
}
}
}
/*-------------------------------------------------------------------*/
void Map151_Write( word wAddr, byte byData )
{
/* Set ROM Banks */
switch( wAddr & 0xF000 )
{
case 0x8000:
W.ROMBANK0 = ROMPAGE( byData % ( S.NesHeader.ROMSize << 1 ) );
break;
case 0xA000:
W.ROMBANK1 = ROMPAGE( byData % ( S.NesHeader.ROMSize << 1 ) );
break;
case 0xC000:
W.ROMBANK2 = ROMPAGE( byData % ( S.NesHeader.ROMSize << 1 ) );
break;
case 0xE000:
W.PPUBANK[ 0 ] = VROMPAGE( ( byData*4+0 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 1 ] = VROMPAGE( ( byData*4+1 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 2 ] = VROMPAGE( ( byData*4+2 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 3 ] = VROMPAGE( ( byData*4+3 ) % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xF000:
W.PPUBANK[ 4 ] = VROMPAGE( ( byData*4+0 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 5 ] = VROMPAGE( ( byData*4+1 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 6 ] = VROMPAGE( ( byData*4+2 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 7 ] = VROMPAGE( ( byData*4+3 ) % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
}
}
/*-------------------------------------------------------------------*/
void Map193_Sram( word wAddr, byte byData )
{
switch( wAddr ) {
case 0x6000:
W.PPUBANK[ 0 ] = VROMPAGE( ((byData&0xfc) + 0 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 1 ] = VROMPAGE( ((byData&0xfc) + 1 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 2 ] = VROMPAGE( ((byData&0xfc) + 2 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 3 ] = VROMPAGE( ((byData&0xfc) + 3 ) % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0x6001:
W.PPUBANK[ 4 ] = VROMPAGE( ( byData + 0 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 5 ] = VROMPAGE( ( byData + 1 ) % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0x6002:
W.PPUBANK[ 6 ] = VROMPAGE( ( byData + 0 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 7 ] = VROMPAGE( ( byData + 1 ) % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0x6003:
W.ROMBANK0 = ROMPAGE( ((byData<<2) + 0 ) % ( S.NesHeader.ROMSize << 1 ) );
W.ROMBANK1 = ROMPAGE( ((byData<<2) + 1 ) % ( S.NesHeader.ROMSize << 1 ) );
W.ROMBANK2 = ROMPAGE( ((byData<<2) + 2 ) % ( S.NesHeader.ROMSize << 1 ) );
W.ROMBANK3 = ROMPAGE( ((byData<<2) + 3 ) % ( S.NesHeader.ROMSize << 1 ) );
break;
}
}
/*-------------------------------------------------------------------*/
void Map249_Write( word wAddr, byte byData )
{
byte byM0,byM1,byM2,byM3,byM4,byM5,byM6,byM7;
switch( wAddr&0xFF01 ) {
case 0x8000:
case 0x8800:
Map249_Reg[0] = byData;
break;
case 0x8001:
case 0x8801:
switch( Map249_Reg[0] & 0x07 ) {
case 0x00:
if( Map249_Spdata == 1 ) {
byM0=byData&0x1;
byM1=(byData&0x02)>>1;
byM2=(byData&0x04)>>2;
byM3=(byData&0x08)>>3;
byM4=(byData&0x10)>>4;
byM5=(byData&0x20)>>5;
byM6=(byData&0x40)>>6;
byM7=(byData&0x80)>>7;
byData=(byM5<<7)|(byM4<<6)|(byM2<<5)|(byM6<<4)|(byM7<<3)|(byM3<<2)|(byM1<<1)|byM0;
}
W.PPUBANK[ 0 ] = VROMPAGE((byData&0xFE) % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 1 ] = VROMPAGE((byData|0x01) % (S.NesHeader.VROMSize<<3));
NESCore_Develop_Character_Data();
break;
case 0x01:
if( Map249_Spdata == 1 ) {
byM0=byData&0x1;
byM1=(byData&0x02)>>1;
byM2=(byData&0x04)>>2;
byM3=(byData&0x08)>>3;
byM4=(byData&0x10)>>4;
byM5=(byData&0x20)>>5;
byM6=(byData&0x40)>>6;
byM7=(byData&0x80)>>7;
byData=(byM5<<7)|(byM4<<6)|(byM2<<5)|(byM6<<4)|(byM7<<3)|(byM3<<2)|(byM1<<1)|byM0;
}
W.PPUBANK[ 2 ] = VROMPAGE((byData&0xFE) % (S.NesHeader.VROMSize<<3));
W.PPUBANK[ 3 ] = VROMPAGE((byData|0x01) % (S.NesHeader.VROMSize<<3));
NESCore_Develop_Character_Data();
break;
case 0x02:
if( Map249_Spdata == 1 ) {
byM0=byData&0x1;
byM1=(byData&0x02)>>1;
byM2=(byData&0x04)>>2;
byM3=(byData&0x08)>>3;
byM4=(byData&0x10)>>4;
byM5=(byData&0x20)>>5;
byM6=(byData&0x40)>>6;
byM7=(byData&0x80)>>7;
byData=(byM5<<7)|(byM4<<6)|(byM2<<5)|(byM6<<4)|(byM7<<3)|(byM3<<2)|(byM1<<1)|byM0;
}
void Map10_PPU( word wAddr )
{
/* Control Latch Selector */
switch ( wAddr & 0x3ff0 )
{
case 0x0fd0:
/* Latch Control */
latch3.state = 0xfd;
/* Set PPU Banks */
W.PPUBANK[ 0 ] = VROMPAGE( latch3.lo_bank );
W.PPUBANK[ 1 ] = VROMPAGE( latch3.lo_bank + 1 );
W.PPUBANK[ 2 ] = VROMPAGE( latch3.lo_bank + 2 );
W.PPUBANK[ 3 ] = VROMPAGE( latch3.lo_bank + 3 );
NESCore_Develop_Character_Data();
break;
case 0x0fe0:
/* Latch Control */
latch3.state = 0xfe;
/* Set PPU Banks */
W.PPUBANK[ 0 ] = VROMPAGE( latch3.hi_bank );
W.PPUBANK[ 1 ] = VROMPAGE( latch3.hi_bank + 1 );
W.PPUBANK[ 2 ] = VROMPAGE( latch3.hi_bank + 2 );
W.PPUBANK[ 3 ] = VROMPAGE( latch3.hi_bank + 3 );
NESCore_Develop_Character_Data();
break;
case 0x1fd0:
/* Latch Control */
latch4.state = 0xfd;
/* Set PPU Banks */
W.PPUBANK[ 4 ] = VROMPAGE( latch4.lo_bank );
W.PPUBANK[ 5 ] = VROMPAGE( latch4.lo_bank + 1 );
W.PPUBANK[ 6 ] = VROMPAGE( latch4.lo_bank + 2 );
W.PPUBANK[ 7 ] = VROMPAGE( latch4.lo_bank + 3 );
NESCore_Develop_Character_Data();
break;
case 0x1fe0:
/* Latch Control */
latch4.state = 0xfe;
/* Set PPU Banks */
W.PPUBANK[ 4 ] = VROMPAGE( latch4.hi_bank );
W.PPUBANK[ 5 ] = VROMPAGE( latch4.hi_bank + 1 );
W.PPUBANK[ 6 ] = VROMPAGE( latch4.hi_bank + 2 );
W.PPUBANK[ 7 ] = VROMPAGE( latch4.hi_bank + 3 );
NESCore_Develop_Character_Data();
break;
}
}
/*-------------------------------------------------------------------*/
void Map78_Write( word wAddr, byte byData )
{
byte byPrgBank = byData & 0x0f;
byte byChrBank = ( byData & 0xf0 ) >> 4;
/* Set ROM Banks */
byPrgBank <<= 1;
byPrgBank %= ( S.NesHeader.ROMSize << 1 );
W.ROMBANK0 = ROMPAGE( byPrgBank );
W.ROMBANK1 = ROMPAGE( byPrgBank + 1);
/* Set PPU Banks */
byChrBank <<= 3;
byChrBank %= ( S.NesHeader.VROMSize << 3 );
W.PPUBANK[0] = VROMPAGE( byChrBank );
W.PPUBANK[1] = VROMPAGE( byChrBank + 1 );
W.PPUBANK[2] = VROMPAGE( byChrBank + 2 );
W.PPUBANK[3] = VROMPAGE( byChrBank + 3 );
W.PPUBANK[4] = VROMPAGE( byChrBank + 4 );
W.PPUBANK[5] = VROMPAGE( byChrBank + 5 );
W.PPUBANK[6] = VROMPAGE( byChrBank + 6 );
W.PPUBANK[7] = VROMPAGE( byChrBank + 7 );
NESCore_Develop_Character_Data();
/* Set Name Table Mirroring */
if ( ( wAddr & 0xfe00 ) != 0xfe00 )
{
if ( byData & 0x08 )
{
NESCore_Mirroring( 2 );
} else {
NESCore_Mirroring( 3 );
}
}
}
void Map72_Write( word wAddr, byte byData )
{
byte byBank = byData & 0x0f;
if ( byData & 0x80 )
{
/* Set ROM Banks */
byBank <<= 1;
byBank %= ( S.NesHeader.ROMSize << 1 );
W.ROMBANK0 = ROMPAGE( byBank );
W.ROMBANK1 = ROMPAGE( byBank + 1 );
} else
if ( byData & 0x40 )
{
/* Set PPU Banks */
byBank <<= 3;
byBank %= ( S.NesHeader.VROMSize << 3 );
W.PPUBANK[ 0 ] = VROMPAGE( byBank );
W.PPUBANK[ 1 ] = VROMPAGE( byBank + 1 );
W.PPUBANK[ 2 ] = VROMPAGE( byBank + 2 );
W.PPUBANK[ 3 ] = VROMPAGE( byBank + 3 );
W.PPUBANK[ 4 ] = VROMPAGE( byBank + 4 );
W.PPUBANK[ 5 ] = VROMPAGE( byBank + 5 );
W.PPUBANK[ 6 ] = VROMPAGE( byBank + 6 );
W.PPUBANK[ 7 ] = VROMPAGE( byBank + 7 );
NESCore_Develop_Character_Data();
}
}
void Map72_Init()
{
MapperInit = Map72_Init;
MapperWrite = Map72_Write;
MapperSram = Map0_Sram;
MapperApu = Map0_Apu;
MapperReadApu = Map0_ReadApu;
MapperVSync = Map0_VSync;
MapperHSync = Map0_HSync;
MapperPPU = Map0_PPU;
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
W.SRAMBANK = S.SRAM;
/* Set ROM Banks */
W.ROMBANK0 = ROMPAGE( 0 );
W.ROMBANK1 = ROMPAGE( 1 );
W.ROMBANK2 = ROMLASTPAGE( 1 );
W.ROMBANK3 = ROMLASTPAGE( 0 );
if ( S.NesHeader.VROMSize > 0 )
{
int nPage ;
for (nPage = 0; nPage < 8; ++nPage )
W.PPUBANK[ nPage ] = VROMPAGE( nPage );
NESCore_Develop_Character_Data();
}
}
void Map42_Init()
{
MapperInit = Map42_Init;
MapperWrite = Map42_Write;
MapperSram = Map0_Sram;
MapperApu = Map0_Apu;
MapperReadApu = Map0_ReadApu;
MapperVSync = Map0_VSync;
MapperHSync = Map42_HSync;
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
W.SRAMBANK = ROMPAGE( 0 );
W.ROMBANK0 = ROMLASTPAGE( 3 );
W.ROMBANK1 = ROMLASTPAGE( 2 );
W.ROMBANK2 = ROMLASTPAGE( 1 );
W.ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
if ( S.NesHeader.VROMSize > 0 )
{
int nPage ;
for (nPage = 0; nPage < 8; ++nPage )
W.PPUBANK[nPage] = VROMPAGE( nPage );
NESCore_Develop_Character_Data();
}
}
void Map45_Set_PPU_Banks()
{
byte table[16] =
{
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x01,0x03,0x07,0x0F,0x1F,0x3F,0x7F,0xFF
};
Map45_C[0] = Map45_Chr0;
Map45_C[1] = Map45_Chr1;
Map45_C[2] = Map45_Chr2;
Map45_C[3] = Map45_Chr3;
Map45_C[4] = Map45_Chr4;
Map45_C[5] = Map45_Chr5;
Map45_C[6] = Map45_Chr6;
Map45_C[7] = Map45_Chr7;
byte i;
for(i = 0; i < 8; i++)
{
Map45_C[i] &= table[Map45_Regs[2] & 0x0F];
Map45_C[i] |= Map45_Regs[0] & 0xff;
Map45_C[i] += (byte)(Map45_Regs[2] & 0x10) << 4;
}
if(Map45_Regs[6] & 0x80)
{
W.PPUBANK[ 0 ] = VROMPAGE( Map45_C[4] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 1 ] = VROMPAGE( Map45_C[5] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 2 ] = VROMPAGE( Map45_C[6] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 3 ] = VROMPAGE( Map45_C[7] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 4 ] = VROMPAGE( Map45_C[0] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 5 ] = VROMPAGE( Map45_C[1] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 6 ] = VROMPAGE( Map45_C[2] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 7 ] = VROMPAGE( Map45_C[3] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
}
else
{
W.PPUBANK[ 0 ] = VROMPAGE( Map45_C[0] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 1 ] = VROMPAGE( Map45_C[1] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 2 ] = VROMPAGE( Map45_C[2] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 3 ] = VROMPAGE( Map45_C[3] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 4 ] = VROMPAGE( Map45_C[4] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 5 ] = VROMPAGE( Map45_C[5] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 6 ] = VROMPAGE( Map45_C[6] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 7 ] = VROMPAGE( Map45_C[7] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
}
}
/*-------------------------------------------------------------------*/
void Map243_Init()
{
/* Initialize Mapper */
MapperInit = Map243_Init;
/* Write to Mapper */
MapperWrite = Map0_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map243_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map0_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
W.SRAMBANK = S.SRAM;
/* Set ROM Banks */
W.ROMBANK0 = ROMPAGE( 0 );
W.ROMBANK1 = ROMPAGE( 1 );
W.ROMBANK2 = ROMPAGE( 2 );
W.ROMBANK3 = ROMPAGE( 3 );
/* Set PPU Banks */
if ( S.NesHeader.VROMSize > 0 )
{
int nPage ;
for (nPage = 0; nPage < 8; ++nPage )
{
W.PPUBANK[nPage] = VROMPAGE( nPage );
}
NESCore_Develop_Character_Data();
}
/* Initialize state registers */
Map243_Regs[0] = Map243_Regs[1] = Map243_Regs[2] = Map243_Regs[3] = 0;
}
/*-------------------------------------------------------------------*/
void Map91_Init()
{
/* Initialize Mapper */
MapperInit = Map91_Init;
/* Write to Mapper */
MapperWrite = Map0_Write;
/* Write to SRAM */
MapperSram = Map91_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map0_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
W.SRAMBANK = S.SRAM;
/* Set ROM Banks */
W.ROMBANK0 = ROMLASTPAGE( 1 );
W.ROMBANK1 = ROMLASTPAGE( 0 );
W.ROMBANK2 = ROMLASTPAGE( 1 );
W.ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
if ( S.NesHeader.VROMSize > 0 )
{
int nPage ;
for (nPage = 0; nPage < 8; ++nPage )
W.PPUBANK[ nPage ] = VROMPAGE( nPage );
NESCore_Develop_Character_Data();
}
/* Set Name Table Mirroring */
NESCore_Mirroring( 1 );
}
void Map45_Init()
{
MapperInit = Map45_Init;
MapperWrite = Map45_Write;
MapperSram = Map45_Sram;
MapperApu = Map0_Apu;
MapperReadApu = Map0_ReadApu;
MapperVSync = Map0_VSync;
MapperHSync = Map45_HSync;
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
W.SRAMBANK = S.SRAM;
/* Set ROM Banks */
Map45_Prg0 = 0;
Map45_Prg1 = 1;
Map45_Prg2 = S.NesHeader.ROMSize * 2 - 2;
Map45_Prg3 = S.NesHeader.ROMSize * 2 - 1;
W.ROMBANK0 = ROMPAGE( Map45_Prg0 ); Map45_P[0] = Map45_Prg0;
W.ROMBANK1 = ROMPAGE( Map45_Prg1 ); Map45_P[1] = Map45_Prg1;
W.ROMBANK2 = ROMPAGE( Map45_Prg2 ); Map45_P[2] = Map45_Prg2;
W.ROMBANK3 = ROMPAGE( Map45_Prg3 ); Map45_P[3] = Map45_Prg3;
/* Set PPU Banks */
Map45_Chr0 = 0; Map45_C[0] = Map45_Chr0;
Map45_Chr1 = 1; Map45_C[1] = Map45_Chr1;
Map45_Chr2 = 2; Map45_C[2] = Map45_Chr2;
Map45_Chr3 = 3; Map45_C[3] = Map45_Chr3;
Map45_Chr4 = 4; Map45_C[4] = Map45_Chr4;
Map45_Chr5 = 5; Map45_C[5] = Map45_Chr5;
Map45_Chr6 = 6; Map45_C[6] = Map45_Chr6;
Map45_Chr7 = 7; Map45_C[7] = Map45_Chr7;
int nPage ;
for (nPage = 0; nPage < 8; ++nPage ) {
W.PPUBANK[ nPage ] = VROMPAGE( nPage );
}
NESCore_Develop_Character_Data();
/* Initialize IRQ Registers */
Map45_IRQ_Enable = 0;
Map45_IRQ_Cnt = 0;
Map45_IRQ_Latch = 0;
Map45_Regs[0] = Map45_Regs[1] = Map45_Regs[2] = Map45_Regs[3] = 0;
Map45_Regs[4] = Map45_Regs[5] = Map45_Regs[6] = 0;
}
/*-------------------------------------------------------------------*/
void Map135_Set_PPU_Banks()
{
/* Set PPU Banks */
W.PPUBANK[ 0 ] = VROMPAGE( (((0|(Map135_Chr0l<<1)|(Map135_Chrch<<4))<<1) + 0) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[ 1 ] = VROMPAGE( (((0|(Map135_Chr0l<<1)|(Map135_Chrch<<4))<<1) + 1) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[ 2 ] = VROMPAGE( (((1|(Map135_Chr0h<<1)|(Map135_Chrch<<4))<<1) + 0) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[ 3 ] = VROMPAGE( (((1|(Map135_Chr0h<<1)|(Map135_Chrch<<4))<<1) + 1) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[ 4 ] = VROMPAGE( (((0|(Map135_Chr1l<<1)|(Map135_Chrch<<4))<<1) + 0) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[ 5 ] = VROMPAGE( (((0|(Map135_Chr1l<<1)|(Map135_Chrch<<4))<<1) + 1) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[ 6 ] = VROMPAGE( (((1|(Map135_Chr1h<<1)|(Map135_Chrch<<4))<<1) + 0) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[ 7 ] = VROMPAGE( (((1|(Map135_Chr1h<<1)|(Map135_Chrch<<4))<<1) + 1) % (S.NesHeader.VROMSize << 3) );
NESCore_Develop_Character_Data();
}
void Map4_Set_PPU_Banks()
{
if ( S.NesHeader.VROMSize > 0 )
{
if ( Map4_Chr_Swap() )
{
W.PPUBANK[0] = VROMPAGE(MS4.PPU[2] % (Map4_Vsz));
W.PPUBANK[1] = VROMPAGE(MS4.PPU[3] % (Map4_Vsz));
W.PPUBANK[2] = VROMPAGE(MS4.PPU[4] % (Map4_Vsz));
W.PPUBANK[3] = VROMPAGE(MS4.PPU[5] % (Map4_Vsz));
W.PPUBANK[4] = VROMPAGE((MS4.PPU[0] ) % (Map4_Vsz));
W.PPUBANK[5] = VROMPAGE((MS4.PPU[0]+1) % (Map4_Vsz));
W.PPUBANK[6] = VROMPAGE((MS4.PPU[1] ) % (Map4_Vsz));
W.PPUBANK[7] = VROMPAGE((MS4.PPU[1]+1) % (Map4_Vsz));
} else {
W.PPUBANK[4] = VROMPAGE(MS4.PPU[2] % (Map4_Vsz));
W.PPUBANK[5] = VROMPAGE(MS4.PPU[3] % (Map4_Vsz));
W.PPUBANK[6] = VROMPAGE(MS4.PPU[4] % (Map4_Vsz));
W.PPUBANK[7] = VROMPAGE(MS4.PPU[5] % (Map4_Vsz));
W.PPUBANK[0] = VROMPAGE((MS4.PPU[0] ) % (Map4_Vsz));
W.PPUBANK[1] = VROMPAGE((MS4.PPU[0]+1) % (Map4_Vsz));
W.PPUBANK[2] = VROMPAGE((MS4.PPU[1] ) % (Map4_Vsz));
W.PPUBANK[3] = VROMPAGE((MS4.PPU[1]+1) % (Map4_Vsz));
}
NESCore_Develop_Character_Data();
}
else
{
W.PPUBANK[ 0 ] = CRAMPAGE( 0 );
W.PPUBANK[ 1 ] = CRAMPAGE( 1 );
W.PPUBANK[ 2 ] = CRAMPAGE( 2 );
W.PPUBANK[ 3 ] = CRAMPAGE( 3 );
W.PPUBANK[ 4 ] = CRAMPAGE( 4 );
W.PPUBANK[ 5 ] = CRAMPAGE( 5 );
W.PPUBANK[ 6 ] = CRAMPAGE( 6 );
W.PPUBANK[ 7 ] = CRAMPAGE( 7 );
NESCore_Develop_Character_Data();
}
}
/*-------------------------------------------------------------------*/
void Map91_Sram( word wAddr, byte byData )
{
switch( wAddr & 0xF00F)
{
/* Set PPU Banks */
case 0x6000:
W.PPUBANK[ 0 ] = VROMPAGE( (byData*2+0) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 1 ] = VROMPAGE( (byData*2+1) % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0x6001:
W.PPUBANK[ 2 ] = VROMPAGE( (byData*2+0) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 3 ] = VROMPAGE( (byData*2+1) % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0x6002:
W.PPUBANK[ 4 ] = VROMPAGE( (byData*2+0) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 5 ] = VROMPAGE( (byData*2+1) % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0x6003:
W.PPUBANK[ 6 ] = VROMPAGE( (byData*2+0) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 7 ] = VROMPAGE( (byData*2+1) % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
/* Set CPU Banks */
case 0x7000:
W.ROMBANK0 = ROMPAGE( byData % ( S.NesHeader.ROMSize << 1 ) );
break;
case 0x7001:
W.ROMBANK1 = ROMPAGE( byData % ( S.NesHeader.ROMSize << 1 ) );
break;
}
}
/*-------------------------------------------------------------------*/
void Map243_Apu( word wAddr, byte byData )
{
if ( wAddr == 0x4100 )
{
Map243_Regs[0] = byData;
}
else if ( wAddr == 0x4101 )
{
switch ( Map243_Regs[0] & 0x07 )
{
case 0x02:
Map243_Regs[1] = byData & 0x01;
break;
case 0x00:
case 0x04:
case 0x07:
Map243_Regs[2] = ( byData & 0x01 ) << 1;
break;
/* Set ROM Banks */
case 0x05:
W.ROMBANK0 = ROMPAGE( ( byData * 4 + 0 ) % ( S.NesHeader.ROMSize << 1 ) );
W.ROMBANK1 = ROMPAGE( ( byData * 4 + 1 ) % ( S.NesHeader.ROMSize << 1 ) );
W.ROMBANK2 = ROMPAGE( ( byData * 4 + 2 ) % ( S.NesHeader.ROMSize << 1 ) );
W.ROMBANK3 = ROMPAGE( ( byData * 4 + 3 ) % ( S.NesHeader.ROMSize << 1 ) );
break;
case 0x06:
Map243_Regs[3] = ( byData & 0x03 ) << 2;
break;
}
/* Set PPU Banks */
if ( ( S.NesHeader.VROMSize << 3 ) <= 64 )
{
byte chr_bank = ( Map243_Regs[2] + Map243_Regs[3] ) >> 1;
W.PPUBANK[0] = VROMPAGE( ( chr_bank * 8 + 0 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[1] = VROMPAGE( ( chr_bank * 8 + 1 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[2] = VROMPAGE( ( chr_bank * 8 + 2 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[3] = VROMPAGE( ( chr_bank * 8 + 3 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[4] = VROMPAGE( ( chr_bank * 8 + 4 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[5] = VROMPAGE( ( chr_bank * 8 + 5 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[6] = VROMPAGE( ( chr_bank * 8 + 6 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[7] = VROMPAGE( ( chr_bank * 8 + 7 ) % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
}
else
{
/*-------------------------------------------------------------------*/
void Map134_Apu( word wAddr, byte byData )
{
switch( wAddr & 0x4101 ) {
case 0x4100:
Map134_Cmd = byData & 0x07;
break;
case 0x4101:
switch( Map134_Cmd ) {
case 0:
Map134_Prg = 0;
Map134_Chr = 3;
break;
case 4:
Map134_Chr &= 0x3;
Map134_Chr |= (byData & 0x07) << 2;
break;
case 5:
Map134_Prg = byData & 0x07;
break;
case 6:
Map134_Chr &= 0x1C;
Map134_Chr |= byData & 0x3;
break;
case 7:
if( byData & 0x01 ) NESCore_Mirroring( 0 );
else NESCore_Mirroring( 1 );
break;
}
break;
}
/* Set ROM Banks */
W.ROMBANK0 = ROMPAGE( ((Map134_Prg<<2) + 0 ) % (S.NesHeader.ROMSize << 1) );
W.ROMBANK1 = ROMPAGE( ((Map134_Prg<<2) + 1 ) % (S.NesHeader.ROMSize << 1) );
W.ROMBANK2 = ROMPAGE( ((Map134_Prg<<2) + 2 ) % (S.NesHeader.ROMSize << 1) );
W.ROMBANK3 = ROMPAGE( ((Map134_Prg<<2) + 3 ) % (S.NesHeader.ROMSize << 1) );
/* Set PPU Banks */
W.PPUBANK[0] = VROMPAGE( ((Map134_Chr<<3) + 0) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[1] = VROMPAGE( ((Map134_Chr<<3) + 1) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[2] = VROMPAGE( ((Map134_Chr<<3) + 2) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[3] = VROMPAGE( ((Map134_Chr<<3) + 3) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[4] = VROMPAGE( ((Map134_Chr<<3) + 4) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[5] = VROMPAGE( ((Map134_Chr<<3) + 5) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[6] = VROMPAGE( ((Map134_Chr<<3) + 6) % (S.NesHeader.VROMSize << 3) );
W.PPUBANK[7] = VROMPAGE( ((Map134_Chr<<3) + 7) % (S.NesHeader.VROMSize << 3) );
NESCore_Develop_Character_Data();
//Map134_Wram[wAddr & 0x1fff] = byData;
}
/*-------------------------------------------------------------------*/
void Map100_Set_PPU_Banks()
{
if ( S.NesHeader.VROMSize > 0 )
{
W.PPUBANK[ 0 ] = VROMPAGE( Map100_Chr0 % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 1 ] = VROMPAGE( Map100_Chr1 % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 2 ] = VROMPAGE( Map100_Chr2 % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 3 ] = VROMPAGE( Map100_Chr3 % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 4 ] = VROMPAGE( Map100_Chr4 % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 5 ] = VROMPAGE( Map100_Chr5 % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 6 ] = VROMPAGE( Map100_Chr6 % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 7 ] = VROMPAGE( Map100_Chr7 % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
}
}
/*-------------------------------------------------------------------*/
void Map101_Write( word wAddr, byte byData )
{
byData &= 0x03;
byData <<= 3;
byData %= ( S.NesHeader.VROMSize << 3 );
/* Set PPU Banks */
W.PPUBANK[ 0 ] = VROMPAGE( byData );
W.PPUBANK[ 1 ] = VROMPAGE( byData + 1 );
W.PPUBANK[ 2 ] = VROMPAGE( byData + 2 );
W.PPUBANK[ 3 ] = VROMPAGE( byData + 3 );
W.PPUBANK[ 4 ] = VROMPAGE( byData + 4 );
W.PPUBANK[ 5 ] = VROMPAGE( byData + 5 );
W.PPUBANK[ 6 ] = VROMPAGE( byData + 6 );
W.PPUBANK[ 7 ] = VROMPAGE( byData + 7 );
NESCore_Develop_Character_Data();
}
void Map46_Set_ROM_Banks()
{
/* Set ROM Banks */
W.ROMBANK0 = ROMPAGE( ( ( Map46_Regs[ 0 ] << 3 ) + ( Map46_Regs[ 2 ] << 2 ) + 0 ) % ( S.NesHeader.ROMSize << 1 ) );
W.ROMBANK1 = ROMPAGE( ( ( Map46_Regs[ 0 ] << 3 ) + ( Map46_Regs[ 2 ] << 2 ) + 1 ) % ( S.NesHeader.ROMSize << 1 ) );
W.ROMBANK2 = ROMPAGE( ( ( Map46_Regs[ 0 ] << 3 ) + ( Map46_Regs[ 2 ] << 2 ) + 2 ) % ( S.NesHeader.ROMSize << 1 ) );
W.ROMBANK3 = ROMPAGE( ( ( Map46_Regs[ 0 ] << 3 ) + ( Map46_Regs[ 2 ] << 2 ) + 3 ) % ( S.NesHeader.ROMSize << 1 ) );
/* Set PPU Banks */
W.PPUBANK[ 0 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 0 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 1 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 1 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 2 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 2 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 3 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 3 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 4 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 4 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 5 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 5 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 6 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 6 ) % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 7 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 7 ) % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
}
void Map33_Init()
{
MapperInit = Map33_Init;
MapperWrite = Map33_Write;
MapperSram = Map0_Sram;
MapperApu = Map0_Apu;
MapperReadApu = Map0_ReadApu;
MapperVSync = Map0_VSync;
MapperHSync = Map0_HSync;
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
W.SRAMBANK = S.SRAM;
W.ROMBANK0 = ROMPAGE( 0 );
W.ROMBANK1 = ROMPAGE( 1 );
W.ROMBANK2 = ROMLASTPAGE( 1 );
W.ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
if ( S.NesHeader.VROMSize > 0 )
{
int nPage ;
for (nPage = 0; nPage < 8; ++nPage )
{
W.PPUBANK[ nPage ] = VROMPAGE( nPage );
Map33_Regs[ nPage ] = nPage;
}
NESCore_Develop_Character_Data();
}
else
{
int nPage ;
for (nPage = 0; nPage < 8; ++nPage )
Map33_Regs[ nPage ] = 0;
}
Map33_Switch = 0;
Map33_IRQ_Enable = 0;
Map33_IRQ_Cnt = 0;
}
void Map68_SyncMirror( void )
{
if ( Map68_Regs[ 0 ] )
{
switch( Map68_Regs[ 1 ] )
{
case 0x00:
W.PPUBANK[ 8 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 );
W.PPUBANK[ 9 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 );
W.PPUBANK[ 10 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 );
W.PPUBANK[ 11 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 );
break;
case 0x01:
W.PPUBANK[ 8 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 );
W.PPUBANK[ 9 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 );
W.PPUBANK[ 10 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 );
W.PPUBANK[ 11 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 );
break;
case 0x02:
W.PPUBANK[ 8 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 );
W.PPUBANK[ 9 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 );
W.PPUBANK[ 10 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 );
W.PPUBANK[ 11 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 );
break;
case 0x03:
W.PPUBANK[ 8 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 );
W.PPUBANK[ 9 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 );
W.PPUBANK[ 10 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 );
W.PPUBANK[ 11 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 );
break;
}
NESCore_Develop_Character_Data();
}
else
{
NESCore_Mirroring( Map68_Regs[ 1 ] );
}
}
void Map32_Write( word wAddr, byte byData )
{
switch ( wAddr & 0xf000 )
{
case 0x8000:
/* Set ROM Banks */
byData %= ( S.NesHeader.ROMSize << 1 );
if ( Map32_Saved & 0x02 )
{
W.ROMBANK2 = ROMPAGE( byData );
} else {
W.ROMBANK0 = ROMPAGE( byData );
}
break;
case 0x9000:
Map32_Saved = byData;
// Name Table Mirroring
NESCore_Mirroring( byData & 0x01 );
break;
case 0xa000:
/* Set ROM Banks */
byData %= ( S.NesHeader.ROMSize << 1 );
W.ROMBANK1 = ROMPAGE( byData );
break;
case 0xb000:
/* Set PPU Banks */
byData %= ( S.NesHeader.VROMSize << 3 );
W.PPUBANK[ wAddr & 0x0007 ] = VROMPAGE( byData );
NESCore_Develop_Character_Data();
break;
default:
break;
}
}
void Map10_Init()
{
int nPage;
MapperInit = Map10_Init;
MapperWrite = Map10_Write;
MapperSram = Map0_Sram;
MapperApu = Map0_Apu;
MapperReadApu = Map0_ReadApu;
MapperVSync = Map0_VSync;
MapperHSync = Map0_HSync;
MapperPPU = Map10_PPU;
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
W.SRAMBANK = S.SRAM;
W.ROMBANK0 = ROMPAGE( 0 );
W.ROMBANK1 = ROMPAGE( 1 );
W.ROMBANK2 = ROMLASTPAGE( 1 );
W.ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
if ( S.NesHeader.VROMSize > 0 )
{
for ( nPage = 0; nPage < 8; ++nPage )
W.PPUBANK[ nPage ] = VROMPAGE( nPage );
NESCore_Develop_Character_Data();
}
/* Init Latch Selector */
latch3.state = 0xfe;
latch3.lo_bank = 0;
latch3.hi_bank = 0;
latch4.state = 0xfe;
latch4.lo_bank = 0;
latch4.hi_bank = 0;
}
void Map67_Init()
{
MapperInit = Map67_Init;
MapperWrite = Map67_Write;
MapperSram = Map0_Sram;
MapperApu = Map0_Apu;
MapperReadApu = Map0_ReadApu;
MapperVSync = Map0_VSync;
MapperHSync = Map67_HSync;
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
W.SRAMBANK = S.SRAM;
W.ROMBANK0 = ROMPAGE( 0 );
W.ROMBANK1 = ROMPAGE( 1 );
W.ROMBANK2 = ROMLASTPAGE( 1 );
W.ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
W.PPUBANK[ 0 ] = VROMPAGE( 0 );
W.PPUBANK[ 1 ] = VROMPAGE( 1 );
W.PPUBANK[ 2 ] = VROMPAGE( 2 );
W.PPUBANK[ 3 ] = VROMPAGE( 3 );
W.PPUBANK[ 4 ] = VROMPAGE( ( S.NesHeader.VROMSize << 3 ) - 4 );
W.PPUBANK[ 5 ] = VROMPAGE( ( S.NesHeader.VROMSize << 3 ) - 3 );
W.PPUBANK[ 6 ] = VROMPAGE( ( S.NesHeader.VROMSize << 3 ) - 2 );
W.PPUBANK[ 7 ] = VROMPAGE( ( S.NesHeader.VROMSize << 3 ) - 1 );
NESCore_Develop_Character_Data();
/* Initialize IRQ Registers */
Map67_IRQ_Enable = 0;
Map67_IRQ_Cnt = 0;
Map67_IRQ_Latch = 0;
}
void Map18_Write( word wAddr, byte byData )
{
switch( wAddr )
{
/* Set ROM Banks */
case 0x8000:
Map18_Regs[ 0 ] = ( Map18_Regs[ 0 ] & 0xf0 ) | ( byData & 0x0f );
W.ROMBANK0 = ROMPAGE( Map18_Regs[ 0 ] % ( S.NesHeader.ROMSize << 1 ) );
break;
case 0x8001:
Map18_Regs[ 0 ] = ( Map18_Regs[ 0 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 );
W.ROMBANK0 = ROMPAGE( Map18_Regs[ 0 ] % ( S.NesHeader.ROMSize << 1 ) );
break;
case 0x8002:
Map18_Regs[ 1 ] = ( Map18_Regs[ 1 ] & 0xf0 ) | ( byData & 0x0f );
W.ROMBANK1 = ROMPAGE( Map18_Regs[ 1 ] % ( S.NesHeader.ROMSize << 1 ) );
break;
case 0x8003:
Map18_Regs[ 1 ] = ( Map18_Regs[ 1 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 );
W.ROMBANK1 = ROMPAGE( Map18_Regs[ 1 ] % ( S.NesHeader.ROMSize << 1 ) );
break;
case 0x9000:
Map18_Regs[ 2 ] = ( Map18_Regs[ 2 ] & 0xf0 ) | ( byData & 0x0f );
W.ROMBANK2 = ROMPAGE( Map18_Regs[ 2 ] % ( S.NesHeader.ROMSize << 1 ) );
break;
case 0x9001:
Map18_Regs[ 2 ] = ( Map18_Regs[ 2 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 );
W.ROMBANK2 = ROMPAGE( Map18_Regs[ 2 ] % ( S.NesHeader.ROMSize << 1 ) );
break;
/* Set PPU Banks */
case 0xA000:
Map18_Regs[ 3 ] = ( Map18_Regs[ 3 ] & 0xf0 ) | ( byData & 0x0f );
W.PPUBANK[ 0 ] = VROMPAGE( Map18_Regs[ 3 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xA001:
Map18_Regs[ 3 ] = ( Map18_Regs[ 3 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 );
W.PPUBANK[ 0 ] = VROMPAGE( Map18_Regs[ 3 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xA002:
Map18_Regs[ 4 ] = ( Map18_Regs[ 4 ] & 0xf0 ) | ( byData & 0x0f );
W.PPUBANK[ 1 ] = VROMPAGE( Map18_Regs[ 4 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xA003:
Map18_Regs[ 4 ] = ( Map18_Regs[ 4 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 );
W.PPUBANK[ 1 ] = VROMPAGE( Map18_Regs[ 4 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xB000:
Map18_Regs[ 5 ] = ( Map18_Regs[ 5 ] & 0xf0 ) | ( byData & 0x0f );
W.PPUBANK[ 2 ] = VROMPAGE( Map18_Regs[ 5 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xB001:
Map18_Regs[ 5 ] = ( Map18_Regs[ 5 ] &0x0f ) | ( ( byData & 0x0f ) << 4 );
W.PPUBANK[ 2 ] = VROMPAGE( Map18_Regs[ 5 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xB002:
Map18_Regs[ 6 ] = ( Map18_Regs[ 6 ] & 0xf0 ) | ( byData & 0x0f );
W.PPUBANK[ 3 ] = VROMPAGE( Map18_Regs[ 6 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xB003:
Map18_Regs[ 6 ] = ( Map18_Regs[ 6 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 );
W.PPUBANK[ 3 ] = VROMPAGE( Map18_Regs[ 6 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xC000:
Map18_Regs[ 7 ] = ( Map18_Regs[ 7 ] & 0xf0 ) | ( byData & 0x0f );
W.PPUBANK[ 4 ] = VROMPAGE( Map18_Regs[ 7 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xC001:
Map18_Regs[ 7 ] = ( Map18_Regs[ 7 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 );
W.PPUBANK[ 4 ] = VROMPAGE( Map18_Regs[ 7 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xC002:
Map18_Regs[ 8 ] = ( Map18_Regs[ 8 ] & 0xf0 ) | ( byData & 0x0f );
W.PPUBANK[ 5 ] = VROMPAGE( Map18_Regs[ 8 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xC003:
Map18_Regs[ 8 ] = ( Map18_Regs[ 8 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 );
W.PPUBANK[ 5 ] = VROMPAGE( Map18_Regs[ 8 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xD000:
Map18_Regs[ 9 ] = ( Map18_Regs[ 9 ] & 0xf0 ) | ( byData & 0x0f );
W.PPUBANK[ 6 ] = VROMPAGE( Map18_Regs[ 9 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xD001:
Map18_Regs[ 9 ] = ( Map18_Regs[ 9 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 );
W.PPUBANK[ 6 ] = VROMPAGE( Map18_Regs[ 9 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xD002:
Map18_Regs[ 10 ] = ( Map18_Regs[ 10 ] & 0xf0 ) | ( byData & 0x0f );
W.PPUBANK[ 7 ] = VROMPAGE( Map18_Regs[ 10 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xD003:
Map18_Regs[ 10 ] = ( Map18_Regs[ 10 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 );
W.PPUBANK[ 7 ] = VROMPAGE( Map18_Regs[ 10 ] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xE000:
Map18_IRQ_Latch = ( Map18_IRQ_Latch & 0xfff0 ) | ( byData & 0x0f );
break;
case 0xE001:
Map18_IRQ_Latch = ( Map18_IRQ_Latch & 0xff0f ) | ( ( byData & 0x0f ) << 4 );
break;
case 0xE002:
Map18_IRQ_Latch = ( Map18_IRQ_Latch & 0xf0ff ) | ( ( byData & 0x0f ) << 8 );
break;
case 0xE003:
Map18_IRQ_Latch = ( Map18_IRQ_Latch & 0x0fff ) | ( ( byData & 0x0f ) << 12 );
break;
case 0xF000:
if ( ( byData & 0x01 ) == 0 )
{
Map18_IRQ_Cnt = 0;
} else {
Map18_IRQ_Cnt = Map18_IRQ_Latch;
}
break;
case 0xF001:
Map18_IRQ_Enable = byData & 0x01;
break;
/* Name Table Mirroring */
case 0xF002:
switch ( byData & 0x03 )
{
case 0:
NESCore_Mirroring( 0 ); /* Horizontal */
break;
case 1:
NESCore_Mirroring( 1 ); /* Vertical */
break;
case 2:
NESCore_Mirroring( 3 ); /* One Screen 0x2000 */
break;
}
break;
}
}
void Map75_Write( word wAddr, byte byData )
{
switch ( wAddr & 0xf000 )
{
/* Set ROM Banks */
case 0x8000:
byData %= ( S.NesHeader.ROMSize << 1 );
W.ROMBANK0 = ROMPAGE( byData );
break;
case 0x9000:
/* Set Mirroring */
if ( byData & 0x01 )
{
NESCore_Mirroring( 0 );
} else {
NESCore_Mirroring( 1 );
}
/* Set PPU Banks */
Map75_Regs[ 0 ] = ( Map75_Regs[ 0 ] & 0x0f ) | ( ( byData & 0x02 ) << 3 );
W.PPUBANK[ 0 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 0 );
W.PPUBANK[ 1 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 1 );
W.PPUBANK[ 2 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 2 );
W.PPUBANK[ 3 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 3 );
Map75_Regs[ 1 ] = ( Map75_Regs[ 1 ] & 0x0f ) | ( ( byData & 0x04 ) << 2 );
W.PPUBANK[ 4 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 0 );
W.PPUBANK[ 5 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 1 );
W.PPUBANK[ 6 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 2 );
W.PPUBANK[ 7 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 3 );
NESCore_Develop_Character_Data();
break;
/* Set ROM Banks */
case 0xA000:
byData %= ( S.NesHeader.ROMSize << 1 );
W.ROMBANK1 = ROMPAGE( byData );
break;
/* Set ROM Banks */
case 0xC000:
byData %= ( S.NesHeader.ROMSize << 1 );
W.ROMBANK2 = ROMPAGE( byData );
break;
case 0xE000:
/* Set PPU Banks */
Map75_Regs[ 0 ] = ( Map75_Regs[ 0 ] & 0x10 ) | ( byData & 0x0f );
W.PPUBANK[ 0 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 0 );
W.PPUBANK[ 1 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 1 );
W.PPUBANK[ 2 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 2 );
W.PPUBANK[ 3 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 3 );
NESCore_Develop_Character_Data();
break;
case 0xF000:
/* Set PPU Banks */
Map75_Regs[ 1 ] = ( Map75_Regs[ 1 ] & 0x10 ) | ( byData & 0x0f );
W.PPUBANK[ 4 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 0 );
W.PPUBANK[ 5 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 1 );
W.PPUBANK[ 6 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 2 );
W.PPUBANK[ 7 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 3 );
NESCore_Develop_Character_Data();
break;
}
}
void Map67_Write( word wAddr, byte byData )
{
switch ( wAddr & 0xf800 )
{
/* Set PPU Banks */
case 0x8800:
byData <<= 1;
byData %= ( S.NesHeader.VROMSize << 3 );
W.PPUBANK[ 0 ] = VROMPAGE( byData + 0 );
W.PPUBANK[ 1 ] = VROMPAGE( byData + 1 );
NESCore_Develop_Character_Data();
break;
case 0x9800:
byData <<= 1;
byData %= ( S.NesHeader.VROMSize << 3 );
W.PPUBANK[ 2 ] = VROMPAGE( byData + 0 );
W.PPUBANK[ 3 ] = VROMPAGE( byData + 1 );
NESCore_Develop_Character_Data();
break;
case 0xa800:
byData <<= 1;
byData %= ( S.NesHeader.VROMSize << 3 );
W.PPUBANK[ 4 ] = VROMPAGE( byData + 0 );
W.PPUBANK[ 5 ] = VROMPAGE( byData + 1 );
NESCore_Develop_Character_Data();
break;
case 0xb800:
byData <<= 1;
byData %= ( S.NesHeader.VROMSize << 3 );
W.PPUBANK[ 6 ] = VROMPAGE( byData + 0 );
W.PPUBANK[ 7 ] = VROMPAGE( byData + 1 );
NESCore_Develop_Character_Data();
break;
case 0xc800:
Map67_IRQ_Cnt = Map67_IRQ_Latch;
Map67_IRQ_Latch = byData;
break;
case 0xd800:
Map67_IRQ_Enable = byData & 0x10;
break;
case 0xe800:
switch ( byData & 0x03 )
{
case 0:
NESCore_Mirroring( 1 );
break;
case 1:
NESCore_Mirroring( 0 );
break;
case 2:
NESCore_Mirroring( 3 );
break;
case 3:
NESCore_Mirroring( 2 );
break;
}
break;
/* Set ROM Banks */
case 0xf800:
byData <<= 1;
byData %= ( S.NesHeader.ROMSize << 1 );
W.ROMBANK0 = ROMPAGE( byData + 0 );
W.ROMBANK1 = ROMPAGE( byData + 1 );
break;
}
}
void Map24_Write( word wAddr, byte byData )
{
switch ( wAddr )
{
case 0x8000:
/* Set ROM Banks */
W.ROMBANK0 = ROMPAGE( ( byData + 0 ) % ( S.NesHeader.ROMSize << 1) );
W.ROMBANK1 = ROMPAGE( ( byData + 1 ) % ( S.NesHeader.ROMSize << 1) );
break;
case 0xb003:
/* Name Table Mirroring */
switch ( byData & 0x0c )
{
case 0x00:
NESCore_Mirroring( 1 ); /* Vertical */
break;
case 0x04:
NESCore_Mirroring( 0 ); /* Horizontal */
break;
case 0x08:
NESCore_Mirroring( 3 ); /* One Screen 0x2000 */
break;
case 0x0c:
NESCore_Mirroring( 2 ); /* One Screen 0x2400 */
break;
}
break;
case 0xC000:
W.ROMBANK2 = ROMPAGE( byData % ( S.NesHeader.ROMSize << 1) );
break;
case 0xD000:
W.PPUBANK[ 0 ] = VROMPAGE( byData % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xD001:
W.PPUBANK[ 1 ] = VROMPAGE( byData % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xD002:
W.PPUBANK[ 2 ] = VROMPAGE( byData % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xD003:
W.PPUBANK[ 3 ] = VROMPAGE( byData % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xE000:
W.PPUBANK[ 4 ] = VROMPAGE( byData % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xE001:
W.PPUBANK[ 5 ] = VROMPAGE( byData % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xE002:
W.PPUBANK[ 6 ] = VROMPAGE( byData % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xE003:
W.PPUBANK[ 7 ] = VROMPAGE( byData % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
break;
case 0xF000:
Map24_IRQ_Latch = byData;
break;
case 0xF001:
Map24_IRQ_State = byData & 0x03;
if(Map24_IRQ_State & 0x02)
{
Map24_IRQ_Count = Map24_IRQ_Latch;
}
break;
case 0xF002:
if(Map24_IRQ_State & 0x01)
{
Map24_IRQ_State |= 0x02;
}
else
{
Map24_IRQ_State &= 0x01;
}
break;
}
}
