static UINT32 am2PCDoubleDisplacement32(void)
{
amFlag = 0;
amOut = MemRead32(PC + OpRead32(modAdd+1)) + OpRead32(modAdd+5);
return 9;
}
static UINT32 am2DoubleDisplacement32(void)
{
amFlag = 0;
amOut = MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)) + OpRead32(modAdd+5);
return 9;
}
static UINT32 bam2PCDoubleDisplacement32(v60_state *cpustate)
{
cpustate->amflag = 0;
cpustate->amout = cpustate->program->read_dword_unaligned(cpustate->PC + OpRead32(cpustate, cpustate->modadd + 1));
cpustate->bamoffset = OpRead32(cpustate, cpustate->modadd + 5);
return 9;
}
UINT32 bam2PCDoubleDisplacement32(void)
{
amFlag = 0;
amOut = MemRead32(PC + OpRead32(modAdd+1));
bamOffset = OpRead32(modAdd+5);
return 9;
}
static UINT32 am2DirectAddressDeferred(v60_state *cpustate)
{
cpustate->amflag = 0;
cpustate->amout = cpustate->program->read_dword_unaligned(OpRead32(cpustate, cpustate->modadd + 1));
return 5;
}
static UINT32 am2DirectAddress(v60_state *cpustate)
{
cpustate->amflag = 0;
cpustate->amout = OpRead32(cpustate, cpustate->modadd + 1);
return 5;
}
static UINT32 am2PCDisplacementIndirect32(v60_state *cpustate)
{
cpustate->amflag = 0;
cpustate->amout = cpustate->program->read_dword_unaligned(cpustate->PC + OpRead32(cpustate, cpustate->modadd + 1));
return 5;
}
static UINT32 am2PCDisplacement32(v60_state *cpustate)
{
cpustate->amflag = 0;
cpustate->amout = cpustate->PC + OpRead32(cpustate, cpustate->modadd + 1);
return 5;
}
static UINT32 am2Displacement32(v60_state *cpustate)
{
cpustate->amflag = 0;
cpustate->amout = cpustate->reg[cpustate->modval & 0x1F] + OpRead32(cpustate, cpustate->modadd + 1);
return 5;
}
static UINT32 am2DirectAddressDeferred(void)
{
amFlag = 0;
amOut = MemRead32(OpRead32(modAdd+1));
return 5;
}
UINT32 am2Displacement32(void)
{
amFlag = 0;
amOut = v60.reg[modVal&0x1F] + OpRead32(modAdd+1);
return 5;
}
static UINT32 am2DirectAddress(void)
{
amFlag = 0;
amOut = OpRead32(modAdd+1);
return 5;
}
static UINT32 am2PCDisplacementIndirect32(void)
{
amFlag = 0;
amOut = MemRead32(PC + OpRead32(modAdd+1));
return 5;
}
static UINT32 am2PCDisplacement32(void)
{
amFlag = 0;
amOut = PC + OpRead32(modAdd+1);
return 5;
}
static UINT32 am2DisplacementIndirect32(void)
{
amFlag = 0;
amOut = MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1));
return 5;
}
static UINT32 am3DirectAddress(v60_state *cpustate)
{
switch (cpustate->moddim)
{
case 0:
cpustate->program->write_byte(OpRead32(cpustate, cpustate->modadd + 1), cpustate->modwritevalb);
break;
case 1:
cpustate->program->write_word_unaligned(OpRead32(cpustate, cpustate->modadd + 1), cpustate->modwritevalh);
break;
case 2:
cpustate->program->write_dword_unaligned(OpRead32(cpustate, cpustate->modadd + 1), cpustate->modwritevalw);
break;
}
return 5;
}
static UINT32 bam2PCDisplacementIndirectIndexed32(v60_state *cpustate)
{
cpustate->amflag = 0;
cpustate->amout = cpustate->program->read_dword_unaligned(cpustate->PC + OpRead32(cpustate, cpustate->modadd + 2));
cpustate->bamoffset = cpustate->reg[cpustate->modval & 0x1F];
return 6;
}
static UINT32 bam2DirectAddressIndexed(v60_state *cpustate)
{
cpustate->amflag = 0;
cpustate->amout = OpRead32(cpustate, cpustate->modadd + 2);
cpustate->bamoffset = cpustate->reg[cpustate->modval & 0x1F];
return 6;
}
static UINT32 bam2PCDisplacementIndirectIndexed32(void)
{
amFlag = 0;
amOut = MemRead32(PC + OpRead32(modAdd+2));
bamOffset = v60.reg[modVal&0x1F];
return 6;
}
static UINT32 bam2DirectAddressDeferredIndexed(v60_state *cpustate)
{
cpustate->amflag = 0;
cpustate->amout = cpustate->program->read_dword_unaligned(OpRead32(cpustate, cpustate->modadd + 2));
cpustate->bamoffset = cpustate->reg[cpustate->modval & 0x1F];
return 6;
}
static UINT32 am3DirectAddressDeferred(void)
{
switch (modDim)
{
case 0:
MemWrite8(MemRead32(OpRead32(modAdd+1)), modWriteValB);
break;
case 1:
MemWrite16(MemRead32(OpRead32(modAdd+1)), modWriteValH);
break;
case 2:
MemWrite32(MemRead32(OpRead32(modAdd+1)), modWriteValW);
break;
}
return 5;
}
static UINT32 am3PCDisplacementIndirect32(void)
{
switch (modDim)
{
case 0:
MemWrite8(MemRead32(PC + OpRead32(modAdd+1)), modWriteValB);
break;
case 1:
MemWrite16(MemRead32(PC + OpRead32(modAdd+1)), modWriteValH);
break;
case 2:
MemWrite32(MemRead32(PC + OpRead32(modAdd+1)), modWriteValW);
break;
}
return 5;
}
static UINT32 bam2DirectAddressDeferredIndexed(void)
{
amFlag = 0;
amOut = MemRead32(OpRead32(modAdd+2));
bamOffset = v60.reg[modVal&0x1F];
return 6;
}
static UINT32 am3PCDisplacement32(v60_state *cpustate)
{
switch (cpustate->moddim)
{
case 0:
cpustate->program->write_byte(cpustate->PC + OpRead32(cpustate, cpustate->modadd + 1), cpustate->modwritevalb);
break;
case 1:
cpustate->program->write_word_unaligned(cpustate->PC + OpRead32(cpustate, cpustate->modadd + 1), cpustate->modwritevalh);
break;
case 2:
cpustate->program->write_dword_unaligned(cpustate->PC + OpRead32(cpustate, cpustate->modadd + 1), cpustate->modwritevalw);
break;
}
return 5;
}
static UINT32 am3Displacement32(void)
{
switch (modDim)
{
case 0:
MemWrite8(v60.reg[modVal&0x1F] + OpRead32(modAdd+1), modWriteValB);
break;
case 1:
MemWrite16(v60.reg[modVal&0x1F] + OpRead32(modAdd+1), modWriteValH);
break;
case 2:
MemWrite32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1), modWriteValW);
break;
}
return 5;
}
static UINT32 am3DirectAddressIndexed(v60_state *cpustate)
{
switch (cpustate->moddim)
{
case 0:
cpustate->program->write_byte(OpRead32(cpustate, cpustate->modadd + 2) + cpustate->reg[cpustate->modval & 0x1F], cpustate->modwritevalb);
break;
case 1:
cpustate->program->write_word_unaligned(OpRead32(cpustate, cpustate->modadd + 2) + cpustate->reg[cpustate->modval & 0x1F] * 2, cpustate->modwritevalh);
break;
case 2:
cpustate->program->write_dword_unaligned(OpRead32(cpustate, cpustate->modadd + 2) + cpustate->reg[cpustate->modval & 0x1F] * 4, cpustate->modwritevalw);
break;
}
return 6;
}
static UINT32 am3PCDisplacementIndirectIndexed32(void)
{
switch (modDim)
{
case 0:
MemWrite8(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValB);
break;
case 1:
MemWrite16(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F] * 2, modWriteValH);
break;
case 2:
MemWrite32(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F] * 4, modWriteValW);
break;
}
return 6;
}
static UINT32 bam2Displacement32(void)
{
amFlag = 0;
amOut = v60.reg[modVal&0x1F];
bamOffset = OpRead32(modAdd+1);
return 5;
}
static UINT32 am3DirectAddressDeferredIndexed(void)
{
switch (modDim)
{
case 0:
MemWrite8(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValB);
break;
case 1:
MemWrite16(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValH);
break;
case 2:
MemWrite32(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValW);
break;
}
return 6;
}
static UINT32 bam2DisplacementIndexed32(void)
{
amFlag = 0;
amOut = v60.reg[modVal2&0x1F] + OpRead32(modAdd+2);
bamOffset = v60.reg[modVal&0x1F];
return 6;
}
